0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright 2019 Gateworks Corporation
0004 */
0005
0006 #include <dt-bindings/gpio/gpio.h>
0007 #include <dt-bindings/input/linux-event-codes.h>
0008 #include <dt-bindings/interrupt-controller/irq.h>
0009
0010 / {
0011 /* these are used by bootloader for disabling nodes */
0012 aliases {
0013 led0 = &led0;
0014 led1 = &led1;
0015 led2 = &led2;
0016 nand = &gpmi;
0017 usb0 = &usbh1;
0018 usb1 = &usbotg;
0019 };
0020
0021 chosen {
0022 stdout-path = &uart2;
0023 };
0024
0025 gpio-keys {
0026 compatible = "gpio-keys";
0027
0028 user-pb {
0029 label = "user_pb";
0030 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
0031 linux,code = <BTN_0>;
0032 };
0033
0034 user-pb1x {
0035 label = "user_pb1x";
0036 linux,code = <BTN_1>;
0037 interrupt-parent = <&gsc>;
0038 interrupts = <0>;
0039 };
0040
0041 key-erased {
0042 label = "key-erased";
0043 linux,code = <BTN_2>;
0044 interrupt-parent = <&gsc>;
0045 interrupts = <1>;
0046 };
0047
0048 eeprom-wp {
0049 label = "eeprom_wp";
0050 linux,code = <BTN_3>;
0051 interrupt-parent = <&gsc>;
0052 interrupts = <2>;
0053 };
0054
0055 tamper {
0056 label = "tamper";
0057 linux,code = <BTN_4>;
0058 interrupt-parent = <&gsc>;
0059 interrupts = <5>;
0060 };
0061
0062 switch-hold {
0063 label = "switch_hold";
0064 linux,code = <BTN_5>;
0065 interrupt-parent = <&gsc>;
0066 interrupts = <7>;
0067 };
0068 };
0069
0070 leds {
0071 compatible = "gpio-leds";
0072 pinctrl-names = "default";
0073 pinctrl-0 = <&pinctrl_gpio_leds>;
0074
0075 led0: user1 {
0076 label = "user1";
0077 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
0078 default-state = "on";
0079 linux,default-trigger = "heartbeat";
0080 };
0081
0082 led1: user2 {
0083 label = "user2";
0084 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
0085 default-state = "off";
0086 };
0087
0088 led2: user3 {
0089 label = "user3";
0090 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
0091 default-state = "off";
0092 };
0093 };
0094
0095 memory@10000000 {
0096 device_type = "memory";
0097 reg = <0x10000000 0x40000000>;
0098 };
0099
0100 pps {
0101 compatible = "pps-gpio";
0102 pinctrl-names = "default";
0103 pinctrl-0 = <&pinctrl_pps>;
0104 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
0105 };
0106
0107 reg_3p3v: regulator-3p3v {
0108 compatible = "regulator-fixed";
0109 regulator-name = "3P3V";
0110 regulator-min-microvolt = <3300000>;
0111 regulator-max-microvolt = <3300000>;
0112 regulator-always-on;
0113 };
0114
0115 reg_usb_vbus: regulator-5p0v {
0116 compatible = "regulator-fixed";
0117 regulator-name = "usb_vbus";
0118 regulator-min-microvolt = <5000000>;
0119 regulator-max-microvolt = <5000000>;
0120 regulator-always-on;
0121 };
0122 };
0123
0124 &can1 {
0125 pinctrl-names = "default";
0126 pinctrl-0 = <&pinctrl_flexcan1>;
0127 status = "okay";
0128 };
0129
0130 &ecspi2 {
0131 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
0132 pinctrl-names = "default";
0133 pinctrl-0 = <&pinctrl_ecspi2>;
0134 status = "okay";
0135 };
0136
0137 &fec {
0138 pinctrl-names = "default";
0139 pinctrl-0 = <&pinctrl_enet>;
0140 phy-mode = "rgmii-id";
0141 status = "okay";
0142 };
0143
0144 &gpmi {
0145 pinctrl-names = "default";
0146 pinctrl-0 = <&pinctrl_gpmi_nand>;
0147 status = "okay";
0148 };
0149
0150 &i2c1 {
0151 clock-frequency = <100000>;
0152 pinctrl-names = "default";
0153 pinctrl-0 = <&pinctrl_i2c1>;
0154 status = "okay";
0155
0156 gsc: gsc@20 {
0157 compatible = "gw,gsc";
0158 reg = <0x20>;
0159 interrupt-parent = <&gpio1>;
0160 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0161 interrupt-controller;
0162 #interrupt-cells = <1>;
0163 #address-cells = <1>;
0164 #size-cells = <0>;
0165
0166 adc {
0167 compatible = "gw,gsc-adc";
0168 #address-cells = <1>;
0169 #size-cells = <0>;
0170
0171 channel@0 {
0172 gw,mode = <0>;
0173 reg = <0x00>;
0174 label = "temp";
0175 };
0176
0177 channel@2 {
0178 gw,mode = <1>;
0179 reg = <0x02>;
0180 label = "vdd_vin";
0181 };
0182
0183 channel@5 {
0184 gw,mode = <1>;
0185 reg = <0x05>;
0186 label = "vdd_3p3";
0187 };
0188
0189 channel@8 {
0190 gw,mode = <1>;
0191 reg = <0x08>;
0192 label = "vdd_bat";
0193 };
0194
0195 channel@b {
0196 gw,mode = <1>;
0197 reg = <0x0b>;
0198 label = "vdd_5p0";
0199 };
0200
0201 channel@e {
0202 gw,mode = <1>;
0203 reg = <0xe>;
0204 label = "vdd_arm";
0205 };
0206
0207 channel@11 {
0208 gw,mode = <1>;
0209 reg = <0x11>;
0210 label = "vdd_soc";
0211 };
0212
0213 channel@14 {
0214 gw,mode = <1>;
0215 reg = <0x14>;
0216 label = "vdd_3p0";
0217 };
0218
0219 channel@17 {
0220 gw,mode = <1>;
0221 reg = <0x17>;
0222 label = "vdd_1p5";
0223 };
0224
0225 channel@1d {
0226 gw,mode = <1>;
0227 reg = <0x1d>;
0228 label = "vdd_1p8";
0229 };
0230
0231 channel@20 {
0232 gw,mode = <1>;
0233 reg = <0x20>;
0234 label = "vdd_1p0";
0235 };
0236
0237 channel@23 {
0238 gw,mode = <1>;
0239 reg = <0x23>;
0240 label = "vdd_2p5";
0241 };
0242 };
0243
0244 fan-controller@a {
0245 compatible = "gw,gsc-fan";
0246 #address-cells = <1>;
0247 #size-cells = <0>;
0248 reg = <0x0a>;
0249 };
0250 };
0251
0252 gsc_gpio: gpio@23 {
0253 compatible = "nxp,pca9555";
0254 reg = <0x23>;
0255 gpio-controller;
0256 #gpio-cells = <2>;
0257 interrupt-parent = <&gsc>;
0258 interrupts = <4>;
0259 };
0260
0261 eeprom@50 {
0262 compatible = "atmel,24c02";
0263 reg = <0x50>;
0264 pagesize = <16>;
0265 };
0266
0267 eeprom@51 {
0268 compatible = "atmel,24c02";
0269 reg = <0x51>;
0270 pagesize = <16>;
0271 };
0272
0273 eeprom@52 {
0274 compatible = "atmel,24c02";
0275 reg = <0x52>;
0276 pagesize = <16>;
0277 };
0278
0279 eeprom@53 {
0280 compatible = "atmel,24c02";
0281 reg = <0x53>;
0282 pagesize = <16>;
0283 };
0284
0285 rtc@68 {
0286 compatible = "dallas,ds1672";
0287 reg = <0x68>;
0288 };
0289 };
0290
0291 &i2c2 {
0292 clock-frequency = <100000>;
0293 pinctrl-names = "default";
0294 pinctrl-0 = <&pinctrl_i2c2>;
0295 status = "okay";
0296 };
0297
0298 &i2c3 {
0299 clock-frequency = <100000>;
0300 pinctrl-names = "default";
0301 pinctrl-0 = <&pinctrl_i2c3>;
0302 status = "okay";
0303
0304 accel@19 {
0305 pinctrl-names = "default";
0306 pinctrl-0 = <&pinctrl_accel>;
0307 compatible = "st,lis2de12";
0308 reg = <0x19>;
0309 st,drdy-int-pin = <1>;
0310 interrupt-parent = <&gpio7>;
0311 interrupts = <13 0>;
0312 interrupt-names = "INT1";
0313 };
0314 };
0315
0316 &pcie {
0317 pinctrl-names = "default";
0318 pinctrl-0 = <&pinctrl_pcie>;
0319 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
0320 status = "okay";
0321 };
0322
0323 &pwm1 {
0324 pinctrl-names = "default";
0325 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
0326 status = "disabled";
0327 };
0328
0329 &pwm2 {
0330 pinctrl-names = "default";
0331 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
0332 status = "disabled";
0333 };
0334
0335 &pwm3 {
0336 pinctrl-names = "default";
0337 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
0338 status = "disabled";
0339 };
0340
0341 &pwm4 {
0342 pinctrl-names = "default";
0343 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
0344 status = "disabled";
0345 };
0346
0347 &uart1 {
0348 pinctrl-names = "default";
0349 pinctrl-0 = <&pinctrl_uart1>;
0350 rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
0351 status = "okay";
0352 };
0353
0354 &uart2 {
0355 pinctrl-names = "default";
0356 pinctrl-0 = <&pinctrl_uart2>;
0357 status = "okay";
0358 };
0359
0360 &uart5 {
0361 pinctrl-names = "default";
0362 pinctrl-0 = <&pinctrl_uart5>;
0363 status = "okay";
0364 };
0365
0366 &usbotg {
0367 vbus-supply = <®_usb_vbus>;
0368 pinctrl-names = "default";
0369 pinctrl-0 = <&pinctrl_usbotg>;
0370 disable-over-current;
0371 dr_mode = "host";
0372 status = "okay";
0373 };
0374
0375 &usbh1 {
0376 vbus-supply = <®_usb_vbus>;
0377 status = "okay";
0378 };
0379
0380 &usdhc3 {
0381 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0382 pinctrl-0 = <&pinctrl_usdhc3>;
0383 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
0384 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
0385 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
0386 vmmc-supply = <®_3p3v>;
0387 no-1-8-v; /* firmware will remove if board revision supports */
0388 status = "okay";
0389 };
0390
0391 &wdog1 {
0392 status = "disabled";
0393 };
0394
0395 &wdog2 {
0396 pinctrl-names = "default";
0397 pinctrl-0 = <&pinctrl_wdog>;
0398 fsl,ext-reset-output;
0399 status = "okay";
0400 };
0401
0402 &iomuxc {
0403 pinctrl_accel: accelmuxgrp {
0404 fsl,pins = <
0405 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
0406 >;
0407 };
0408
0409 pinctrl_enet: enetgrp {
0410 fsl,pins = <
0411 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0412 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0413 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0414 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0415 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0416 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0417 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0418 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0419 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0420 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0421 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0422 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0423 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0424 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0425 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0426 >;
0427 };
0428
0429 pinctrl_ecspi2: escpi2grp {
0430 fsl,pins = <
0431 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
0432 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
0433 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
0434 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
0435 >;
0436 };
0437
0438 pinctrl_flexcan1: flexcan1grp {
0439 fsl,pins = <
0440 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
0441 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
0442 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0
0443 >;
0444 };
0445
0446 pinctrl_gpio_leds: gpioledsgrp {
0447 fsl,pins = <
0448 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
0449 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
0450 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
0451 >;
0452 };
0453
0454 pinctrl_gpmi_nand: gpminandgrp {
0455 fsl,pins = <
0456 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
0457 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
0458 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
0459 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
0460 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
0461 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
0462 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
0463 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
0464 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
0465 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
0466 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
0467 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
0468 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
0469 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
0470 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
0471 >;
0472 };
0473
0474 pinctrl_i2c1: i2c1grp {
0475 fsl,pins = <
0476 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0477 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0478 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
0479 >;
0480 };
0481
0482 pinctrl_i2c2: i2c2grp {
0483 fsl,pins = <
0484 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0485 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0486 >;
0487 };
0488
0489 pinctrl_i2c3: i2c3grp {
0490 fsl,pins = <
0491 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0492 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0493 >;
0494 };
0495
0496 pinctrl_pcie: pciegrp {
0497 fsl,pins = <
0498 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
0499 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
0500 >;
0501 };
0502
0503 pinctrl_pps: ppsgrp {
0504 fsl,pins = <
0505 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1
0506 >;
0507 };
0508
0509 pinctrl_pwm1: pwm1grp {
0510 fsl,pins = <
0511 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
0512 >;
0513 };
0514
0515 pinctrl_pwm2: pwm2grp {
0516 fsl,pins = <
0517 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
0518 >;
0519 };
0520
0521 pinctrl_pwm3: pwm3grp {
0522 fsl,pins = <
0523 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
0524 >;
0525 };
0526
0527 pinctrl_pwm4: pwm4grp {
0528 fsl,pins = <
0529 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
0530 >;
0531 };
0532
0533 pinctrl_uart1: uart1grp {
0534 fsl,pins = <
0535 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
0536 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
0537 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1
0538 >;
0539 };
0540
0541 pinctrl_uart2: uart2grp {
0542 fsl,pins = <
0543 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0544 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0545 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1
0546 >;
0547 };
0548
0549 pinctrl_uart5: uart5grp {
0550 fsl,pins = <
0551 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0552 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0553 >;
0554 };
0555
0556 pinctrl_usbotg: usbotggrp {
0557 fsl,pins = <
0558 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
0559 >;
0560 };
0561
0562 pinctrl_usdhc3: usdhc3grp {
0563 fsl,pins = <
0564 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0565 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0566 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0567 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0568 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0569 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0570 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
0571 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
0572 >;
0573 };
0574
0575 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
0576 fsl,pins = <
0577 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
0578 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
0579 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
0580 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
0581 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
0582 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
0583 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
0584 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
0585 >;
0586 };
0587
0588 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
0589 fsl,pins = <
0590 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
0591 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
0592 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
0593 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
0594 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
0595 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
0596 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
0597 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
0598 >;
0599 };
0600
0601 pinctrl_wdog: wdoggrp {
0602 fsl,pins = <
0603 MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
0604 >;
0605 };
0606 };
