0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Copyright 2019 Gateworks Corporation
0004 */
0005
0006 #include <dt-bindings/gpio/gpio.h>
0007 #include <dt-bindings/input/linux-event-codes.h>
0008 #include <dt-bindings/interrupt-controller/irq.h>
0009
0010 / {
0011 /* these are used by bootloader for disabling nodes */
0012 aliases {
0013 led0 = &led0;
0014 led1 = &led1;
0015 nand = &gpmi;
0016 usb0 = &usbh1;
0017 usb1 = &usbotg;
0018 };
0019
0020 chosen {
0021 stdout-path = &uart2;
0022 };
0023
0024 gpio-keys {
0025 compatible = "gpio-keys";
0026
0027 user-pb {
0028 label = "user_pb";
0029 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
0030 linux,code = <BTN_0>;
0031 };
0032
0033 user-pb1x {
0034 label = "user_pb1x";
0035 linux,code = <BTN_1>;
0036 interrupt-parent = <&gsc>;
0037 interrupts = <0>;
0038 };
0039
0040 key-erased {
0041 label = "key-erased";
0042 linux,code = <BTN_2>;
0043 interrupt-parent = <&gsc>;
0044 interrupts = <1>;
0045 };
0046
0047 eeprom-wp {
0048 label = "eeprom_wp";
0049 linux,code = <BTN_3>;
0050 interrupt-parent = <&gsc>;
0051 interrupts = <2>;
0052 };
0053
0054 tamper {
0055 label = "tamper";
0056 linux,code = <BTN_4>;
0057 interrupt-parent = <&gsc>;
0058 interrupts = <5>;
0059 };
0060
0061 switch-hold {
0062 label = "switch_hold";
0063 linux,code = <BTN_5>;
0064 interrupt-parent = <&gsc>;
0065 interrupts = <7>;
0066 };
0067 };
0068
0069 leds {
0070 compatible = "gpio-leds";
0071 pinctrl-names = "default";
0072 pinctrl-0 = <&pinctrl_gpio_leds>;
0073
0074 led0: user1 {
0075 label = "user1";
0076 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
0077 default-state = "on";
0078 linux,default-trigger = "heartbeat";
0079 };
0080
0081 led1: user2 {
0082 label = "user2";
0083 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
0084 default-state = "off";
0085 };
0086 };
0087
0088 memory@10000000 {
0089 device_type = "memory";
0090 reg = <0x10000000 0x20000000>;
0091 };
0092
0093 pps {
0094 compatible = "pps-gpio";
0095 pinctrl-names = "default";
0096 pinctrl-0 = <&pinctrl_pps>;
0097 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
0098 status = "okay";
0099 };
0100
0101 reg_3p3v: regulator-3p3v {
0102 compatible = "regulator-fixed";
0103 regulator-name = "3P3V";
0104 regulator-min-microvolt = <3300000>;
0105 regulator-max-microvolt = <3300000>;
0106 regulator-always-on;
0107 };
0108
0109 reg_5p0v: regulator-5p0v {
0110 compatible = "regulator-fixed";
0111 regulator-name = "5P0V";
0112 regulator-min-microvolt = <5000000>;
0113 regulator-max-microvolt = <5000000>;
0114 regulator-always-on;
0115 };
0116
0117 reg_usb_otg_vbus: regulator-usb-otg-vbus {
0118 compatible = "regulator-fixed";
0119 regulator-name = "usb_otg_vbus";
0120 regulator-min-microvolt = <5000000>;
0121 regulator-max-microvolt = <5000000>;
0122 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0123 enable-active-high;
0124 };
0125 };
0126
0127 &fec {
0128 pinctrl-names = "default";
0129 pinctrl-0 = <&pinctrl_enet>;
0130 phy-mode = "rgmii-id";
0131 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
0132 status = "okay";
0133 };
0134
0135 &gpmi {
0136 pinctrl-names = "default";
0137 pinctrl-0 = <&pinctrl_gpmi_nand>;
0138 status = "okay";
0139 };
0140
0141 &hdmi {
0142 ddc-i2c-bus = <&i2c3>;
0143 status = "okay";
0144 };
0145
0146 &i2c1 {
0147 clock-frequency = <100000>;
0148 pinctrl-names = "default";
0149 pinctrl-0 = <&pinctrl_i2c1>;
0150 status = "okay";
0151
0152 gsc: gsc@20 {
0153 compatible = "gw,gsc";
0154 reg = <0x20>;
0155 interrupt-parent = <&gpio1>;
0156 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0157 interrupt-controller;
0158 #interrupt-cells = <1>;
0159 #size-cells = <0>;
0160
0161 adc {
0162 compatible = "gw,gsc-adc";
0163 #address-cells = <1>;
0164 #size-cells = <0>;
0165
0166 channel@0 {
0167 gw,mode = <0>;
0168 reg = <0x00>;
0169 label = "temp";
0170 };
0171
0172 channel@2 {
0173 gw,mode = <1>;
0174 reg = <0x02>;
0175 label = "vdd_vin";
0176 };
0177
0178 channel@5 {
0179 gw,mode = <1>;
0180 reg = <0x05>;
0181 label = "vdd_3p3";
0182 };
0183
0184 channel@8 {
0185 gw,mode = <1>;
0186 reg = <0x08>;
0187 label = "vdd_bat";
0188 };
0189
0190 channel@b {
0191 gw,mode = <1>;
0192 reg = <0x0b>;
0193 label = "vdd_5p0";
0194 };
0195
0196 channel@e {
0197 gw,mode = <1>;
0198 reg = <0xe>;
0199 label = "vdd_arm";
0200 };
0201
0202 channel@11 {
0203 gw,mode = <1>;
0204 reg = <0x11>;
0205 label = "vdd_soc";
0206 };
0207
0208 channel@14 {
0209 gw,mode = <1>;
0210 reg = <0x14>;
0211 label = "vdd_3p0";
0212 };
0213
0214 channel@17 {
0215 gw,mode = <1>;
0216 reg = <0x17>;
0217 label = "vdd_1p5";
0218 };
0219
0220 channel@1d {
0221 gw,mode = <1>;
0222 reg = <0x1d>;
0223 label = "vdd_1p8";
0224 };
0225
0226 channel@20 {
0227 gw,mode = <1>;
0228 reg = <0x20>;
0229 label = "vdd_an1";
0230 };
0231
0232 channel@23 {
0233 gw,mode = <1>;
0234 reg = <0x23>;
0235 label = "vdd_2p5";
0236 };
0237 };
0238 };
0239
0240 gsc_gpio: gpio@23 {
0241 compatible = "nxp,pca9555";
0242 reg = <0x23>;
0243 gpio-controller;
0244 #gpio-cells = <2>;
0245 interrupt-parent = <&gsc>;
0246 interrupts = <4>;
0247 };
0248
0249 eeprom@50 {
0250 compatible = "atmel,24c02";
0251 reg = <0x50>;
0252 pagesize = <16>;
0253 };
0254
0255 eeprom@51 {
0256 compatible = "atmel,24c02";
0257 reg = <0x51>;
0258 pagesize = <16>;
0259 };
0260
0261 eeprom@52 {
0262 compatible = "atmel,24c02";
0263 reg = <0x52>;
0264 pagesize = <16>;
0265 };
0266
0267 eeprom@53 {
0268 compatible = "atmel,24c02";
0269 reg = <0x53>;
0270 pagesize = <16>;
0271 };
0272
0273 ds1672@68 {
0274 compatible = "dallas,ds1672";
0275 reg = <0x68>;
0276 };
0277 };
0278
0279 &i2c2 {
0280 clock-frequency = <100000>;
0281 pinctrl-names = "default";
0282 pinctrl-0 = <&pinctrl_i2c2>;
0283 status = "okay";
0284 };
0285
0286 &i2c3 {
0287 clock-frequency = <100000>;
0288 pinctrl-names = "default";
0289 pinctrl-0 = <&pinctrl_i2c3>;
0290 status = "okay";
0291
0292 gpio@20 {
0293 compatible = "nxp,pca9555";
0294 reg = <0x20>;
0295 gpio-controller;
0296 #gpio-cells = <2>;
0297 };
0298
0299 adc@48 {
0300 compatible = "ti,ads1015";
0301 reg = <0x48>;
0302 #address-cells = <1>;
0303 #size-cells = <0>;
0304
0305 channel@4 {
0306 reg = <4>;
0307 ti,gain = <0>;
0308 ti,datarate = <5>;
0309 };
0310
0311 channel@5 {
0312 reg = <5>;
0313 ti,gain = <0>;
0314 ti,datarate = <5>;
0315 };
0316
0317 channel@6 {
0318 reg = <6>;
0319 ti,gain = <0>;
0320 ti,datarate = <5>;
0321 };
0322 };
0323 };
0324
0325 &pcie {
0326 pinctrl-names = "default";
0327 pinctrl-0 = <&pinctrl_pcie>;
0328 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
0329 status = "okay";
0330 };
0331
0332 &pwm2 {
0333 pinctrl-names = "default";
0334 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
0335 status = "disabled";
0336 };
0337
0338 &pwm3 {
0339 pinctrl-names = "default";
0340 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
0341 status = "disabled";
0342 };
0343
0344 &pwm4 {
0345 pinctrl-names = "default";
0346 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
0347 status = "disabled";
0348 };
0349
0350 &uart1 {
0351 pinctrl-names = "default";
0352 pinctrl-0 = <&pinctrl_uart1>;
0353 status = "okay";
0354 };
0355
0356 &uart2 {
0357 pinctrl-names = "default";
0358 pinctrl-0 = <&pinctrl_uart2>;
0359 status = "okay";
0360 };
0361
0362 &uart3 {
0363 pinctrl-names = "default";
0364 pinctrl-0 = <&pinctrl_uart3>;
0365 status = "okay";
0366 };
0367
0368 &uart5 {
0369 pinctrl-names = "default";
0370 pinctrl-0 = <&pinctrl_uart5>;
0371 status = "okay";
0372 };
0373
0374 &usbotg {
0375 vbus-supply = <®_usb_otg_vbus>;
0376 pinctrl-names = "default";
0377 pinctrl-0 = <&pinctrl_usbotg>;
0378 disable-over-current;
0379 status = "okay";
0380 };
0381
0382 &usbh1 {
0383 status = "okay";
0384 };
0385
0386 &wdog1 {
0387 pinctrl-names = "default";
0388 pinctrl-0 = <&pinctrl_wdog>;
0389 fsl,ext-reset-output;
0390 };
0391
0392 &iomuxc {
0393 pinctrl_enet: enetgrp {
0394 fsl,pins = <
0395 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
0396 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
0397 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
0398 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
0399 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
0400 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
0401 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
0402 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
0403 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
0404 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
0405 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
0406 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
0407 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0408 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0409 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0410 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0411 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
0412 >;
0413 };
0414
0415 pinctrl_gpio_leds: gpioledsgrp {
0416 fsl,pins = <
0417 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
0418 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
0419 >;
0420 };
0421
0422 pinctrl_gpmi_nand: gpminandgrp {
0423 fsl,pins = <
0424 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
0425 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
0426 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
0427 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
0428 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
0429 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
0430 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
0431 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
0432 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
0433 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
0434 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
0435 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
0436 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
0437 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
0438 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
0439 >;
0440 };
0441
0442 pinctrl_i2c1: i2c1grp {
0443 fsl,pins = <
0444 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0445 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0446 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0
0447 >;
0448 };
0449
0450 pinctrl_i2c2: i2c2grp {
0451 fsl,pins = <
0452 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0453 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0454 >;
0455 };
0456
0457 pinctrl_i2c3: i2c3grp {
0458 fsl,pins = <
0459 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0460 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0461 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
0462 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
0463 >;
0464 };
0465
0466 pinctrl_pcie: pciegrp {
0467 fsl,pins = <
0468 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
0469 >;
0470 };
0471
0472 pinctrl_pps: ppsgrp {
0473 fsl,pins = <
0474 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
0475 >;
0476 };
0477
0478 pinctrl_pwm2: pwm2grp {
0479 fsl,pins = <
0480 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
0481 >;
0482 };
0483
0484 pinctrl_pwm3: pwm3grp {
0485 fsl,pins = <
0486 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
0487 >;
0488 };
0489
0490 pinctrl_pwm4: pwm4grp {
0491 fsl,pins = <
0492 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
0493 >;
0494 };
0495
0496 pinctrl_uart1: uart1grp {
0497 fsl,pins = <
0498 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
0499 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
0500 >;
0501 };
0502
0503 pinctrl_uart2: uart2grp {
0504 fsl,pins = <
0505 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0506 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0507 >;
0508 };
0509
0510 pinctrl_uart3: uart3grp {
0511 fsl,pins = <
0512 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0513 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0514 >;
0515 };
0516
0517 pinctrl_uart5: uart5grp {
0518 fsl,pins = <
0519 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0520 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0521 >;
0522 };
0523
0524 pinctrl_usbotg: usbotggrp {
0525 fsl,pins = <
0526 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0527 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
0528 >;
0529 };
0530
0531 pinctrl_wdog: wdoggrp {
0532 fsl,pins = <
0533 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
0534 >;
0535 };
0536 };
