0001 /*
0002 * Copyright 2017 Gateworks Corporation
0003 *
0004 * This file is dual-licensed: you can use it either under the terms
0005 * of the GPL or the X11 license, at your option. Note that this dual
0006 * licensing only applies to this file, and not this project as a
0007 * whole.
0008 *
0009 * a) This file is free software; you can redistribute it and/or
0010 * modify it under the terms of the GNU General Public License as
0011 * published by the Free Software Foundation; either version 2 of
0012 * the License, or (at your option) any later version.
0013 *
0014 * This file is distributed in the hope that it will be useful,
0015 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0016 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0017 * GNU General Public License for more details.
0018 *
0019 * You should have received a copy of the GNU General Public
0020 * License along with this file; if not, write to the Free
0021 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
0022 * MA 02110-1301 USA
0023 *
0024 * Or, alternatively,
0025 *
0026 * b) Permission is hereby granted, free of charge, to any person
0027 * obtaining a copy of this software and associated documentation
0028 * files (the "Software"), to deal in the Software without
0029 * restriction, including without limitation the rights to use,
0030 * copy, modify, merge, publish, distribute, sublicense, and/or
0031 * sell copies of the Software, and to permit persons to whom the
0032 * Software is furnished to do so, subject to the following
0033 * conditions:
0034 *
0035 * The above copyright notice and this permission notice shall be
0036 * included in all copies or substantial portions of the Software.
0037 *
0038 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0039 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0040 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0041 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0042 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0043 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0044 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0045 * OTHER DEALINGS IN THE SOFTWARE.
0046 */
0047
0048 #include <dt-bindings/gpio/gpio.h>
0049 #include <dt-bindings/input/linux-event-codes.h>
0050 #include <dt-bindings/interrupt-controller/irq.h>
0051
0052 / {
0053 /* these are used by bootloader for disabling nodes */
0054 aliases {
0055 led0 = &led0;
0056 led1 = &led1;
0057 led2 = &led2;
0058 usb0 = &usbh1;
0059 usb1 = &usbotg;
0060 };
0061
0062 chosen {
0063 stdout-path = &uart2;
0064 };
0065
0066 backlight {
0067 compatible = "pwm-backlight";
0068 pwms = <&pwm4 0 5000000>;
0069 brightness-levels = <0 4 8 16 32 64 128 255>;
0070 default-brightness-level = <7>;
0071 };
0072
0073 gpio-keys {
0074 compatible = "gpio-keys";
0075
0076 user-pb {
0077 label = "user_pb";
0078 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
0079 linux,code = <BTN_0>;
0080 };
0081
0082 user-pb1x {
0083 label = "user_pb1x";
0084 linux,code = <BTN_1>;
0085 interrupt-parent = <&gsc>;
0086 interrupts = <0>;
0087 };
0088
0089 key-erased {
0090 label = "key-erased";
0091 linux,code = <BTN_2>;
0092 interrupt-parent = <&gsc>;
0093 interrupts = <1>;
0094 };
0095
0096 eeprom-wp {
0097 label = "eeprom_wp";
0098 linux,code = <BTN_3>;
0099 interrupt-parent = <&gsc>;
0100 interrupts = <2>;
0101 };
0102
0103 tamper {
0104 label = "tamper";
0105 linux,code = <BTN_4>;
0106 interrupt-parent = <&gsc>;
0107 interrupts = <5>;
0108 };
0109
0110 switch-hold {
0111 label = "switch_hold";
0112 linux,code = <BTN_5>;
0113 interrupt-parent = <&gsc>;
0114 interrupts = <7>;
0115 };
0116 };
0117
0118 leds {
0119 compatible = "gpio-leds";
0120 pinctrl-names = "default";
0121 pinctrl-0 = <&pinctrl_gpio_leds>;
0122
0123 led0: user1 {
0124 label = "user1";
0125 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
0126 default-state = "on";
0127 linux,default-trigger = "heartbeat";
0128 };
0129
0130 led1: user2 {
0131 label = "user2";
0132 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
0133 default-state = "off";
0134 };
0135
0136 led2: user3 {
0137 label = "user3";
0138 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
0139 default-state = "off";
0140 };
0141 };
0142
0143 memory@10000000 {
0144 device_type = "memory";
0145 reg = <0x10000000 0x40000000>;
0146 };
0147
0148 pps {
0149 compatible = "pps-gpio";
0150 pinctrl-names = "default";
0151 pinctrl-0 = <&pinctrl_pps>;
0152 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
0153 };
0154
0155 reg_1p0v: regulator-1p0v {
0156 compatible = "regulator-fixed";
0157 regulator-name = "1P0V";
0158 regulator-min-microvolt = <1000000>;
0159 regulator-max-microvolt = <1000000>;
0160 regulator-always-on;
0161 };
0162
0163 reg_3p3v: regulator-3p3v {
0164 compatible = "regulator-fixed";
0165 regulator-name = "3P3V";
0166 regulator-min-microvolt = <3300000>;
0167 regulator-max-microvolt = <3300000>;
0168 regulator-always-on;
0169 };
0170
0171 reg_usb_h1_vbus: regulator-usb-h1-vbus {
0172 compatible = "regulator-fixed";
0173 regulator-name = "usb_h1_vbus";
0174 regulator-min-microvolt = <5000000>;
0175 regulator-max-microvolt = <5000000>;
0176 regulator-always-on;
0177 };
0178
0179 reg_usb_otg_vbus: regulator-usb-otg-vbus {
0180 compatible = "regulator-fixed";
0181 regulator-name = "usb_otg_vbus";
0182 regulator-min-microvolt = <5000000>;
0183 regulator-max-microvolt = <5000000>;
0184 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0185 enable-active-high;
0186 };
0187 };
0188
0189 &clks {
0190 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
0191 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
0192 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
0193 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
0194 };
0195
0196 &fec {
0197 pinctrl-names = "default";
0198 pinctrl-0 = <&pinctrl_enet>;
0199 phy-mode = "rgmii-id";
0200 status = "okay";
0201
0202 fixed-link {
0203 speed = <1000>;
0204 full-duplex;
0205 };
0206
0207 mdio {
0208 #address-cells = <1>;
0209 #size-cells = <0>;
0210
0211 switch@0 {
0212 compatible = "marvell,mv88e6085";
0213 reg = <0>;
0214
0215 ports {
0216 #address-cells = <1>;
0217 #size-cells = <0>;
0218
0219 port@0 {
0220 reg = <0>;
0221 label = "lan4";
0222 };
0223
0224 port@1 {
0225 reg = <1>;
0226 label = "lan3";
0227 };
0228
0229 port@2 {
0230 reg = <2>;
0231 label = "lan2";
0232 };
0233
0234 port@3 {
0235 reg = <3>;
0236 label = "lan1";
0237 };
0238
0239 port@5 {
0240 reg = <5>;
0241 label = "cpu";
0242 ethernet = <&fec>;
0243 };
0244 };
0245 };
0246 };
0247 };
0248
0249 &i2c1 {
0250 clock-frequency = <100000>;
0251 pinctrl-names = "default";
0252 pinctrl-0 = <&pinctrl_i2c1>;
0253 status = "okay";
0254
0255 gsc: gsc@20 {
0256 compatible = "gw,gsc";
0257 reg = <0x20>;
0258 interrupt-parent = <&gpio1>;
0259 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0260 interrupt-controller;
0261 #interrupt-cells = <1>;
0262 #size-cells = <0>;
0263
0264 adc {
0265 compatible = "gw,gsc-adc";
0266 #address-cells = <1>;
0267 #size-cells = <0>;
0268
0269 channel@0 {
0270 gw,mode = <0>;
0271 reg = <0x00>;
0272 label = "temp";
0273 };
0274
0275 channel@2 {
0276 gw,mode = <1>;
0277 reg = <0x02>;
0278 label = "vdd_vin";
0279 };
0280
0281 channel@5 {
0282 gw,mode = <1>;
0283 reg = <0x05>;
0284 label = "vdd_3p3";
0285 };
0286
0287 channel@8 {
0288 gw,mode = <1>;
0289 reg = <0x08>;
0290 label = "vdd_bat";
0291 };
0292
0293 channel@b {
0294 gw,mode = <1>;
0295 reg = <0x0b>;
0296 label = "vdd_5p0";
0297 };
0298
0299 channel@e {
0300 gw,mode = <1>;
0301 reg = <0xe>;
0302 label = "vdd_arm";
0303 };
0304
0305 channel@11 {
0306 gw,mode = <1>;
0307 reg = <0x11>;
0308 label = "vdd_soc";
0309 };
0310
0311 channel@14 {
0312 gw,mode = <1>;
0313 reg = <0x14>;
0314 label = "vdd_3p0";
0315 };
0316
0317 channel@17 {
0318 gw,mode = <1>;
0319 reg = <0x17>;
0320 label = "vdd_1p5";
0321 };
0322
0323 channel@1d {
0324 gw,mode = <1>;
0325 reg = <0x1d>;
0326 label = "vdd_1p8";
0327 };
0328
0329 channel@20 {
0330 gw,mode = <1>;
0331 reg = <0x20>;
0332 label = "vdd_an1";
0333 };
0334
0335 channel@23 {
0336 gw,mode = <1>;
0337 reg = <0x23>;
0338 label = "vdd_2p5";
0339 };
0340 };
0341 };
0342
0343 gsc_gpio: gpio@23 {
0344 compatible = "nxp,pca9555";
0345 reg = <0x23>;
0346 gpio-controller;
0347 #gpio-cells = <2>;
0348 interrupt-parent = <&gsc>;
0349 interrupts = <4>;
0350 };
0351
0352 eeprom1: eeprom@50 {
0353 compatible = "atmel,24c02";
0354 reg = <0x50>;
0355 pagesize = <16>;
0356 };
0357
0358 eeprom2: eeprom@51 {
0359 compatible = "atmel,24c02";
0360 reg = <0x51>;
0361 pagesize = <16>;
0362 };
0363
0364 eeprom3: eeprom@52 {
0365 compatible = "atmel,24c02";
0366 reg = <0x52>;
0367 pagesize = <16>;
0368 };
0369
0370 eeprom4: eeprom@53 {
0371 compatible = "atmel,24c02";
0372 reg = <0x53>;
0373 pagesize = <16>;
0374 };
0375
0376 dts1672: rtc@68 {
0377 compatible = "dallas,ds1672";
0378 reg = <0x68>;
0379 };
0380 };
0381
0382 &i2c2 {
0383 clock-frequency = <100000>;
0384 pinctrl-names = "default";
0385 pinctrl-0 = <&pinctrl_i2c2>;
0386 status = "okay";
0387
0388 magn@1c {
0389 compatible = "st,lsm9ds1-magn";
0390 reg = <0x1c>;
0391 pinctrl-names = "default";
0392 pinctrl-0 = <&pinctrl_mag>;
0393 interrupt-parent = <&gpio5>;
0394 interrupts = <17 IRQ_TYPE_EDGE_RISING>;
0395 };
0396
0397 ltc3676: pmic@3c {
0398 compatible = "lltc,ltc3676";
0399 reg = <0x3c>;
0400 interrupt-parent = <&gpio1>;
0401 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
0402
0403 regulators {
0404 /* VDD_SOC (1+R1/R2 = 1.635) */
0405 reg_vdd_soc: sw1 {
0406 regulator-name = "vddsoc";
0407 regulator-min-microvolt = <674400>;
0408 regulator-max-microvolt = <1308000>;
0409 lltc,fb-voltage-divider = <127000 200000>;
0410 regulator-ramp-delay = <7000>;
0411 regulator-boot-on;
0412 regulator-always-on;
0413 };
0414
0415 /* VDD_1P8 (1+R1/R2 = 2.505): GbE switch */
0416 reg_1p8v: sw2 {
0417 regulator-name = "vdd1p8";
0418 regulator-min-microvolt = <1033310>;
0419 regulator-max-microvolt = <2004000>;
0420 lltc,fb-voltage-divider = <301000 200000>;
0421 regulator-ramp-delay = <7000>;
0422 regulator-boot-on;
0423 regulator-always-on;
0424 };
0425
0426 /* VDD_ARM (1+R1/R2 = 1.635) */
0427 reg_vdd_arm: sw3 {
0428 regulator-name = "vddarm";
0429 regulator-min-microvolt = <674400>;
0430 regulator-max-microvolt = <1308000>;
0431 lltc,fb-voltage-divider = <127000 200000>;
0432 regulator-ramp-delay = <7000>;
0433 regulator-boot-on;
0434 regulator-always-on;
0435 };
0436
0437 /* VDD_DDR (1+R1/R2 = 2.105) */
0438 reg_vdd_ddr: sw4 {
0439 regulator-name = "vddddr";
0440 regulator-min-microvolt = <868310>;
0441 regulator-max-microvolt = <1684000>;
0442 lltc,fb-voltage-divider = <221000 200000>;
0443 regulator-ramp-delay = <7000>;
0444 regulator-boot-on;
0445 regulator-always-on;
0446 };
0447
0448 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
0449 reg_2p5v: ldo2 {
0450 regulator-name = "vdd2p5";
0451 regulator-min-microvolt = <2490375>;
0452 regulator-max-microvolt = <2490375>;
0453 lltc,fb-voltage-divider = <487000 200000>;
0454 regulator-boot-on;
0455 regulator-always-on;
0456 };
0457
0458 /* VDD_HIGH (1+R1/R2 = 4.17) */
0459 reg_3p0v: ldo4 {
0460 regulator-name = "vdd3p0";
0461 regulator-min-microvolt = <3023250>;
0462 regulator-max-microvolt = <3023250>;
0463 lltc,fb-voltage-divider = <634000 200000>;
0464 regulator-boot-on;
0465 regulator-always-on;
0466 };
0467 };
0468 };
0469
0470 crypto@60 {
0471 compatible = "atmel,atecc508a";
0472 reg = <0x60>;
0473 };
0474
0475 imu@6a {
0476 compatible = "st,lsm9ds1-imu";
0477 reg = <0x6a>;
0478 st,drdy-int-pin = <1>;
0479 pinctrl-names = "default";
0480 pinctrl-0 = <&pinctrl_imu>;
0481 interrupt-parent = <&gpio4>;
0482 interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
0483 };
0484 };
0485
0486 &i2c3 {
0487 clock-frequency = <100000>;
0488 pinctrl-names = "default";
0489 pinctrl-0 = <&pinctrl_i2c3>;
0490 status = "okay";
0491
0492 egalax_ts: touchscreen@4 {
0493 compatible = "eeti,egalax_ts";
0494 reg = <0x04>;
0495 interrupt-parent = <&gpio1>;
0496 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
0497 wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
0498 };
0499 };
0500
0501 &ldb {
0502 status = "okay";
0503
0504 lvds-channel@0 {
0505 fsl,data-mapping = "spwg";
0506 fsl,data-width = <18>;
0507 status = "okay";
0508
0509 display-timings {
0510 native-mode = <&timing0>;
0511 timing0: hsd100pxn1 {
0512 clock-frequency = <65000000>;
0513 hactive = <1024>;
0514 vactive = <768>;
0515 hback-porch = <220>;
0516 hfront-porch = <40>;
0517 vback-porch = <21>;
0518 vfront-porch = <7>;
0519 hsync-len = <60>;
0520 vsync-len = <10>;
0521 };
0522 };
0523 };
0524 };
0525
0526 &pcie {
0527 pinctrl-names = "default";
0528 pinctrl-0 = <&pinctrl_pcie>;
0529 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
0530 status = "okay";
0531 };
0532
0533 &pwm2 {
0534 pinctrl-names = "default";
0535 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
0536 status = "disabled";
0537 };
0538
0539 &pwm3 {
0540 pinctrl-names = "default";
0541 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
0542 status = "disabled";
0543 };
0544
0545 &pwm4 {
0546 #pwm-cells = <2>;
0547 pinctrl-names = "default";
0548 pinctrl-0 = <&pinctrl_pwm4>;
0549 status = "okay";
0550 };
0551
0552 &uart1 {
0553 pinctrl-names = "default";
0554 pinctrl-0 = <&pinctrl_uart1>;
0555 status = "okay";
0556 };
0557
0558 &uart2 {
0559 pinctrl-names = "default";
0560 pinctrl-0 = <&pinctrl_uart2>;
0561 status = "okay";
0562 };
0563
0564 &uart3 {
0565 pinctrl-names = "default";
0566 pinctrl-0 = <&pinctrl_uart3>;
0567 uart-has-rtscts;
0568 status = "okay";
0569 };
0570
0571 &uart4 {
0572 pinctrl-names = "default";
0573 pinctrl-0 = <&pinctrl_uart4>;
0574 uart-has-rtscts;
0575 status = "okay";
0576 };
0577
0578 &uart5 {
0579 pinctrl-names = "default";
0580 pinctrl-0 = <&pinctrl_uart5>;
0581 status = "okay";
0582 };
0583
0584 &usbotg {
0585 vbus-supply = <®_usb_otg_vbus>;
0586 pinctrl-names = "default";
0587 pinctrl-0 = <&pinctrl_usbotg>;
0588 disable-over-current;
0589 status = "okay";
0590 };
0591
0592 &usbh1 {
0593 vbus-supply = <®_usb_h1_vbus>;
0594 status = "okay";
0595 };
0596
0597 &usdhc3 {
0598 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0599 pinctrl-0 = <&pinctrl_usdhc3>;
0600 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
0601 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
0602 non-removable;
0603 vmmc-supply = <®_3p3v>;
0604 keep-power-in-suspend;
0605 status = "okay";
0606 };
0607
0608 &wdog1 {
0609 pinctrl-names = "default";
0610 pinctrl-0 = <&pinctrl_wdog>;
0611 fsl,ext-reset-output;
0612 };
0613
0614 &iomuxc {
0615 pinctrl_enet: enetgrp {
0616 fsl,pins = <
0617 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0618 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0619 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0620 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0621 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0622 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0623 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0624 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0625 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0626 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0627 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0628 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0629 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0630 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0631 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0632 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0633 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
0634 >;
0635 };
0636
0637 pinctrl_gpio_leds: gpioledsgrp {
0638 fsl,pins = <
0639 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
0640 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
0641 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
0642 >;
0643 };
0644
0645 pinctrl_i2c1: i2c1grp {
0646 fsl,pins = <
0647 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0648 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0649 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
0650 >;
0651 };
0652
0653 pinctrl_i2c2: i2c2grp {
0654 fsl,pins = <
0655 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0656 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0657 >;
0658 };
0659
0660 pinctrl_i2c3: i2c3grp {
0661 fsl,pins = <
0662 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0663 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0664 >;
0665 };
0666
0667 pinctrl_imu: imugrp {
0668 fsl,pins = <
0669 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
0670 >;
0671 };
0672
0673 pinctrl_mag: maggrp {
0674 fsl,pins = <
0675 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0
0676 >;
0677 };
0678
0679 pinctrl_pcie: pciegrp {
0680 fsl,pins = <
0681 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
0682 >;
0683 };
0684
0685 pinctrl_pmic: pmicgrp {
0686 fsl,pins = <
0687 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */
0688 >;
0689 };
0690
0691 pinctrl_pps: ppsgrp {
0692 fsl,pins = <
0693 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
0694 >;
0695 };
0696
0697 pinctrl_pwm2: pwm2grp {
0698 fsl,pins = <
0699 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
0700 >;
0701 };
0702
0703 pinctrl_pwm3: pwm3grp {
0704 fsl,pins = <
0705 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
0706 >;
0707 };
0708
0709 pinctrl_pwm4: pwm4grp {
0710 fsl,pins = <
0711 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
0712 >;
0713 };
0714
0715 pinctrl_uart1: uart1grp {
0716 fsl,pins = <
0717 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0718 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0719 >;
0720 };
0721
0722 pinctrl_uart2: uart2grp {
0723 fsl,pins = <
0724 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0725 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0726 >;
0727 };
0728
0729 pinctrl_uart3: uart3grp {
0730 fsl,pins = <
0731 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
0732 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0733 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0734 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
0735 >;
0736 };
0737
0738 pinctrl_uart4: uart4grp {
0739 fsl,pins = <
0740 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
0741 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
0742 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
0743 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
0744 >;
0745 };
0746
0747 pinctrl_uart5: uart5grp {
0748 fsl,pins = <
0749 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0750 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0751 >;
0752 };
0753
0754 pinctrl_usbotg: usbotggrp {
0755 fsl,pins = <
0756 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0757 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
0758 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
0759 >;
0760 };
0761
0762 pinctrl_usdhc3: usdhc3grp {
0763 fsl,pins = <
0764 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0765 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0766 MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
0767 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0768 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0769 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0770 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0771 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
0772 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
0773 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
0774 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
0775 >;
0776 };
0777
0778 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
0779 fsl,pins = <
0780 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
0781 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
0782 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
0783 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
0784 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
0785 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
0786 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
0787 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
0788 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
0789 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
0790 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
0791 >;
0792 };
0793
0794 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
0795 fsl,pins = <
0796 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
0797 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
0798 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
0799 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
0800 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
0801 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
0802 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
0803 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
0804 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
0805 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
0806 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
0807 >;
0808 };
0809
0810 pinctrl_wdog: wdoggrp {
0811 fsl,pins = <
0812 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
0813 >;
0814 };
0815 };