0001 /*
0002 * Copyright 2017 Gateworks Corporation
0003 *
0004 * This file is dual-licensed: you can use it either under the terms
0005 * of the GPL or the X11 license, at your option. Note that this dual
0006 * licensing only applies to this file, and not this project as a
0007 * whole.
0008 *
0009 * a) This file is free software; you can redistribute it and/or
0010 * modify it under the terms of the GNU General Public License as
0011 * published by the Free Software Foundation; either version 2 of
0012 * the License, or (at your option) any later version.
0013 *
0014 * This file is distributed in the hope that it will be useful,
0015 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0016 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0017 * GNU General Public License for more details.
0018 *
0019 * You should have received a copy of the GNU General Public
0020 * License along with this file; if not, write to the Free
0021 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
0022 * MA 02110-1301 USA
0023 *
0024 * Or, alternatively,
0025 *
0026 * b) Permission is hereby granted, free of charge, to any person
0027 * obtaining a copy of this software and associated documentation
0028 * files (the "Software"), to deal in the Software without
0029 * restriction, including without limitation the rights to use,
0030 * copy, modify, merge, publish, distribute, sublicense, and/or
0031 * sell copies of the Software, and to permit persons to whom the
0032 * Software is furnished to do so, subject to the following
0033 * conditions:
0034 *
0035 * The above copyright notice and this permission notice shall be
0036 * included in all copies or substantial portions of the Software.
0037 *
0038 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0039 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0040 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0041 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0042 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0043 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0044 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0045 * OTHER DEALINGS IN THE SOFTWARE.
0046 */
0047
0048 #include <dt-bindings/gpio/gpio.h>
0049 #include <dt-bindings/input/linux-event-codes.h>
0050 #include <dt-bindings/interrupt-controller/irq.h>
0051
0052 / {
0053 chosen {
0054 stdout-path = &uart2;
0055 };
0056
0057 backlight {
0058 compatible = "pwm-backlight";
0059 pwms = <&pwm1 0 5000000>;
0060 brightness-levels = <
0061 0 1 2 3 4 5 6 7 8 9
0062 10 11 12 13 14 15 16 17 18 19
0063 20 21 22 23 24 25 26 27 28 29
0064 30 31 32 33 34 35 36 37 38 39
0065 40 41 42 43 44 45 46 47 48 49
0066 50 51 52 53 54 55 56 57 58 59
0067 60 61 62 63 64 65 66 67 68 69
0068 70 71 72 73 74 75 76 77 78 79
0069 80 81 82 83 84 85 86 87 88 89
0070 90 91 92 93 94 95 96 97 98 99
0071 100
0072 >;
0073 default-brightness-level = <100>;
0074 };
0075
0076 gpio-keys {
0077 compatible = "gpio-keys";
0078
0079 user-pb {
0080 label = "user_pb";
0081 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
0082 linux,code = <BTN_0>;
0083 };
0084
0085 user-pb1x {
0086 label = "user_pb1x";
0087 linux,code = <BTN_1>;
0088 interrupt-parent = <&gsc>;
0089 interrupts = <0>;
0090 };
0091
0092 key-erased {
0093 label = "key-erased";
0094 linux,code = <BTN_2>;
0095 interrupt-parent = <&gsc>;
0096 interrupts = <1>;
0097 };
0098
0099 eeprom-wp {
0100 label = "eeprom_wp";
0101 linux,code = <BTN_3>;
0102 interrupt-parent = <&gsc>;
0103 interrupts = <2>;
0104 };
0105
0106 tamper {
0107 label = "tamper";
0108 linux,code = <BTN_4>;
0109 interrupt-parent = <&gsc>;
0110 interrupts = <5>;
0111 };
0112
0113 switch-hold {
0114 label = "switch_hold";
0115 linux,code = <BTN_5>;
0116 interrupt-parent = <&gsc>;
0117 interrupts = <7>;
0118 };
0119 };
0120
0121 leds {
0122 compatible = "gpio-leds";
0123 pinctrl-names = "default";
0124 pinctrl-0 = <&pinctrl_gpio_leds>;
0125
0126 led0: user1 {
0127 label = "user1";
0128 gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
0129 default-state = "off";
0130 };
0131 };
0132
0133 memory@10000000 {
0134 device_type = "memory";
0135 reg = <0x10000000 0x40000000>;
0136 };
0137
0138 reg_5p0v: regulator-5p0v {
0139 compatible = "regulator-fixed";
0140 regulator-name = "5P0V";
0141 regulator-min-microvolt = <5000000>;
0142 regulator-max-microvolt = <5000000>;
0143 regulator-always-on;
0144 };
0145
0146 reg_3p3v: regulator-3p3v {
0147 compatible = "regulator-fixed";
0148 regulator-name = "3P3V";
0149 regulator-min-microvolt = <3300000>;
0150 regulator-max-microvolt = <3300000>;
0151 regulator-always-on;
0152 };
0153
0154 reg_2p5v: regulator-2p5v {
0155 compatible = "regulator-fixed";
0156 regulator-name = "2P5V";
0157 regulator-min-microvolt = <2500000>;
0158 regulator-max-microvolt = <2500000>;
0159 regulator-always-on;
0160 };
0161
0162 reg_usb_h1_vbus: regulator-usb-h1-vbus {
0163 compatible = "regulator-fixed";
0164 regulator-name = "usb_h1_vbus";
0165 regulator-min-microvolt = <5000000>;
0166 regulator-max-microvolt = <5000000>;
0167 gpio = <&gpio3 30 0>;
0168 enable-active-high;
0169 };
0170
0171 reg_usb_otg_vbus: regulator-usb-otg-vbus {
0172 compatible = "regulator-fixed";
0173 regulator-name = "usb_otg_vbus";
0174 regulator-min-microvolt = <5000000>;
0175 regulator-max-microvolt = <5000000>;
0176 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
0177 enable-active-high;
0178 };
0179
0180 reg_12p0: regulator-12p0v {
0181 compatible = "regulator-fixed";
0182 regulator-name = "12P0V";
0183 regulator-min-microvolt = <12000000>;
0184 regulator-max-microvolt = <12000000>;
0185 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
0186 enable-active-high;
0187 };
0188
0189 sound {
0190 compatible = "fsl,imx-audio-tlv320";
0191 model = "imx-tlv320";
0192 ssi-controller = <&ssi1>;
0193 audio-codec = <&tlv320aic3105>;
0194 /* routing of sink, source */
0195 audio-routing =
0196 /* TLV320 LINE1L pin <-> Mic Jack connector */
0197 "LINE1L", "Mic Jack",
0198 /* board Headphone Jack <-> HPOUT */
0199 "Headphone Jack", "HPLOUT",
0200 "Headphone Jack", "HPROUT",
0201 "Mic Jack", "Mic Bias";
0202 mux-int-port = <1>;
0203 mux-ext-port = <6>;
0204 };
0205 };
0206
0207 &audmux {
0208 pinctrl-names = "default";
0209 pinctrl-0 = <&pinctrl_audmux>;
0210 status = "okay";
0211 };
0212
0213 &clks {
0214 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
0215 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
0216 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
0217 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
0218 };
0219
0220 &fec {
0221 pinctrl-names = "default";
0222 pinctrl-0 = <&pinctrl_enet>;
0223 phy-mode = "rgmii-id";
0224 status = "okay";
0225 };
0226
0227 &i2c1 {
0228 clock-frequency = <100000>;
0229 pinctrl-names = "default";
0230 pinctrl-0 = <&pinctrl_i2c1>;
0231 status = "okay";
0232
0233 gsc: gsc@20 {
0234 compatible = "gw,gsc";
0235 reg = <0x20>;
0236 interrupt-parent = <&gpio1>;
0237 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0238 interrupt-controller;
0239 #interrupt-cells = <1>;
0240 #size-cells = <0>;
0241
0242 adc {
0243 compatible = "gw,gsc-adc";
0244 #address-cells = <1>;
0245 #size-cells = <0>;
0246
0247 channel@0 {
0248 gw,mode = <0>;
0249 reg = <0x00>;
0250 label = "temp";
0251 };
0252
0253 channel@2 {
0254 gw,mode = <1>;
0255 reg = <0x02>;
0256 label = "vdd_vin";
0257 };
0258
0259 channel@5 {
0260 gw,mode = <1>;
0261 reg = <0x05>;
0262 label = "vdd_3p3";
0263 };
0264
0265 channel@8 {
0266 gw,mode = <1>;
0267 reg = <0x08>;
0268 label = "vdd_bat";
0269 };
0270
0271 channel@b {
0272 gw,mode = <1>;
0273 reg = <0x0b>;
0274 label = "vdd_5p0";
0275 };
0276
0277 channel@e {
0278 gw,mode = <1>;
0279 reg = <0xe>;
0280 label = "vdd_arm";
0281 };
0282
0283 channel@11 {
0284 gw,mode = <1>;
0285 reg = <0x11>;
0286 label = "vdd_soc";
0287 };
0288
0289 channel@14 {
0290 gw,mode = <1>;
0291 reg = <0x14>;
0292 label = "vdd_3p0";
0293 };
0294
0295 channel@17 {
0296 gw,mode = <1>;
0297 reg = <0x17>;
0298 label = "vdd_1p5";
0299 };
0300
0301 channel@1d {
0302 gw,mode = <1>;
0303 reg = <0x1d>;
0304 label = "vdd_1p8";
0305 };
0306
0307 channel@20 {
0308 gw,mode = <1>;
0309 reg = <0x20>;
0310 label = "vdd_an1";
0311 };
0312
0313 channel@23 {
0314 gw,mode = <1>;
0315 reg = <0x23>;
0316 label = "vdd_2p5";
0317 };
0318 };
0319 };
0320
0321 gsc_gpio: gpio@23 {
0322 compatible = "nxp,pca9555";
0323 reg = <0x23>;
0324 gpio-controller;
0325 #gpio-cells = <2>;
0326 interrupt-parent = <&gsc>;
0327 interrupts = <4>;
0328 };
0329
0330 eeprom1: eeprom@50 {
0331 compatible = "atmel,24c02";
0332 reg = <0x50>;
0333 pagesize = <16>;
0334 };
0335
0336 eeprom2: eeprom@51 {
0337 compatible = "atmel,24c02";
0338 reg = <0x51>;
0339 pagesize = <16>;
0340 };
0341
0342 eeprom3: eeprom@52 {
0343 compatible = "atmel,24c02";
0344 reg = <0x52>;
0345 pagesize = <16>;
0346 };
0347
0348 eeprom4: eeprom@53 {
0349 compatible = "atmel,24c02";
0350 reg = <0x53>;
0351 pagesize = <16>;
0352 };
0353
0354 dts1672: rtc@68 {
0355 compatible = "dallas,ds1672";
0356 reg = <0x68>;
0357 };
0358 };
0359
0360 &i2c2 {
0361 clock-frequency = <400000>;
0362 pinctrl-names = "default";
0363 pinctrl-0 = <&pinctrl_i2c2>;
0364 status = "okay";
0365
0366 ltc3676: pmic@3c {
0367 compatible = "lltc,ltc3676";
0368 reg = <0x3c>;
0369 interrupt-parent = <&gpio1>;
0370 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
0371
0372 regulators {
0373 /* VDD_1P8 (1+R1/R2 = 2.505): Aud/eMMC/microSD/Touch */
0374 reg_1p8v: sw1 {
0375 regulator-name = "vdd1p8";
0376 regulator-min-microvolt = <1033310>;
0377 regulator-max-microvolt = <2004000>;
0378 lltc,fb-voltage-divider = <301000 200000>;
0379 regulator-ramp-delay = <7000>;
0380 regulator-boot-on;
0381 regulator-always-on;
0382 };
0383
0384 /* VDD_DDR (1+R1/R2 = 2.105) */
0385 reg_vdd_ddr: sw2 {
0386 regulator-name = "vddddr";
0387 regulator-min-microvolt = <868310>;
0388 regulator-max-microvolt = <1684000>;
0389 lltc,fb-voltage-divider = <221000 200000>;
0390 regulator-ramp-delay = <7000>;
0391 regulator-boot-on;
0392 regulator-always-on;
0393 };
0394
0395 /* VDD_ARM (1+R1/R2 = 1.635) */
0396 reg_vdd_arm: sw3 {
0397 regulator-name = "vddarm";
0398 regulator-min-microvolt = <674400>;
0399 regulator-max-microvolt = <1308000>;
0400 lltc,fb-voltage-divider = <127000 200000>;
0401 regulator-ramp-delay = <7000>;
0402 regulator-boot-on;
0403 regulator-always-on;
0404 linux,phandle = <®_vdd_arm>;
0405 };
0406
0407 /* VDD_SOC (1+R1/R2 = 1.635) */
0408 reg_vdd_soc: sw4 {
0409 regulator-name = "vddsoc";
0410 regulator-min-microvolt = <674400>;
0411 regulator-max-microvolt = <1308000>;
0412 lltc,fb-voltage-divider = <127000 200000>;
0413 regulator-ramp-delay = <7000>;
0414 regulator-boot-on;
0415 regulator-always-on;
0416 linux,phandle = <®_vdd_soc>;
0417 };
0418
0419 /* VDD_1P0 (1+R1/R2 = 1.38): */
0420 reg_1p0v: ldo2 {
0421 regulator-name = "vdd1p0";
0422 regulator-min-microvolt = <1002777>;
0423 regulator-max-microvolt = <1002777>;
0424 lltc,fb-voltage-divider = <100000 261000>;
0425 regulator-boot-on;
0426 regulator-always-on;
0427 };
0428
0429 /* VDD_HIGH (1+R1/R2 = 4.17) */
0430 reg_3p0v: ldo4 {
0431 regulator-name = "vdd3p0";
0432 regulator-min-microvolt = <3023250>;
0433 regulator-max-microvolt = <3023250>;
0434 lltc,fb-voltage-divider = <634000 200000>;
0435 regulator-boot-on;
0436 regulator-always-on;
0437 };
0438 };
0439 };
0440 };
0441
0442 &i2c3 {
0443 clock-frequency = <400000>;
0444 pinctrl-names = "default";
0445 pinctrl-0 = <&pinctrl_i2c3>;
0446 status = "okay";
0447
0448 tlv320aic3105: codec@18 {
0449 compatible = "ti,tlv320aic3x";
0450 reg = <0x18>;
0451 reset-gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
0452 clocks = <&clks IMX6QDL_CLK_CKO>;
0453 ai3x-micbias-vg = <2>; /* MICBIAS_2_5V */
0454 /* Regulators */
0455 DRVDD-supply = <®_3p3v>;
0456 AVDD-supply = <®_3p3v>;
0457 IOVDD-supply = <®_3p3v>;
0458 DVDD-supply = <®_1p8v>;
0459 };
0460
0461 accelerometer@1d {
0462 compatible = "fsl,mma8451";
0463 reg = <0x1d>;
0464 interrupt-parent = <&gpio7>;
0465 interrupts = <11 IRQ_TYPE_EDGE_RISING>;
0466 interrupt-names = "INT2";
0467 };
0468
0469 /* headphone detect */
0470 ts3a227e@3b {
0471 compatible = "ti,ts3a227e";
0472 reg = <0x3b>;
0473 interrupt-parent = <&gpio5>;
0474 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
0475 ti,micbias = <4>; /* 2.5V micbias */
0476 };
0477 };
0478
0479 &ldb {
0480 status = "okay";
0481
0482 lvds-channel@0 {
0483 fsl,data-mapping = "spwg";
0484 fsl,data-width = <18>;
0485 status = "okay";
0486
0487 display-timings {
0488 native-mode = <&timing0>;
0489 timing0: g101evn010 {
0490 clock-frequency = <68930000>;
0491 hactive = <1280>;
0492 vactive = <800>;
0493 hback-porch = <220>;
0494 hfront-porch = <40>;
0495 vback-porch = <21>;
0496 vfront-porch = <7>;
0497 hsync-len = <60>;
0498 vsync-len = <10>;
0499 };
0500 };
0501 };
0502 };
0503
0504 &pwm1 {
0505 #pwm-cells = <2>;
0506 pinctrl-names = "default";
0507 pinctrl-0 = <&pinctrl_pwm1>;
0508 status = "okay";
0509 };
0510
0511 &ssi1 {
0512 status = "okay";
0513 };
0514
0515 &uart1 {
0516 pinctrl-names = "default";
0517 pinctrl-0 = <&pinctrl_uart1>;
0518 status = "okay";
0519 };
0520
0521 &uart2 {
0522 pinctrl-names = "default";
0523 pinctrl-0 = <&pinctrl_uart2>;
0524 status = "okay";
0525 };
0526
0527 &usbotg {
0528 vbus-supply = <®_usb_otg_vbus>;
0529 pinctrl-names = "default";
0530 pinctrl-0 = <&pinctrl_usbotg>;
0531 disable-over-current;
0532 status = "okay";
0533 };
0534
0535 &usbh1 {
0536 vbus-supply = <®_usb_h1_vbus>;
0537 status = "okay";
0538 };
0539
0540 &usdhc1 {
0541 pinctrl-names = "default";
0542 pinctrl-0 = <&pinctrl_usdhc1_200mhz>;
0543 vmmc-supply = <®_3p3v>;
0544 non-removable;
0545 bus-width = <4>;
0546 status = "okay";
0547 };
0548
0549 &usdhc2 {
0550 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0551 pinctrl-0 = <&pinctrl_usdhc2>;
0552 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
0553 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
0554 cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
0555 vmmc-supply = <®_3p3v>;
0556 max-frequency = <100000000>;
0557 status = "okay";
0558 };
0559
0560 &usdhc3 {
0561 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0562 pinctrl-0 = <&pinctrl_usdhc3>;
0563 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
0564 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
0565 non-removable;
0566 vmmc-supply = <®_3p3v>;
0567 keep-power-in-suspend;
0568 status = "okay";
0569 };
0570
0571 &wdog1 {
0572 pinctrl-names = "default";
0573 pinctrl-0 = <&pinctrl_wdog>;
0574 fsl,ext-reset-output;
0575 };
0576
0577 &iomuxc {
0578 pinctrl_audmux: audmuxgrp {
0579 fsl,pins = <
0580 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
0581 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
0582 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
0583 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
0584 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* MCK */
0585 >;
0586 };
0587
0588 pinctrl_enet: enetgrp {
0589 fsl,pins = <
0590 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0591 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0592 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0593 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0594 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0595 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0596 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0597 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0598 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0599 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0600 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0601 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0602 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0603 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0604 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0605 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
0606 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0 /* PHY_EN */
0607 >;
0608 };
0609
0610 pinctrl_gpio_leds: gpioledsgrp {
0611 fsl,pins = <
0612 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
0613 >;
0614 };
0615
0616 pinctrl_i2c1: i2c1grp {
0617 fsl,pins = <
0618 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0619 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0620 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
0621 >;
0622 };
0623
0624 pinctrl_i2c2: i2c2grp {
0625 fsl,pins = <
0626 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0627 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0628 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
0629 >;
0630 };
0631
0632 pinctrl_i2c3: i2c3grp {
0633 fsl,pins = <
0634 /* I2C3 */
0635 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0636 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0637
0638 /* Headphone Detect */
0639 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x0001b0b0 /* HPDET_IRQ# */
0640 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x0001b0b0 /* HPDET_MIC# */
0641
0642 /* Codec */
0643 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x0001b0b0 /* CODEC_RST# */
0644
0645 /* Touch Controller */
0646 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b0b0 /* TOUCH_IRQ# */
0647 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b0b0 /* TOUCH_RST */
0648
0649 /* Stow Sensor */
0650 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x0001b0b0 /* ACCEL_IRQ2 */
0651 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x0001b0b0 /* ACCEL_IRQ1 */
0652 >;
0653 };
0654
0655 pinctrl_pwm1: pwm1grp {
0656 fsl,pins = <
0657 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
0658 >;
0659 };
0660
0661 pinctrl_uart1: uart1grp {
0662 fsl,pins = <
0663 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0664 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0665 MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b1 /* TXEN */
0666 >;
0667 };
0668
0669 pinctrl_uart2: uart2grp {
0670 fsl,pins = <
0671 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0672 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0673 >;
0674 };
0675
0676 pinctrl_usbotg: usbotggrp {
0677 fsl,pins = <
0678 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
0679 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x4001b0b0 /* PWR_EN */
0680 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
0681 >;
0682 };
0683
0684 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
0685 fsl,pins = <
0686 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x4001b0b0 /* EMMY_EN */
0687 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x4001b0b0 /* EMMY_CFG1# */
0688 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x4001b0b0 /* EMMY_CFG2# */
0689 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x0001b0b0 /* EMMY_BTWAKE# */
0690 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x0001b0b0 /* EMMY_WFWAKE# */
0691
0692 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
0693 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x100f9
0694 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
0695 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
0696 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
0697 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
0698 >;
0699 };
0700
0701 pinctrl_usdhc2: usdhc2grp {
0702 fsl,pins = <
0703 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0704 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0705 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0706 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0707 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0708 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0709 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x17059 /* CD */
0710 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x17059
0711 >;
0712 };
0713
0714 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
0715 fsl,pins = <
0716 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
0717 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
0718 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
0719 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
0720 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
0721 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
0722 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170b9 /* CD */
0723 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170b9
0724 >;
0725 };
0726
0727 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
0728 fsl,pins = <
0729 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
0730 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
0731 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
0732 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
0733 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
0734 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
0735 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170f9 /* CD */
0736 MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170f9
0737 >;
0738 };
0739
0740 pinctrl_usdhc3: usdhc3grp {
0741 fsl,pins = <
0742 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0743 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0744 MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
0745 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0746 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0747 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0748 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0749 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
0750 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
0751 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
0752 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
0753 >;
0754 };
0755
0756 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
0757 fsl,pins = <
0758 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
0759 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
0760 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
0761 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
0762 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
0763 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
0764 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
0765 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
0766 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
0767 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
0768 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
0769 >;
0770 };
0771
0772 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
0773 fsl,pins = <
0774 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
0775 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
0776 MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
0777 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
0778 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
0779 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
0780 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
0781 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
0782 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
0783 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
0784 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
0785 >;
0786 };
0787
0788 pinctrl_wdog: wdoggrp {
0789 fsl,pins = <
0790 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
0791 >;
0792 };
0793 };
