0001 /*
0002 * Copyright 2014 Gateworks Corporation
0003 *
0004 * This file is dual-licensed: you can use it either under the terms
0005 * of the GPL or the X11 license, at your option. Note that this dual
0006 * licensing only applies to this file, and not this project as a
0007 * whole.
0008 *
0009 * a) This file is free software; you can redistribute it and/or
0010 * modify it under the terms of the GNU General Public License as
0011 * published by the Free Software Foundation; either version 2 of
0012 * the License, or (at your option) any later version.
0013 *
0014 * This file is distributed in the hope that it will be useful,
0015 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0016 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0017 * GNU General Public License for more details.
0018 *
0019 * You should have received a copy of the GNU General Public
0020 * License along with this file; if not, write to the Free
0021 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
0022 * MA 02110-1301 USA
0023 *
0024 * Or, alternatively,
0025 *
0026 * b) Permission is hereby granted, free of charge, to any person
0027 * obtaining a copy of this software and associated documentation
0028 * files (the "Software"), to deal in the Software without
0029 * restriction, including without limitation the rights to use,
0030 * copy, modify, merge, publish, distribute, sublicense, and/or
0031 * sell copies of the Software, and to permit persons to whom the
0032 * Software is furnished to do so, subject to the following
0033 * conditions:
0034 *
0035 * The above copyright notice and this permission notice shall be
0036 * included in all copies or substantial portions of the Software.
0037 *
0038 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0039 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0040 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0041 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0042 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0043 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0044 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0045 * OTHER DEALINGS IN THE SOFTWARE.
0046 */
0047
0048 #include <dt-bindings/gpio/gpio.h>
0049 #include <dt-bindings/media/tda1997x.h>
0050 #include <dt-bindings/input/linux-event-codes.h>
0051 #include <dt-bindings/interrupt-controller/irq.h>
0052 #include <dt-bindings/sound/fsl-imx-audmux.h>
0053
0054 / {
0055 /* these are used by bootloader for disabling nodes */
0056 aliases {
0057 led0 = &led0;
0058 nand = &gpmi;
0059 ssi0 = &ssi1;
0060 usb0 = &usbh1;
0061 usb1 = &usbotg;
0062 };
0063
0064 chosen {
0065 bootargs = "console=ttymxc1,115200";
0066 };
0067
0068 gpio-keys {
0069 compatible = "gpio-keys";
0070
0071 user-pb {
0072 label = "user_pb";
0073 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
0074 linux,code = <BTN_0>;
0075 };
0076
0077 user-pb1x {
0078 label = "user_pb1x";
0079 linux,code = <BTN_1>;
0080 interrupt-parent = <&gsc>;
0081 interrupts = <0>;
0082 };
0083
0084 key-erased {
0085 label = "key-erased";
0086 linux,code = <BTN_2>;
0087 interrupt-parent = <&gsc>;
0088 interrupts = <1>;
0089 };
0090
0091 eeprom-wp {
0092 label = "eeprom_wp";
0093 linux,code = <BTN_3>;
0094 interrupt-parent = <&gsc>;
0095 interrupts = <2>;
0096 };
0097
0098 tamper {
0099 label = "tamper";
0100 linux,code = <BTN_4>;
0101 interrupt-parent = <&gsc>;
0102 interrupts = <5>;
0103 };
0104
0105 switch-hold {
0106 label = "switch_hold";
0107 linux,code = <BTN_5>;
0108 interrupt-parent = <&gsc>;
0109 interrupts = <7>;
0110 };
0111 };
0112
0113 leds {
0114 compatible = "gpio-leds";
0115 pinctrl-names = "default";
0116 pinctrl-0 = <&pinctrl_gpio_leds>;
0117
0118 led0: user1 {
0119 label = "user1";
0120 gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
0121 default-state = "on";
0122 linux,default-trigger = "heartbeat";
0123 };
0124 };
0125
0126 memory@10000000 {
0127 device_type = "memory";
0128 reg = <0x10000000 0x20000000>;
0129 };
0130
0131 reg_5p0v: regulator-5p0v {
0132 compatible = "regulator-fixed";
0133 regulator-name = "5P0V";
0134 regulator-min-microvolt = <5000000>;
0135 regulator-max-microvolt = <5000000>;
0136 };
0137
0138 reg_usb_h1_vbus: regulator-usb-h1-vbus {
0139 compatible = "regulator-fixed";
0140 regulator-name = "usb_h1_vbus";
0141 regulator-min-microvolt = <5000000>;
0142 regulator-max-microvolt = <5000000>;
0143 };
0144
0145 reg_usb_otg_vbus: regulator-usb-otg-vbus {
0146 compatible = "regulator-fixed";
0147 regulator-name = "usb_otg_vbus";
0148 regulator-min-microvolt = <5000000>;
0149 regulator-max-microvolt = <5000000>;
0150 };
0151
0152 sound-digital {
0153 compatible = "simple-audio-card";
0154 simple-audio-card,name = "tda1997x-audio";
0155 simple-audio-card,format = "i2s";
0156 simple-audio-card,bitclock-master = <&sound_codec>;
0157 simple-audio-card,frame-master = <&sound_codec>;
0158
0159 sound_cpu: simple-audio-card,cpu {
0160 sound-dai = <&ssi1>;
0161 };
0162
0163 sound_codec: simple-audio-card,codec {
0164 sound-dai = <&hdmi_receiver>;
0165 };
0166 };
0167 };
0168
0169 &audmux {
0170 pinctrl-names = "default";
0171 pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
0172 status = "okay";
0173
0174 ssi1 {
0175 fsl,audmux-port = <0>;
0176 fsl,port-config = <
0177 (IMX_AUDMUX_V2_PTCR_TFSDIR |
0178 IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
0179 IMX_AUDMUX_V2_PTCR_TCLKDIR |
0180 IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
0181 IMX_AUDMUX_V2_PTCR_SYN)
0182 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
0183 >;
0184 };
0185
0186 aud5 {
0187 fsl,audmux-port = <4>;
0188 fsl,port-config = <
0189 IMX_AUDMUX_V2_PTCR_SYN
0190 IMX_AUDMUX_V2_PDCR_RXDSEL(0)>;
0191 };
0192 };
0193
0194 &can1 {
0195 pinctrl-names = "default";
0196 pinctrl-0 = <&pinctrl_flexcan1>;
0197 status = "okay";
0198 };
0199
0200 &gpmi {
0201 pinctrl-names = "default";
0202 pinctrl-0 = <&pinctrl_gpmi_nand>;
0203 status = "okay";
0204 };
0205
0206 &hdmi {
0207 ddc-i2c-bus = <&i2c3>;
0208 status = "okay";
0209 };
0210
0211 &i2c1 {
0212 clock-frequency = <100000>;
0213 pinctrl-names = "default";
0214 pinctrl-0 = <&pinctrl_i2c1>;
0215 status = "okay";
0216
0217 gsc: gsc@20 {
0218 compatible = "gw,gsc";
0219 reg = <0x20>;
0220 interrupt-parent = <&gpio1>;
0221 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0222 interrupt-controller;
0223 #interrupt-cells = <1>;
0224 #size-cells = <0>;
0225
0226 adc {
0227 compatible = "gw,gsc-adc";
0228 #address-cells = <1>;
0229 #size-cells = <0>;
0230
0231 channel@0 {
0232 gw,mode = <0>;
0233 reg = <0x00>;
0234 label = "temp";
0235 };
0236
0237 channel@2 {
0238 gw,mode = <1>;
0239 reg = <0x02>;
0240 label = "vdd_vin";
0241 };
0242
0243 channel@5 {
0244 gw,mode = <1>;
0245 reg = <0x05>;
0246 label = "vdd_3p3";
0247 };
0248
0249 channel@8 {
0250 gw,mode = <1>;
0251 reg = <0x08>;
0252 label = "vdd_bat";
0253 };
0254
0255 channel@b {
0256 gw,mode = <1>;
0257 reg = <0x0b>;
0258 label = "vdd_5p0";
0259 };
0260
0261 channel@e {
0262 gw,mode = <1>;
0263 reg = <0xe>;
0264 label = "vdd_arm";
0265 };
0266
0267 channel@11 {
0268 gw,mode = <1>;
0269 reg = <0x11>;
0270 label = "vdd_soc";
0271 };
0272
0273 channel@14 {
0274 gw,mode = <1>;
0275 reg = <0x14>;
0276 label = "vdd_3p0";
0277 };
0278
0279 channel@17 {
0280 gw,mode = <1>;
0281 reg = <0x17>;
0282 label = "vdd_1p5";
0283 };
0284
0285 channel@1d {
0286 gw,mode = <1>;
0287 reg = <0x1d>;
0288 label = "vdd_1p8a";
0289 };
0290
0291 channel@20 {
0292 gw,mode = <1>;
0293 reg = <0x20>;
0294 label = "vdd_1p0b";
0295 };
0296 };
0297 };
0298
0299 gsc_gpio: gpio@23 {
0300 compatible = "nxp,pca9555";
0301 reg = <0x23>;
0302 gpio-controller;
0303 #gpio-cells = <2>;
0304 interrupt-parent = <&gsc>;
0305 interrupts = <4>;
0306 };
0307
0308 eeprom1: eeprom@50 {
0309 compatible = "atmel,24c02";
0310 reg = <0x50>;
0311 pagesize = <16>;
0312 };
0313
0314 eeprom2: eeprom@51 {
0315 compatible = "atmel,24c02";
0316 reg = <0x51>;
0317 pagesize = <16>;
0318 };
0319
0320 eeprom3: eeprom@52 {
0321 compatible = "atmel,24c02";
0322 reg = <0x52>;
0323 pagesize = <16>;
0324 };
0325
0326 eeprom4: eeprom@53 {
0327 compatible = "atmel,24c02";
0328 reg = <0x53>;
0329 pagesize = <16>;
0330 };
0331
0332 rtc: ds1672@68 {
0333 compatible = "dallas,ds1672";
0334 reg = <0x68>;
0335 };
0336 };
0337
0338 &i2c2 {
0339 clock-frequency = <100000>;
0340 pinctrl-names = "default";
0341 pinctrl-0 = <&pinctrl_i2c2>;
0342 status = "okay";
0343
0344 ltc3676: pmic@3c {
0345 compatible = "lltc,ltc3676";
0346 reg = <0x3c>;
0347 pinctrl-names = "default";
0348 pinctrl-0 = <&pinctrl_pmic>;
0349 interrupt-parent = <&gpio1>;
0350 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
0351
0352 regulators {
0353 /* VDD_SOC (1+R1/R2 = 1.635) */
0354 reg_vdd_soc: sw1 {
0355 regulator-name = "vddsoc";
0356 regulator-min-microvolt = <674400>;
0357 regulator-max-microvolt = <1308000>;
0358 lltc,fb-voltage-divider = <127000 200000>;
0359 regulator-ramp-delay = <7000>;
0360 regulator-boot-on;
0361 regulator-always-on;
0362 };
0363
0364 /* VDD_DDR (1+R1/R2 = 2.105) */
0365 reg_vdd_ddr: sw2 {
0366 regulator-name = "vddddr";
0367 regulator-min-microvolt = <868310>;
0368 regulator-max-microvolt = <1684000>;
0369 lltc,fb-voltage-divider = <221000 200000>;
0370 regulator-ramp-delay = <7000>;
0371 regulator-boot-on;
0372 regulator-always-on;
0373 };
0374
0375 /* VDD_ARM (1+R1/R2 = 1.635) */
0376 reg_vdd_arm: sw3 {
0377 regulator-name = "vddarm";
0378 regulator-min-microvolt = <674400>;
0379 regulator-max-microvolt = <1308000>;
0380 lltc,fb-voltage-divider = <127000 200000>;
0381 regulator-ramp-delay = <7000>;
0382 regulator-boot-on;
0383 regulator-always-on;
0384 };
0385
0386 /* VDD_3P3 (1+R1/R2 = 1.281) */
0387 reg_3p3: sw4 {
0388 regulator-name = "vdd3p3";
0389 regulator-min-microvolt = <1880000>;
0390 regulator-max-microvolt = <3647000>;
0391 lltc,fb-voltage-divider = <200000 56200>;
0392 regulator-ramp-delay = <7000>;
0393 regulator-boot-on;
0394 regulator-always-on;
0395 };
0396
0397 /* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
0398 reg_1p8a: ldo2 {
0399 regulator-name = "vdd1p8a";
0400 regulator-min-microvolt = <1816125>;
0401 regulator-max-microvolt = <1816125>;
0402 lltc,fb-voltage-divider = <301000 200000>;
0403 regulator-boot-on;
0404 regulator-always-on;
0405 };
0406
0407 /* VDD_1P8b: HDMI In analog */
0408 reg_1p8b: ldo3 {
0409 regulator-name = "vdd1p8b";
0410 regulator-min-microvolt = <1800000>;
0411 regulator-max-microvolt = <1800000>;
0412 regulator-boot-on;
0413 };
0414
0415 /* VDD_HIGH (1+R1/R2 = 4.17) */
0416 reg_3p0: ldo4 {
0417 regulator-name = "vdd3p0";
0418 regulator-min-microvolt = <3023250>;
0419 regulator-max-microvolt = <3023250>;
0420 lltc,fb-voltage-divider = <634000 200000>;
0421 regulator-boot-on;
0422 regulator-always-on;
0423 };
0424 };
0425 };
0426 };
0427
0428 &i2c3 {
0429 clock-frequency = <100000>;
0430 pinctrl-names = "default";
0431 pinctrl-0 = <&pinctrl_i2c3>;
0432 status = "okay";
0433
0434 gpio_exp: pca9555@24 {
0435 compatible = "nxp,pca9555";
0436 reg = <0x24>;
0437 gpio-controller;
0438 #gpio-cells = <2>;
0439 };
0440
0441 hdmi_receiver: hdmi-receiver@48 {
0442 compatible = "nxp,tda19971";
0443 pinctrl-names = "default";
0444 pinctrl-0 = <&pinctrl_tda1997x>;
0445 reg = <0x48>;
0446 interrupt-parent = <&gpio1>;
0447 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
0448 DOVDD-supply = <®_3p3>;
0449 AVDD-supply = <®_1p8b>;
0450 DVDD-supply = <®_1p8a>;
0451 #sound-dai-cells = <0>;
0452 nxp,audout-format = "i2s";
0453 nxp,audout-layout = <0>;
0454 nxp,audout-width = <16>;
0455 nxp,audout-mclk-fs = <128>;
0456 /*
0457 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
0458 * and Y[11:4] across 16bits in the same cycle
0459 * which we map to VP[15:08]<->CSI_DATA[19:12]
0460 */
0461 nxp,vidout-portcfg =
0462 /*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
0463 < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
0464 /*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
0465 < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
0466 /*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
0467 < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
0468 /*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
0469 < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
0470
0471 port {
0472 tda1997x_to_ipu1_csi0_mux: endpoint {
0473 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
0474 bus-width = <16>;
0475 hsync-active = <1>;
0476 vsync-active = <1>;
0477 data-active = <1>;
0478 };
0479 };
0480 };
0481 };
0482
0483 &ipu1_csi0_from_ipu1_csi0_mux {
0484 bus-width = <16>;
0485 };
0486
0487 &ipu1_csi0_mux_from_parallel_sensor {
0488 remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
0489 bus-width = <16>;
0490 };
0491
0492 &ipu1_csi0 {
0493 pinctrl-names = "default";
0494 pinctrl-0 = <&pinctrl_ipu1_csi0>;
0495 };
0496
0497 &pcie {
0498 pinctrl-names = "default";
0499 pinctrl-0 = <&pinctrl_pcie>;
0500 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
0501 status = "okay";
0502 };
0503
0504 &pwm2 {
0505 pinctrl-names = "default";
0506 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
0507 status = "disabled";
0508 };
0509
0510 &pwm3 {
0511 pinctrl-names = "default";
0512 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
0513 status = "disabled";
0514 };
0515
0516 &ssi1 {
0517 status = "okay";
0518 };
0519
0520 &uart2 {
0521 pinctrl-names = "default";
0522 pinctrl-0 = <&pinctrl_uart2>;
0523 status = "okay";
0524 };
0525
0526 &uart3 {
0527 pinctrl-names = "default";
0528 pinctrl-0 = <&pinctrl_uart3>;
0529 status = "okay";
0530 };
0531
0532 &usbotg {
0533 vbus-supply = <®_usb_otg_vbus>;
0534 pinctrl-names = "default";
0535 pinctrl-0 = <&pinctrl_usbotg>;
0536 disable-over-current;
0537 status = "okay";
0538 };
0539
0540 &usbh1 {
0541 vbus-supply = <®_usb_h1_vbus>;
0542 status = "okay";
0543 };
0544
0545 &wdog1 {
0546 pinctrl-names = "default";
0547 pinctrl-0 = <&pinctrl_wdog>;
0548 fsl,ext-reset-output;
0549 };
0550
0551 &iomuxc {
0552 pinctrl_audmux: audmuxgrp {
0553 fsl,pins = <
0554 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
0555 MX6QDL_PAD_DISP0_DAT14__AUD5_RXC 0x130b0
0556 MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS 0x130b0
0557 >;
0558 };
0559
0560 pinctrl_flexcan1: flexcan1grp {
0561 fsl,pins = <
0562 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
0563 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
0564 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */
0565 >;
0566 };
0567
0568 pinctrl_gpio_leds: gpioledsgrp {
0569 fsl,pins = <
0570 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
0571 >;
0572 };
0573
0574 pinctrl_gpmi_nand: gpminandgrp {
0575 fsl,pins = <
0576 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
0577 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
0578 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
0579 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
0580 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
0581 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
0582 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
0583 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
0584 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
0585 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
0586 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
0587 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
0588 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
0589 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
0590 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
0591 >;
0592 };
0593
0594 pinctrl_i2c1: i2c1grp {
0595 fsl,pins = <
0596 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0597 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0598 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
0599 >;
0600 };
0601
0602 pinctrl_i2c2: i2c2grp {
0603 fsl,pins = <
0604 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0605 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0606 >;
0607 };
0608
0609 pinctrl_i2c3: i2c3grp {
0610 fsl,pins = <
0611 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0612 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0613 >;
0614 };
0615
0616 pinctrl_ipu1_csi0: ipu1_csi0grp {
0617 fsl,pins = <
0618 MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0
0619 MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0
0620 MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0
0621 MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0
0622 MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0
0623 MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0
0624 MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0
0625 MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0
0626 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
0627 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
0628 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
0629 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
0630 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
0631 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
0632 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
0633 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
0634 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
0635 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
0636 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
0637 >;
0638 };
0639
0640 pinctrl_pcie: pciegrp {
0641 fsl,pins = <
0642 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
0643 >;
0644 };
0645
0646 pinctrl_pmic: pmicgrp {
0647 fsl,pins = <
0648 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
0649 >;
0650 };
0651
0652 pinctrl_pwm2: pwm2grp {
0653 fsl,pins = <
0654 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
0655 >;
0656 };
0657
0658 pinctrl_pwm3: pwm3grp {
0659 fsl,pins = <
0660 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
0661 >;
0662 };
0663
0664 pinctrl_tda1997x: tda1997xgrp {
0665 fsl,pins = <
0666 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
0667 >;
0668 };
0669
0670 pinctrl_uart2: uart2grp {
0671 fsl,pins = <
0672 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0673 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0674 >;
0675 };
0676
0677 pinctrl_uart3: uart3grp {
0678 fsl,pins = <
0679 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0680 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0681 >;
0682 };
0683
0684 pinctrl_usbotg: usbotggrp {
0685 fsl,pins = <
0686 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0687 >;
0688 };
0689
0690 pinctrl_wdog: wdoggrp {
0691 fsl,pins = <
0692 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
0693 >;
0694 };
0695 };
