0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright 2013 Gateworks Corporation
0004 */
0005
0006 #include <dt-bindings/gpio/gpio.h>
0007 #include <dt-bindings/input/linux-event-codes.h>
0008 #include <dt-bindings/interrupt-controller/irq.h>
0009 #include <dt-bindings/sound/fsl-imx-audmux.h>
0010
0011 / {
0012 /* these are used by bootloader for disabling nodes */
0013 aliases {
0014 led0 = &led0;
0015 led1 = &led1;
0016 led2 = &led2;
0017 nand = &gpmi;
0018 ssi0 = &ssi1;
0019 usb0 = &usbh1;
0020 usb1 = &usbotg;
0021 };
0022
0023 chosen {
0024 bootargs = "console=ttymxc1,115200";
0025 };
0026
0027 backlight {
0028 compatible = "pwm-backlight";
0029 pwms = <&pwm4 0 5000000>;
0030 brightness-levels = <0 4 8 16 32 64 128 255>;
0031 default-brightness-level = <7>;
0032 };
0033
0034 gpio-keys {
0035 compatible = "gpio-keys";
0036
0037 user-pb {
0038 label = "user_pb";
0039 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
0040 linux,code = <BTN_0>;
0041 };
0042
0043 user-pb1x {
0044 label = "user_pb1x";
0045 linux,code = <BTN_1>;
0046 interrupt-parent = <&gsc>;
0047 interrupts = <0>;
0048 };
0049
0050 key-erased {
0051 label = "key-erased";
0052 linux,code = <BTN_2>;
0053 interrupt-parent = <&gsc>;
0054 interrupts = <1>;
0055 };
0056
0057 eeprom-wp {
0058 label = "eeprom_wp";
0059 linux,code = <BTN_3>;
0060 interrupt-parent = <&gsc>;
0061 interrupts = <2>;
0062 };
0063
0064 tamper {
0065 label = "tamper";
0066 linux,code = <BTN_4>;
0067 interrupt-parent = <&gsc>;
0068 interrupts = <5>;
0069 };
0070
0071 switch-hold {
0072 label = "switch_hold";
0073 linux,code = <BTN_5>;
0074 interrupt-parent = <&gsc>;
0075 interrupts = <7>;
0076 };
0077 };
0078
0079 leds {
0080 compatible = "gpio-leds";
0081 pinctrl-names = "default";
0082 pinctrl-0 = <&pinctrl_gpio_leds>;
0083
0084 led0: user1 {
0085 label = "user1";
0086 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
0087 default-state = "on";
0088 linux,default-trigger = "heartbeat";
0089 };
0090
0091 led1: user2 {
0092 label = "user2";
0093 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
0094 default-state = "off";
0095 };
0096
0097 led2: user3 {
0098 label = "user3";
0099 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
0100 default-state = "off";
0101 };
0102 };
0103
0104 memory@10000000 {
0105 device_type = "memory";
0106 reg = <0x10000000 0x40000000>;
0107 };
0108
0109 pps {
0110 compatible = "pps-gpio";
0111 pinctrl-names = "default";
0112 pinctrl-0 = <&pinctrl_pps>;
0113 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
0114 status = "okay";
0115 };
0116
0117 regulators {
0118 compatible = "simple-bus";
0119 #address-cells = <1>;
0120 #size-cells = <0>;
0121
0122 reg_1p0v: regulator@0 {
0123 compatible = "regulator-fixed";
0124 reg = <0>;
0125 regulator-name = "1P0V";
0126 regulator-min-microvolt = <1000000>;
0127 regulator-max-microvolt = <1000000>;
0128 regulator-always-on;
0129 };
0130
0131 reg_3p3v: regulator@1 {
0132 compatible = "regulator-fixed";
0133 reg = <1>;
0134 regulator-name = "3P3V";
0135 regulator-min-microvolt = <3300000>;
0136 regulator-max-microvolt = <3300000>;
0137 regulator-always-on;
0138 };
0139
0140 reg_usb_h1_vbus: regulator@2 {
0141 compatible = "regulator-fixed";
0142 reg = <2>;
0143 regulator-name = "usb_h1_vbus";
0144 regulator-min-microvolt = <5000000>;
0145 regulator-max-microvolt = <5000000>;
0146 regulator-always-on;
0147 };
0148
0149 reg_usb_otg_vbus: regulator@3 {
0150 compatible = "regulator-fixed";
0151 reg = <3>;
0152 regulator-name = "usb_otg_vbus";
0153 regulator-min-microvolt = <5000000>;
0154 regulator-max-microvolt = <5000000>;
0155 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0156 enable-active-high;
0157 };
0158 };
0159
0160 sound-analog {
0161 compatible = "fsl,imx6q-ventana-sgtl5000",
0162 "fsl,imx-audio-sgtl5000";
0163 model = "sgtl5000-audio";
0164 ssi-controller = <&ssi1>;
0165 audio-codec = <&sgtl5000>;
0166 audio-routing =
0167 "MIC_IN", "Mic Jack",
0168 "Mic Jack", "Mic Bias",
0169 "Headphone Jack", "HP_OUT";
0170 mux-int-port = <1>;
0171 mux-ext-port = <4>;
0172 };
0173 };
0174
0175 &audmux {
0176 pinctrl-names = "default";
0177 pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
0178 status = "okay";
0179
0180 ssi2 {
0181 fsl,audmux-port = <1>;
0182 fsl,port-config = <
0183 (IMX_AUDMUX_V2_PTCR_TFSDIR |
0184 IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
0185 IMX_AUDMUX_V2_PTCR_TCLKDIR |
0186 IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
0187 IMX_AUDMUX_V2_PTCR_SYN)
0188 IMX_AUDMUX_V2_PDCR_RXDSEL(4)
0189 >;
0190 };
0191
0192 aud5 {
0193 fsl,audmux-port = <4>;
0194 fsl,port-config = <
0195 IMX_AUDMUX_V2_PTCR_SYN
0196 IMX_AUDMUX_V2_PDCR_RXDSEL(1)>;
0197 };
0198 };
0199
0200 &can1 {
0201 pinctrl-names = "default";
0202 pinctrl-0 = <&pinctrl_flexcan1>;
0203 status = "okay";
0204 };
0205
0206 &clks {
0207 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
0208 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
0209 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
0210 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
0211 };
0212
0213 &ecspi2 {
0214 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
0215 pinctrl-names = "default";
0216 pinctrl-0 = <&pinctrl_ecspi2>;
0217 status = "okay";
0218 };
0219
0220 &fec {
0221 pinctrl-names = "default";
0222 pinctrl-0 = <&pinctrl_enet>;
0223 phy-mode = "rgmii-id";
0224 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
0225 status = "okay";
0226 };
0227
0228 &gpmi {
0229 pinctrl-names = "default";
0230 pinctrl-0 = <&pinctrl_gpmi_nand>;
0231 status = "okay";
0232 };
0233
0234 &hdmi {
0235 ddc-i2c-bus = <&i2c3>;
0236 status = "okay";
0237 };
0238
0239 &i2c1 {
0240 clock-frequency = <100000>;
0241 pinctrl-names = "default";
0242 pinctrl-0 = <&pinctrl_i2c1>;
0243 status = "okay";
0244
0245 gsc: gsc@20 {
0246 compatible = "gw,gsc";
0247 reg = <0x20>;
0248 interrupt-parent = <&gpio1>;
0249 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0250 interrupt-controller;
0251 #interrupt-cells = <1>;
0252 #address-cells = <1>;
0253 #size-cells = <0>;
0254
0255 adc {
0256 compatible = "gw,gsc-adc";
0257 #address-cells = <1>;
0258 #size-cells = <0>;
0259
0260 channel@0 {
0261 gw,mode = <0>;
0262 reg = <0x00>;
0263 label = "temp";
0264 };
0265
0266 channel@2 {
0267 gw,mode = <1>;
0268 reg = <0x02>;
0269 label = "vdd_vin";
0270 };
0271
0272 channel@5 {
0273 gw,mode = <1>;
0274 reg = <0x05>;
0275 label = "vdd_3p3";
0276 };
0277
0278 channel@8 {
0279 gw,mode = <1>;
0280 reg = <0x08>;
0281 label = "vdd_bat";
0282 };
0283
0284 channel@b {
0285 gw,mode = <1>;
0286 reg = <0x0b>;
0287 label = "vdd_5p0";
0288 };
0289
0290 channel@e {
0291 gw,mode = <1>;
0292 reg = <0xe>;
0293 label = "vdd_arm";
0294 };
0295
0296 channel@11 {
0297 gw,mode = <1>;
0298 reg = <0x11>;
0299 label = "vdd_soc";
0300 };
0301
0302 channel@14 {
0303 gw,mode = <1>;
0304 reg = <0x14>;
0305 label = "vdd_3p0";
0306 };
0307
0308 channel@17 {
0309 gw,mode = <1>;
0310 reg = <0x17>;
0311 label = "vdd_1p5";
0312 };
0313
0314 channel@1d {
0315 gw,mode = <1>;
0316 reg = <0x1d>;
0317 label = "vdd_1p8";
0318 };
0319
0320 channel@20 {
0321 gw,mode = <1>;
0322 reg = <0x20>;
0323 label = "vdd_1p0";
0324 };
0325
0326 channel@23 {
0327 gw,mode = <1>;
0328 reg = <0x23>;
0329 label = "vdd_2p5";
0330 };
0331
0332 channel@26 {
0333 gw,mode = <1>;
0334 reg = <0x26>;
0335 label = "vdd_gps";
0336 };
0337 };
0338
0339 fan-controller@2c {
0340 compatible = "gw,gsc-fan";
0341 #address-cells = <1>;
0342 #size-cells = <0>;
0343 reg = <0x2c>;
0344 };
0345 };
0346
0347 gsc_gpio: gpio@23 {
0348 compatible = "nxp,pca9555";
0349 reg = <0x23>;
0350 gpio-controller;
0351 #gpio-cells = <2>;
0352 interrupt-parent = <&gsc>;
0353 interrupts = <4>;
0354 };
0355
0356 eeprom1: eeprom@50 {
0357 compatible = "atmel,24c02";
0358 reg = <0x50>;
0359 pagesize = <16>;
0360 };
0361
0362 eeprom2: eeprom@51 {
0363 compatible = "atmel,24c02";
0364 reg = <0x51>;
0365 pagesize = <16>;
0366 };
0367
0368 eeprom3: eeprom@52 {
0369 compatible = "atmel,24c02";
0370 reg = <0x52>;
0371 pagesize = <16>;
0372 };
0373
0374 eeprom4: eeprom@53 {
0375 compatible = "atmel,24c02";
0376 reg = <0x53>;
0377 pagesize = <16>;
0378 };
0379
0380 rtc: ds1672@68 {
0381 compatible = "dallas,ds1672";
0382 reg = <0x68>;
0383 };
0384 };
0385
0386 &i2c2 {
0387 clock-frequency = <100000>;
0388 pinctrl-names = "default";
0389 pinctrl-0 = <&pinctrl_i2c2>;
0390 status = "okay";
0391
0392 pmic: pfuze100@8 {
0393 compatible = "fsl,pfuze100";
0394 reg = <0x08>;
0395
0396 regulators {
0397 sw1a_reg: sw1ab {
0398 regulator-min-microvolt = <300000>;
0399 regulator-max-microvolt = <1875000>;
0400 regulator-boot-on;
0401 regulator-always-on;
0402 regulator-ramp-delay = <6250>;
0403 };
0404
0405 sw1c_reg: sw1c {
0406 regulator-min-microvolt = <300000>;
0407 regulator-max-microvolt = <1875000>;
0408 regulator-boot-on;
0409 regulator-always-on;
0410 regulator-ramp-delay = <6250>;
0411 };
0412
0413 sw2_reg: sw2 {
0414 regulator-min-microvolt = <800000>;
0415 regulator-max-microvolt = <3950000>;
0416 regulator-boot-on;
0417 regulator-always-on;
0418 };
0419
0420 sw3a_reg: sw3a {
0421 regulator-min-microvolt = <400000>;
0422 regulator-max-microvolt = <1975000>;
0423 regulator-boot-on;
0424 regulator-always-on;
0425 };
0426
0427 sw3b_reg: sw3b {
0428 regulator-min-microvolt = <400000>;
0429 regulator-max-microvolt = <1975000>;
0430 regulator-boot-on;
0431 regulator-always-on;
0432 };
0433
0434 sw4_reg: sw4 {
0435 regulator-min-microvolt = <800000>;
0436 regulator-max-microvolt = <3300000>;
0437 };
0438
0439 swbst_reg: swbst {
0440 regulator-min-microvolt = <5000000>;
0441 regulator-max-microvolt = <5150000>;
0442 regulator-boot-on;
0443 regulator-always-on;
0444 };
0445
0446 snvs_reg: vsnvs {
0447 regulator-min-microvolt = <1000000>;
0448 regulator-max-microvolt = <3000000>;
0449 regulator-boot-on;
0450 regulator-always-on;
0451 };
0452
0453 vref_reg: vrefddr {
0454 regulator-boot-on;
0455 regulator-always-on;
0456 };
0457
0458 vgen1_reg: vgen1 {
0459 regulator-min-microvolt = <800000>;
0460 regulator-max-microvolt = <1550000>;
0461 };
0462
0463 vgen2_reg: vgen2 {
0464 regulator-min-microvolt = <800000>;
0465 regulator-max-microvolt = <1550000>;
0466 };
0467
0468 vgen3_reg: vgen3 {
0469 regulator-min-microvolt = <1800000>;
0470 regulator-max-microvolt = <3300000>;
0471 };
0472
0473 vgen4_reg: vgen4 {
0474 regulator-min-microvolt = <1800000>;
0475 regulator-max-microvolt = <3300000>;
0476 regulator-always-on;
0477 };
0478
0479 vgen5_reg: vgen5 {
0480 regulator-min-microvolt = <1800000>;
0481 regulator-max-microvolt = <3300000>;
0482 regulator-always-on;
0483 };
0484
0485 vgen6_reg: vgen6 {
0486 regulator-min-microvolt = <1800000>;
0487 regulator-max-microvolt = <3300000>;
0488 regulator-always-on;
0489 };
0490 };
0491 };
0492 };
0493
0494 &i2c3 {
0495 clock-frequency = <100000>;
0496 pinctrl-names = "default";
0497 pinctrl-0 = <&pinctrl_i2c3>;
0498 status = "okay";
0499
0500 sgtl5000: audio-codec@a {
0501 compatible = "fsl,sgtl5000";
0502 reg = <0x0a>;
0503 clocks = <&clks IMX6QDL_CLK_CKO>;
0504 VDDA-supply = <&sw4_reg>;
0505 VDDIO-supply = <®_3p3v>;
0506 };
0507
0508 touchscreen: egalax_ts@4 {
0509 compatible = "eeti,egalax_ts";
0510 reg = <0x04>;
0511 interrupt-parent = <&gpio7>;
0512 interrupts = <12 2>;
0513 wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
0514 };
0515
0516 accel@1e {
0517 compatible = "nxp,fxos8700";
0518 reg = <0x1e>;
0519 };
0520 };
0521
0522 &ldb {
0523 status = "okay";
0524
0525 lvds-channel@0 {
0526 fsl,data-mapping = "spwg";
0527 fsl,data-width = <18>;
0528 status = "okay";
0529
0530 display-timings {
0531 native-mode = <&timing0>;
0532 timing0: hsd100pxn1 {
0533 clock-frequency = <65000000>;
0534 hactive = <1024>;
0535 vactive = <768>;
0536 hback-porch = <220>;
0537 hfront-porch = <40>;
0538 vback-porch = <21>;
0539 vfront-porch = <7>;
0540 hsync-len = <60>;
0541 vsync-len = <10>;
0542 };
0543 };
0544 };
0545 };
0546
0547 &pcie {
0548 pinctrl-names = "default";
0549 pinctrl-0 = <&pinctrl_pcie>;
0550 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
0551 status = "okay";
0552 };
0553
0554 &pwm1 {
0555 pinctrl-names = "default";
0556 pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
0557 status = "disabled";
0558 };
0559
0560 &pwm2 {
0561 pinctrl-names = "default";
0562 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
0563 status = "disabled";
0564 };
0565
0566 &pwm3 {
0567 pinctrl-names = "default";
0568 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
0569 status = "disabled";
0570 };
0571
0572 &pwm4 {
0573 #pwm-cells = <2>;
0574 pinctrl-names = "default", "state_dio";
0575 pinctrl-0 = <&pinctrl_pwm4_backlight>;
0576 pinctrl-1 = <&pinctrl_pwm4_dio>;
0577 status = "okay";
0578 };
0579
0580 &ssi1 {
0581 status = "okay";
0582 };
0583
0584 &ssi2 {
0585 status = "okay";
0586 };
0587
0588 &uart1 {
0589 pinctrl-names = "default";
0590 pinctrl-0 = <&pinctrl_uart1>;
0591 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
0592 status = "okay";
0593 };
0594
0595 &uart2 {
0596 pinctrl-names = "default";
0597 pinctrl-0 = <&pinctrl_uart2>;
0598 status = "okay";
0599 };
0600
0601 &uart5 {
0602 pinctrl-names = "default";
0603 pinctrl-0 = <&pinctrl_uart5>;
0604 status = "okay";
0605 };
0606
0607 &usbotg {
0608 vbus-supply = <®_usb_otg_vbus>;
0609 pinctrl-names = "default";
0610 pinctrl-0 = <&pinctrl_usbotg>;
0611 disable-over-current;
0612 status = "okay";
0613 };
0614
0615 &usbh1 {
0616 vbus-supply = <®_usb_h1_vbus>;
0617 status = "okay";
0618 };
0619
0620 &usdhc3 {
0621 pinctrl-names = "default", "state_100mhz", "state_200mhz";
0622 pinctrl-0 = <&pinctrl_usdhc3>;
0623 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
0624 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
0625 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
0626 vmmc-supply = <®_3p3v>;
0627 no-1-8-v; /* firmware will remove if board revision supports */
0628 status = "okay";
0629 };
0630
0631 &wdog1 {
0632 status = "disabled";
0633 };
0634
0635 &wdog2 {
0636 pinctrl-names = "default";
0637 pinctrl-0 = <&pinctrl_wdog>;
0638 fsl,ext-reset-output;
0639 status = "okay";
0640 };
0641
0642 &iomuxc {
0643 pinctrl_audmux: audmuxgrp {
0644 fsl,pins = <
0645 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
0646 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
0647 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
0648 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
0649 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
0650 MX6QDL_PAD_EIM_D25__AUD5_RXC 0x130b0
0651 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
0652 MX6QDL_PAD_EIM_D24__AUD5_RXFS 0x130b0
0653 >;
0654 };
0655
0656 pinctrl_enet: enetgrp {
0657 fsl,pins = <
0658 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0659 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0660 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0661 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0662 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0663 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0664 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0665 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0666 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0667 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0668 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0669 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0670 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0671 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0672 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0673 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0674 >;
0675 };
0676
0677 pinctrl_ecspi2: escpi2grp {
0678 fsl,pins = <
0679 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
0680 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
0681 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
0682 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
0683 >;
0684 };
0685
0686 pinctrl_flexcan1: flexcan1grp {
0687 fsl,pins = <
0688 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
0689 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
0690 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
0691 >;
0692 };
0693
0694 pinctrl_gpio_leds: gpioledsgrp {
0695 fsl,pins = <
0696 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
0697 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
0698 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
0699 >;
0700 };
0701
0702 pinctrl_gpmi_nand: gpminandgrp {
0703 fsl,pins = <
0704 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
0705 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
0706 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
0707 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
0708 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
0709 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
0710 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
0711 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
0712 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
0713 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
0714 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
0715 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
0716 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
0717 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
0718 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
0719 >;
0720 };
0721
0722 pinctrl_i2c1: i2c1grp {
0723 fsl,pins = <
0724 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0725 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0726 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
0727 >;
0728 };
0729
0730 pinctrl_i2c2: i2c2grp {
0731 fsl,pins = <
0732 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0733 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0734 >;
0735 };
0736
0737 pinctrl_i2c3: i2c3grp {
0738 fsl,pins = <
0739 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0740 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0741 >;
0742 };
0743
0744 pinctrl_pcie: pciegrp {
0745 fsl,pins = <
0746 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
0747 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
0748 >;
0749 };
0750
0751 pinctrl_pps: ppsgrp {
0752 fsl,pins = <
0753 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
0754 >;
0755 };
0756
0757 pinctrl_pwm1: pwm1grp {
0758 fsl,pins = <
0759 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
0760 >;
0761 };
0762
0763 pinctrl_pwm2: pwm2grp {
0764 fsl,pins = <
0765 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
0766 >;
0767 };
0768
0769 pinctrl_pwm3: pwm3grp {
0770 fsl,pins = <
0771 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
0772 >;
0773 };
0774
0775 pinctrl_pwm4_backlight: pwm4grpbacklight {
0776 fsl,pins = <
0777 /* LVDS_PWM J6.5 */
0778 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
0779 >;
0780 };
0781
0782 pinctrl_pwm4_dio: pwm4grpdio {
0783 fsl,pins = <
0784 /* DIO3 J16.4 */
0785 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
0786 >;
0787 };
0788
0789 pinctrl_uart1: uart1grp {
0790 fsl,pins = <
0791 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
0792 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
0793 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
0794 >;
0795 };
0796
0797 pinctrl_uart2: uart2grp {
0798 fsl,pins = <
0799 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0800 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0801 >;
0802 };
0803
0804 pinctrl_uart5: uart5grp {
0805 fsl,pins = <
0806 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0807 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0808 >;
0809 };
0810
0811 pinctrl_usbotg: usbotggrp {
0812 fsl,pins = <
0813 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0814 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
0815 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
0816 >;
0817 };
0818
0819 pinctrl_usdhc3: usdhc3grp {
0820 fsl,pins = <
0821 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0822 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0823 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0824 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0825 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0826 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0827 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
0828 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
0829 >;
0830 };
0831
0832 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
0833 fsl,pins = <
0834 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
0835 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
0836 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
0837 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
0838 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
0839 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
0840 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
0841 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
0842 >;
0843 };
0844
0845 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
0846 fsl,pins = <
0847 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
0848 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
0849 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
0850 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
0851 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
0852 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
0853 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
0854 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
0855 >;
0856 };
0857
0858 pinctrl_wdog: wdoggrp {
0859 fsl,pins = <
0860 MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0
0861 >;
0862 };
0863 };
