0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright 2013 Gateworks Corporation
0004 */
0005
0006 #include <dt-bindings/gpio/gpio.h>
0007 #include <dt-bindings/input/linux-event-codes.h>
0008 #include <dt-bindings/interrupt-controller/irq.h>
0009
0010 / {
0011 /* these are used by bootloader for disabling nodes */
0012 aliases {
0013 led0 = &led0;
0014 led1 = &led1;
0015 nand = &gpmi;
0016 usb0 = &usbh1;
0017 usb1 = &usbotg;
0018 };
0019
0020 chosen {
0021 bootargs = "console=ttymxc1,115200";
0022 };
0023
0024 gpio-keys {
0025 compatible = "gpio-keys";
0026
0027 user-pb {
0028 label = "user_pb";
0029 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
0030 linux,code = <BTN_0>;
0031 };
0032
0033 user-pb1x {
0034 label = "user_pb1x";
0035 linux,code = <BTN_1>;
0036 interrupt-parent = <&gsc>;
0037 interrupts = <0>;
0038 };
0039
0040 key-erased {
0041 label = "key-erased";
0042 linux,code = <BTN_2>;
0043 interrupt-parent = <&gsc>;
0044 interrupts = <1>;
0045 };
0046
0047 eeprom-wp {
0048 label = "eeprom_wp";
0049 linux,code = <BTN_3>;
0050 interrupt-parent = <&gsc>;
0051 interrupts = <2>;
0052 };
0053
0054 tamper {
0055 label = "tamper";
0056 linux,code = <BTN_4>;
0057 interrupt-parent = <&gsc>;
0058 interrupts = <5>;
0059 };
0060
0061 switch-hold {
0062 label = "switch_hold";
0063 linux,code = <BTN_5>;
0064 interrupt-parent = <&gsc>;
0065 interrupts = <7>;
0066 };
0067 };
0068
0069 leds {
0070 compatible = "gpio-leds";
0071 pinctrl-names = "default";
0072 pinctrl-0 = <&pinctrl_gpio_leds>;
0073
0074 led0: user1 {
0075 label = "user1";
0076 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
0077 default-state = "on";
0078 linux,default-trigger = "heartbeat";
0079 };
0080
0081 led1: user2 {
0082 label = "user2";
0083 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
0084 default-state = "off";
0085 };
0086 };
0087
0088 memory@10000000 {
0089 device_type = "memory";
0090 reg = <0x10000000 0x20000000>;
0091 };
0092
0093 pps {
0094 compatible = "pps-gpio";
0095 pinctrl-names = "default";
0096 pinctrl-0 = <&pinctrl_pps>;
0097 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
0098 status = "okay";
0099 };
0100
0101 reg_3p3v: regulator-3p3v {
0102 compatible = "regulator-fixed";
0103 regulator-name = "3P3V";
0104 regulator-min-microvolt = <3300000>;
0105 regulator-max-microvolt = <3300000>;
0106 regulator-always-on;
0107 };
0108
0109 reg_5p0v: regulator-5p0v {
0110 compatible = "regulator-fixed";
0111 regulator-name = "5P0V";
0112 regulator-min-microvolt = <5000000>;
0113 regulator-max-microvolt = <5000000>;
0114 regulator-always-on;
0115 };
0116
0117 reg_usb_otg_vbus: regulator-usb-otg-vbus {
0118 compatible = "regulator-fixed";
0119 regulator-name = "usb_otg_vbus";
0120 regulator-min-microvolt = <5000000>;
0121 regulator-max-microvolt = <5000000>;
0122 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0123 enable-active-high;
0124 };
0125 };
0126
0127 &fec {
0128 pinctrl-names = "default";
0129 pinctrl-0 = <&pinctrl_enet>;
0130 phy-mode = "rgmii-id";
0131 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
0132 status = "okay";
0133 };
0134
0135 &gpmi {
0136 pinctrl-names = "default";
0137 pinctrl-0 = <&pinctrl_gpmi_nand>;
0138 status = "okay";
0139 };
0140
0141 &hdmi {
0142 ddc-i2c-bus = <&i2c3>;
0143 status = "okay";
0144 };
0145
0146 &i2c1 {
0147 clock-frequency = <100000>;
0148 pinctrl-names = "default";
0149 pinctrl-0 = <&pinctrl_i2c1>;
0150 status = "okay";
0151
0152 gsc: gsc@20 {
0153 compatible = "gw,gsc";
0154 reg = <0x20>;
0155 interrupt-parent = <&gpio1>;
0156 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
0157 interrupt-controller;
0158 #interrupt-cells = <1>;
0159 #size-cells = <0>;
0160
0161 adc {
0162 compatible = "gw,gsc-adc";
0163 #address-cells = <1>;
0164 #size-cells = <0>;
0165
0166 channel@0 {
0167 gw,mode = <0>;
0168 reg = <0x00>;
0169 label = "temp";
0170 };
0171
0172 channel@2 {
0173 gw,mode = <1>;
0174 reg = <0x02>;
0175 label = "vdd_vin";
0176 };
0177
0178 channel@5 {
0179 gw,mode = <1>;
0180 reg = <0x05>;
0181 label = "vdd_3p3";
0182 };
0183
0184 channel@8 {
0185 gw,mode = <1>;
0186 reg = <0x08>;
0187 label = "vdd_bat";
0188 };
0189
0190 channel@b {
0191 gw,mode = <1>;
0192 reg = <0x0b>;
0193 label = "vdd_5p0";
0194 };
0195
0196 channel@e {
0197 gw,mode = <1>;
0198 reg = <0xe>;
0199 label = "vdd_arm";
0200 };
0201
0202 channel@11 {
0203 gw,mode = <1>;
0204 reg = <0x11>;
0205 label = "vdd_soc";
0206 };
0207
0208 channel@14 {
0209 gw,mode = <1>;
0210 reg = <0x14>;
0211 label = "vdd_3p0";
0212 };
0213
0214 channel@17 {
0215 gw,mode = <1>;
0216 reg = <0x17>;
0217 label = "vdd_1p5";
0218 };
0219
0220 channel@1d {
0221 gw,mode = <1>;
0222 reg = <0x1d>;
0223 label = "vdd_1p8";
0224 };
0225
0226 channel@20 {
0227 gw,mode = <1>;
0228 reg = <0x20>;
0229 label = "vdd_an1";
0230 };
0231
0232 channel@23 {
0233 gw,mode = <1>;
0234 reg = <0x23>;
0235 label = "vdd_2p5";
0236 };
0237 };
0238 };
0239
0240 gsc_gpio: gpio@23 {
0241 compatible = "nxp,pca9555";
0242 reg = <0x23>;
0243 gpio-controller;
0244 #gpio-cells = <2>;
0245 interrupt-parent = <&gsc>;
0246 interrupts = <4>;
0247 };
0248
0249 eeprom1: eeprom@50 {
0250 compatible = "atmel,24c02";
0251 reg = <0x50>;
0252 pagesize = <16>;
0253 };
0254
0255 eeprom2: eeprom@51 {
0256 compatible = "atmel,24c02";
0257 reg = <0x51>;
0258 pagesize = <16>;
0259 };
0260
0261 eeprom3: eeprom@52 {
0262 compatible = "atmel,24c02";
0263 reg = <0x52>;
0264 pagesize = <16>;
0265 };
0266
0267 eeprom4: eeprom@53 {
0268 compatible = "atmel,24c02";
0269 reg = <0x53>;
0270 pagesize = <16>;
0271 };
0272
0273 rtc: ds1672@68 {
0274 compatible = "dallas,ds1672";
0275 reg = <0x68>;
0276 };
0277 };
0278
0279 &i2c2 {
0280 clock-frequency = <100000>;
0281 pinctrl-names = "default";
0282 pinctrl-0 = <&pinctrl_i2c2>;
0283 status = "okay";
0284
0285 ltc3676: pmic@3c {
0286 compatible = "lltc,ltc3676";
0287 reg = <0x3c>;
0288 pinctrl-names = "default";
0289 pinctrl-0 = <&pinctrl_pmic>;
0290 interrupt-parent = <&gpio1>;
0291 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
0292
0293 regulators {
0294 /* VDD_SOC (1+R1/R2 = 1.635) */
0295 reg_vdd_soc: sw1 {
0296 regulator-name = "vddsoc";
0297 regulator-min-microvolt = <674400>;
0298 regulator-max-microvolt = <1308000>;
0299 lltc,fb-voltage-divider = <127000 200000>;
0300 regulator-ramp-delay = <7000>;
0301 regulator-boot-on;
0302 regulator-always-on;
0303 };
0304
0305 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
0306 reg_1p8v: sw2 {
0307 regulator-name = "vdd1p8";
0308 regulator-min-microvolt = <1033310>;
0309 regulator-max-microvolt = <2004000>;
0310 lltc,fb-voltage-divider = <301000 200000>;
0311 regulator-ramp-delay = <7000>;
0312 regulator-boot-on;
0313 regulator-always-on;
0314 };
0315
0316 /* VDD_ARM (1+R1/R2 = 1.635) */
0317 reg_vdd_arm: sw3 {
0318 regulator-name = "vddarm";
0319 regulator-min-microvolt = <674400>;
0320 regulator-max-microvolt = <1308000>;
0321 lltc,fb-voltage-divider = <127000 200000>;
0322 regulator-ramp-delay = <7000>;
0323 regulator-boot-on;
0324 regulator-always-on;
0325 };
0326
0327 /* VDD_DDR (1+R1/R2 = 2.105) */
0328 reg_vdd_ddr: sw4 {
0329 regulator-name = "vddddr";
0330 regulator-min-microvolt = <868310>;
0331 regulator-max-microvolt = <1684000>;
0332 lltc,fb-voltage-divider = <221000 200000>;
0333 regulator-ramp-delay = <7000>;
0334 regulator-boot-on;
0335 regulator-always-on;
0336 };
0337
0338 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
0339 reg_2p5v: ldo2 {
0340 regulator-name = "vdd2p5";
0341 regulator-min-microvolt = <2490375>;
0342 regulator-max-microvolt = <2490375>;
0343 lltc,fb-voltage-divider = <487000 200000>;
0344 regulator-boot-on;
0345 regulator-always-on;
0346 };
0347
0348 /* VDD_HIGH (1+R1/R2 = 4.17) */
0349 reg_3p0v: ldo4 {
0350 regulator-name = "vdd3p0";
0351 regulator-min-microvolt = <3023250>;
0352 regulator-max-microvolt = <3023250>;
0353 lltc,fb-voltage-divider = <634000 200000>;
0354 regulator-boot-on;
0355 regulator-always-on;
0356 };
0357 };
0358 };
0359 };
0360
0361 &i2c3 {
0362 clock-frequency = <100000>;
0363 pinctrl-names = "default";
0364 pinctrl-0 = <&pinctrl_i2c3>;
0365 status = "okay";
0366
0367 adv7180: camera@20 {
0368 compatible = "adi,adv7180";
0369 pinctrl-names = "default";
0370 pinctrl-0 = <&pinctrl_adv7180>;
0371 reg = <0x20>;
0372 powerdown-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
0373 interrupt-parent = <&gpio5>;
0374 interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
0375
0376 port {
0377 adv7180_to_ipu1_csi0_mux: endpoint {
0378 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
0379 bus-width = <8>;
0380 };
0381 };
0382 };
0383 };
0384
0385 &ipu1_csi0_from_ipu1_csi0_mux {
0386 bus-width = <8>;
0387 };
0388
0389 &ipu1_csi0_mux_from_parallel_sensor {
0390 remote-endpoint = <&adv7180_to_ipu1_csi0_mux>;
0391 bus-width = <8>;
0392 };
0393
0394 &ipu1_csi0 {
0395 pinctrl-names = "default";
0396 pinctrl-0 = <&pinctrl_ipu1_csi0>;
0397 };
0398
0399 &pcie {
0400 pinctrl-names = "default";
0401 pinctrl-0 = <&pinctrl_pcie>;
0402 reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
0403 status = "okay";
0404 };
0405
0406 &pwm2 {
0407 pinctrl-names = "default";
0408 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
0409 status = "disabled";
0410 };
0411
0412 &pwm3 {
0413 pinctrl-names = "default";
0414 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
0415 status = "disabled";
0416 };
0417
0418 &pwm4 {
0419 pinctrl-names = "default";
0420 pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
0421 status = "disabled";
0422 };
0423
0424 &uart1 {
0425 pinctrl-names = "default";
0426 pinctrl-0 = <&pinctrl_uart1>;
0427 status = "okay";
0428 };
0429
0430 &uart2 {
0431 pinctrl-names = "default";
0432 pinctrl-0 = <&pinctrl_uart2>;
0433 status = "okay";
0434 };
0435
0436 &uart3 {
0437 pinctrl-names = "default";
0438 pinctrl-0 = <&pinctrl_uart3>;
0439 status = "okay";
0440 };
0441
0442 &uart5 {
0443 pinctrl-names = "default";
0444 pinctrl-0 = <&pinctrl_uart5>;
0445 status = "okay";
0446 };
0447
0448 &usbotg {
0449 vbus-supply = <®_usb_otg_vbus>;
0450 pinctrl-names = "default";
0451 pinctrl-0 = <&pinctrl_usbotg>;
0452 disable-over-current;
0453 status = "okay";
0454 };
0455
0456 &usbh1 {
0457 status = "okay";
0458 };
0459
0460 &wdog1 {
0461 pinctrl-names = "default";
0462 pinctrl-0 = <&pinctrl_wdog>;
0463 fsl,ext-reset-output;
0464 };
0465
0466 &iomuxc {
0467 pinctrl_adv7180: adv7180grp {
0468 fsl,pins = <
0469 MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x0001b0b0
0470 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b0
0471 >;
0472 };
0473
0474 pinctrl_enet: enetgrp {
0475 fsl,pins = <
0476 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0477 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0478 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0479 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0480 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0481 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0482 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0483 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0484 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0485 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0486 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0487 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0488 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0489 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0490 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0491 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0492 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 /* PHY Reset */
0493 >;
0494 };
0495
0496 pinctrl_gpio_leds: gpioledsgrp {
0497 fsl,pins = <
0498 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
0499 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
0500 >;
0501 };
0502
0503 pinctrl_gpmi_nand: gpminandgrp {
0504 fsl,pins = <
0505 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
0506 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
0507 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
0508 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
0509 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
0510 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
0511 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
0512 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
0513 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
0514 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
0515 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
0516 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
0517 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
0518 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
0519 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
0520 >;
0521 };
0522
0523 pinctrl_i2c1: i2c1grp {
0524 fsl,pins = <
0525 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
0526 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
0527 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
0528 >;
0529 };
0530
0531 pinctrl_i2c2: i2c2grp {
0532 fsl,pins = <
0533 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0534 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0535 >;
0536 };
0537
0538 pinctrl_i2c3: i2c3grp {
0539 fsl,pins = <
0540 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0541 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0542 >;
0543 };
0544
0545 pinctrl_ipu1_csi0: ipu1csi0grp {
0546 fsl,pins = <
0547 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
0548 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
0549 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
0550 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
0551 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
0552 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
0553 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
0554 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
0555 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
0556 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
0557 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
0558 >;
0559 };
0560
0561 pinctrl_pcie: pciegrp {
0562 fsl,pins = <
0563 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
0564 >;
0565 };
0566
0567 pinctrl_pmic: pmicgrp {
0568 fsl,pins = <
0569 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
0570 >;
0571 };
0572
0573 pinctrl_pps: ppsgrp {
0574 fsl,pins = <
0575 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
0576 >;
0577 };
0578
0579 pinctrl_pwm2: pwm2grp {
0580 fsl,pins = <
0581 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
0582 >;
0583 };
0584
0585 pinctrl_pwm3: pwm3grp {
0586 fsl,pins = <
0587 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
0588 >;
0589 };
0590
0591 pinctrl_pwm4: pwm4grp {
0592 fsl,pins = <
0593 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
0594 >;
0595 };
0596
0597 pinctrl_uart1: uart1grp {
0598 fsl,pins = <
0599 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
0600 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
0601 >;
0602 };
0603
0604 pinctrl_uart2: uart2grp {
0605 fsl,pins = <
0606 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0607 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0608 >;
0609 };
0610
0611 pinctrl_uart3: uart3grp {
0612 fsl,pins = <
0613 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0614 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0615 >;
0616 };
0617
0618 pinctrl_uart5: uart5grp {
0619 fsl,pins = <
0620 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0621 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0622 >;
0623 };
0624
0625 pinctrl_usbotg: usbotggrp {
0626 fsl,pins = <
0627 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0628 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* OTG_PWR_EN */
0629 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x17059
0630 >;
0631 };
0632
0633 pinctrl_wdog: wdoggrp {
0634 fsl,pins = <
0635 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
0636 >;
0637 };
0638 };
