0001 // SPDX-License-Identifier: (GPL-2.0 or MIT)
0002 //
0003 // Copyright (C) 2018 emtrion GmbH
0004 //
0005
0006 #include <dt-bindings/gpio/gpio.h>
0007 #include <dt-bindings/pwm/pwm.h>
0008 #include <dt-bindings/input/input.h>
0009
0010 / {
0011
0012 model = "emtrion SoM emCON-MX6";
0013 compatible = "emtrion,emcon-mx6";
0014
0015 aliases {
0016 mmc0 = &usdhc3;
0017 mmc1 = &usdhc2;
0018 mmc2 = &usdhc1;
0019 rtc0 = &ds1307;
0020 };
0021
0022 chosen {
0023 stdout-path = &uart1;
0024 };
0025
0026 memory@10000000 {
0027 device_type = "memory";
0028 reg = <0x10000000 0x40000000>;
0029 };
0030
0031 gpio-keys {
0032 compatible = "gpio-keys";
0033 pinctrl-names = "default";
0034 pinctrl-0 = <&pinctrl_emcon_wake>;
0035
0036 wake {
0037 label = "Wake";
0038 linux,code = <KEY_WAKEUP>;
0039 gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
0040 wakeup-source;
0041 };
0042 };
0043
0044 som_leds: leds {
0045 compatible = "gpio-leds";
0046 pinctrl-names = "default";
0047 pinctrl-0 = <&pinctrl_som_leds>;
0048
0049 green {
0050 label = "som:green";
0051 gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
0052 linux,default-trigger = "heartbeat";
0053 default-state = "on";
0054 };
0055
0056 red {
0057 label = "som:red";
0058 gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
0059 default-state = "keep";
0060 };
0061
0062 };
0063
0064 lvds_backlight: lvds-backlight {
0065 compatible = "pwm-backlight";
0066 pinctrl-names = "default";
0067 pinctrl-0 = <&pinctrl_lvds_bl>;
0068 enable-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>;
0069 pwms = <&pwm1 0 50000>;
0070 brightness-levels = <
0071 0 4 8 16 32 64 80 96 112
0072 128 144 160 176 250
0073 >;
0074 default-brightness-level = <13>;
0075 status = "okay";
0076 };
0077
0078 pwm_fan: pwm-fan {
0079 compatible = "pwm-fan";
0080 #cooling-cells = <2>;
0081 pwms = <&pwm4 0 50000>;
0082 cooling-levels = <0 64 127 191 255>;
0083 status = "disabled";
0084 };
0085
0086
0087 rgb_encoder: display {
0088 compatible = "fsl,imx-parallel-display";
0089 #address-cells = <1>;
0090 #size-cells = <0>;
0091 pinctrl-names = "default";
0092 pinctrl-0 = <&pinctrl_rgb24_display>;
0093 status = "disabled";
0094
0095 port@0 {
0096 reg = <0>;
0097
0098 rgb_encoder_in: endpoint {
0099 remote-endpoint = <&ipu1_di0_disp0>;
0100 };
0101 };
0102
0103 port@1 {
0104 reg = <1>;
0105
0106 rgb_encoder_out: endpoint {
0107 remote-endpoint = <&rgb_panel_in>;
0108 };
0109 };
0110 };
0111
0112 rgb_panel: lcd {
0113 backlight = <&rgb_backlight>;
0114 power-supply = <®_parallel_disp>;
0115
0116 port {
0117 rgb_panel_in: endpoint {
0118 remote-endpoint = <&rgb_encoder_out>;
0119 };
0120 };
0121 };
0122
0123 reg_parallel_disp: reg-parallel-display {
0124 compatible = "regulator-fixed";
0125 pinctrl-names = "default";
0126 pinctrl-0 = <&pinctrl_rgb_bl_en>;
0127 regulator-name = "LCD-Supply";
0128 regulator-min-microvolt = <5000000>;
0129 regulator-max-microvolt = <5000000>;
0130 gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>;
0131 enable-active-high;
0132 };
0133
0134 reg_lvds_disp: reg-lvds-display {
0135 compatible = "regulator-fixed";
0136 regulator-name = "LVDS-Supply";
0137 regulator-min-microvolt = <5000000>;
0138 regulator-max-microvolt = <5000000>;
0139 gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
0140 enable-active-high;
0141 };
0142
0143 rgb_backlight: rgb-backlight {
0144 compatible = "pwm-backlight";
0145 pinctrl-names = "default";
0146 pinctrl-0 = <&pinctrl_rgb_bl>;
0147 enable-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
0148 pwms = <&pwm3 0 5000000>;
0149 brightness-levels = <
0150 250 176 160 144 128 112
0151 96 80 64 48 32 16 8 1
0152 >;
0153 default-brightness-level = <13>;
0154 status = "okay";
0155 };
0156 };
0157
0158 &can1 {
0159 pinctrl-names = "default";
0160 pinctrl-0 = <&pinctrl_can1>;
0161 };
0162
0163 &can2 {
0164 pinctrl-names = "default";
0165 pinctrl-0 = <&pinctrl_can2>;
0166 };
0167
0168 &ecspi2 {
0169 pinctrl-names = "default";
0170 pinctrl-0 = <&pinctrl_ecspi2>;
0171 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>,
0172 <&gpio2 27 GPIO_ACTIVE_LOW>;
0173 };
0174
0175 &ecspi4 {
0176 pinctrl-names = "default";
0177 pinctrl-0 = <&pinctrl_nor_flash>;
0178 };
0179
0180 &fec {
0181 pinctrl-names = "default";
0182 pinctrl-0 = <&pinctrl_enet>;
0183 phy-mode = "rgmii";
0184 phy-reset-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
0185 phy-reset-duration = <50>;
0186 phy-supply = <&vdd_1V8_reg>;
0187 phy-handle = <&ksz9031>;
0188 status = "okay";
0189
0190 mdio {
0191 #address-cells = <1>;
0192 #size-cells = <0>;
0193
0194 ksz9031: phy@0 {
0195 compatible = "ethernet-phy-ieee802.3-c22";
0196 reg = <0>;
0197 interrupt-parent = <&gpio1>;
0198 interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
0199 rxdv-skew-ps = <480>;
0200 txen-skew-ps = <480>;
0201 rxd0-skew-ps = <480>;
0202 rxd1-skew-ps = <480>;
0203 rxd2-skew-ps = <480>;
0204 rxd3-skew-ps = <480>;
0205 txd0-skew-ps = <420>;
0206 txd1-skew-ps = <420>;
0207 txd2-skew-ps = <360>;
0208 txd3-skew-ps = <360>;
0209 txc-skew-ps = <1020>;
0210 rxc-skew-ps = <960>;
0211 };
0212 };
0213 };
0214
0215 &i2c1 {
0216 clock-frequency = <100000>;
0217 pinctrl-names = "default";
0218 pinctrl-0 = <&pinctrl_i2c1>;
0219 status = "okay";
0220
0221 da9063: pmic@58 {
0222 compatible = "dlg,da9063";
0223 reg = <0x58>;
0224 pinctrl-names = "default";
0225 pinctrl-0 = <&pinctrl_pmic>;
0226 interrupt-parent = <&gpio2>;
0227 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
0228 interrupt-controller;
0229
0230 onkey {
0231 compatible = "dlg,da9063-onkey";
0232 wakeup-source;
0233 };
0234
0235 watchdog {
0236 compatible = "dlg,da9063-watchdog";
0237 timeout-sec = <0>;
0238 };
0239
0240 regulators {
0241 vddcore_reg: bcore1 {
0242 regulator-min-microvolt = <1100000>;
0243 regulator-max-microvolt = <1450000>;
0244 regulator-ramp-delay = <2>;
0245 regulator-name = "DA9063_CORE";
0246 regulator-always-on;
0247 };
0248
0249 vddsoc_reg: bcore2 {
0250 regulator-min-microvolt = <1100000>;
0251 regulator-max-microvolt = <1450000>;
0252 regulator-ramp-delay = <2>;
0253 regulator-name = "DA9063_SOC";
0254 regulator-always-on;
0255 };
0256
0257 vdd_ddr3_reg: bpro {
0258 regulator-min-microvolt = <1500000>;
0259 regulator-max-microvolt = <1500000>;
0260 regulator-ramp-delay = <2>;
0261 regulator-always-on;
0262 };
0263
0264 vdd_3v3_reg: bperi {
0265 regulator-min-microvolt = <3300000>;
0266 regulator-max-microvolt = <3300000>;
0267 regulator-ramp-delay = <2>;
0268 regulator-always-on;
0269 };
0270
0271 vdd_sata_reg: ldo3 {
0272 regulator-min-microvolt = <2500000>;
0273 regulator-max-microvolt = <2500000>;
0274 regulator-always-on;
0275 };
0276 vdd_mipi_reg: ldo4 {
0277 regulator-min-microvolt = <2500000>;
0278 regulator-max-microvolt = <2500000>;
0279 regulator-always-on;
0280 };
0281
0282 vdd_mx6_snvs_reg: ldo5 {
0283 regulator-min-microvolt = <3300000>;
0284 regulator-max-microvolt = <3300000>;
0285 regulator-always-on;
0286 };
0287
0288 vdd_hdmi_reg: ldo6 {
0289 regulator-min-microvolt = <2500000>;
0290 regulator-max-microvolt = <2500000>;
0291 regulator-always-on;
0292 regulator-boot-on;
0293 };
0294
0295 vdd_pcie_reg: ldo7 {
0296 regulator-min-microvolt = <2500000>;
0297 regulator-max-microvolt = <2500000>;
0298 regulator-always-on;
0299 };
0300
0301 vdd_1V8_reg: ldo8 {
0302 regulator-min-microvolt = <1800000>;
0303 regulator-max-microvolt = <1800000>;
0304 regulator-always-on;
0305 };
0306
0307 vdd_3V3_sdc_reg: ldo9 {
0308 regulator-min-microvolt = <1800000>;
0309 regulator-max-microvolt = <3300000>;
0310 regulator-always-on;
0311 };
0312
0313 vdd_1V2_reg: ldo10 {
0314 regulator-min-microvolt = <1200000>;
0315 regulator-max-microvolt = <1200000>;
0316 regulator-always-on;
0317 };
0318 };
0319 };
0320
0321 ds1307: rtc@68 {
0322 compatible = "dallas,ds1307";
0323 reg = <0x68>;
0324 };
0325 };
0326
0327 &i2c2 {
0328 clock-frequency = <100000>;
0329 pinctrl-names = "default";
0330 pinctrl-0 = <&pinctrl_i2c2>;
0331 };
0332
0333 &iomuxc {
0334
0335 pinctrl_audmux: audmuxgrp {
0336 fsl,pins = <
0337 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0338 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b060
0339 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130B0
0340 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b060
0341 >;
0342 };
0343
0344 pinctrl_can1: can1grp {
0345 fsl,pins = <
0346 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
0347 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
0348 >;
0349 };
0350
0351 pinctrl_can2: can2grp {
0352 fsl,pins = <
0353 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b1
0354 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b1
0355 >;
0356 };
0357
0358 pinctrl_cpi1: csi0grp {
0359 fsl,pins = <
0360 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1
0361 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b1
0362 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b1
0363 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b1
0364 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b1
0365 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b1
0366 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b1
0367 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b1
0368 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b1
0369 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b1
0370 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b1
0371 >;
0372 };
0373
0374 /*camera2-pinctrl is in imx6q-emcon.dtsi or imx6dl-emcon.dtsi*/
0375
0376 pinctrl_ecspi2: ecspi2grp {
0377 fsl,pins = <
0378 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
0379 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
0380 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
0381 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x100b1
0382 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
0383 >;
0384 };
0385
0386 pinctrl_emcon_gpio1: emcongpio1 {
0387 fsl,pins = <
0388 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x0b0b1
0389 >;
0390 };
0391
0392 pinctrl_emcon_gpio2: emcongpio2 {
0393 fsl,pins = <
0394 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x0b0b1
0395 >;
0396 };
0397
0398 pinctrl_emcon_gpio3: emcongpio3 {
0399 fsl,pins = <
0400 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x0b0b1
0401 >;
0402 };
0403
0404 pinctrl_emcon_gpio4: emcongpio4 {
0405 fsl,pins = <
0406 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x0b0b1
0407 >;
0408 };
0409
0410 pinctrl_emcon_gpio5: emcongpio5 {
0411 fsl,pins = <
0412 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x0b0b1
0413 >;
0414 };
0415
0416 pinctrl_emcon_gpio6: emcongpio6 {
0417 fsl,pins = <
0418 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x0b0b1
0419 >;
0420 };
0421
0422 pinctrl_emcon_gpio7: emcongpio7 {
0423 fsl,pins = <
0424 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x0b0b1
0425 >;
0426 };
0427
0428 pinctrl_emcon_gpio8: emcongpio8 {
0429 fsl,pins = <
0430 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x0b0b1
0431 >;
0432 };
0433
0434 pinctrl_emcon_irq_a: emconirqa {
0435 fsl,pins = <
0436 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x0b0b1
0437 >;
0438 };
0439
0440 pinctrl_emcon_irq_b: emconirqb {
0441 fsl,pins = <
0442 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x0b0b1
0443 >;
0444 };
0445
0446 pinctrl_emcon_irq_c: emconirqc {
0447 fsl,pins = <
0448 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x0b0b1
0449 >;
0450 };
0451
0452 pinctrl_emcon_irq_pwr: emconirqpwr {
0453 fsl,pins = <
0454 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x0b0b1
0455 >;
0456 };
0457
0458 pinctrl_emcon_wake: emconwake {
0459 fsl,pins = <
0460 MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b0b1
0461 >;
0462 };
0463
0464 pinctrl_enet: enetgrp {
0465 fsl,pins = <
0466 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b030
0467 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b030
0468 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0469 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0470 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0471 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0472 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0473 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0474 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x4001a0b1
0475 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0476 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0477 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0478 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0479 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0480 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
0481 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b058
0482 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0
0483 >;
0484 };
0485
0486 pinctrl_i2c1: i2c1grp {
0487 fsl,pins = <
0488 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
0489 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
0490 >;
0491 };
0492
0493 pinctrl_i2c2: i2c2grp {
0494 fsl,pins = <
0495 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0496 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0497 >;
0498 };
0499
0500 pinctrl_i2c3: i2c3grp {
0501 fsl,pins = <
0502 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4000b070
0503 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b870
0504 >;
0505 };
0506
0507 pinctrl_irq_touch1: irqtouch1 {
0508 fsl,pins = <
0509 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x0b0b1
0510 >;
0511 };
0512
0513 pinctrl_irq_touch2: irqtouch2 {
0514 fsl,pins = <
0515 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x0b0b1
0516 >;
0517 };
0518
0519 pinctrl_lvds_bl: lvdsbacklightgrp {
0520 fsl,pins = <
0521 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x0b0b1
0522 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b1
0523 >;
0524 };
0525
0526 pinctrl_lvds_reg: lvdsreggrp {
0527 fsl,pins = <
0528 MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x0b0b1
0529 >;
0530 };
0531
0532
0533 pinctrl_nor_flash: norflashgrp {
0534 fsl,pins = <
0535 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b1
0536 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
0537 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
0538 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
0539 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1
0540 >;
0541 };
0542
0543 pinctrl_pcie_ctrl: pciegrp {
0544 fsl,pins = <
0545 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b1
0546 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
0547 >;
0548 };
0549
0550 pinctrl_pmic: pmicgrp {
0551 fsl,pins = <
0552 MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x0b0b1
0553 >;
0554 };
0555
0556 pinctrl_pwm_fan: pwmfan {
0557 fsl,pins = <
0558 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x0b0b1
0559 >;
0560 };
0561
0562 pinctrl_rgb_bl: rgbbacklightgrp {
0563 fsl,pins = <
0564 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x0b0b1
0565 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0b0b1
0566 >;
0567 };
0568
0569 pinctrl_rgb_bl_en: rgbenable {
0570 fsl,pins = <
0571 MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x0b0b1
0572 >;
0573 };
0574
0575 pinctrl_rgb24_display: rgbgrp {
0576 fsl,pins = <
0577 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
0578 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
0579 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
0580 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
0581 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
0582 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
0583 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
0584 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
0585 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
0586 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
0587 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
0588 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
0589 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
0590 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
0591 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
0592 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
0593 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
0594 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
0595 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
0596 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
0597 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
0598 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
0599 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
0600 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
0601 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
0602 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
0603 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
0604 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
0605 >;
0606 };
0607
0608 pinctrl_secure: securegrp {
0609 fsl,pins = <
0610 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1
0611 >;
0612 };
0613
0614 pinctrl_som_leds: somledgrp {
0615 fsl,pins = <
0616 MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x0b0b1
0617 MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x0b0b1
0618 >;
0619 };
0620
0621 pinctrl_spdif_in: spdifin {
0622 fsl,pins = <
0623 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
0624 >;
0625 };
0626
0627 pinctrl_spdif_out: spdifout {
0628 fsl,pins = <
0629 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
0630 >;
0631 };
0632
0633 pinctrl_uart1: uart1grp {
0634 fsl,pins = <
0635 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0636 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0637 >;
0638 };
0639
0640 pinctrl_uart2: uart2grp {
0641 fsl,pins = <
0642 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
0643 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
0644 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
0645 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
0646 >;
0647 };
0648
0649 pinctrl_uart3: uart3grp {
0650 fsl,pins = <
0651 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0652 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0653 >;
0654 };
0655
0656 pinctrl_uart4: uart4grp {
0657 fsl,pins = <
0658 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
0659 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
0660 >;
0661 };
0662
0663 pinctrl_uart5: uart5grp {
0664 fsl,pins = <
0665 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0666 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0667 >;
0668 };
0669
0670 pinctrl_usb_host1: usbhgrp {
0671 fsl,pins = <
0672 MX6QDL_PAD_EIM_D31__USB_H1_PWR 0x1B058
0673 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1B058
0674 >;
0675 };
0676
0677 pinctrl_usb_otg: usbotggrp {
0678 fsl,pins = <
0679 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
0680 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x17059
0681 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x17059
0682 >;
0683 };
0684
0685 pinctrl_usdhc1: usdhc1grp {
0686 fsl,pins = <
0687 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
0688 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
0689 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
0690 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
0691 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
0692 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
0693 MX6QDL_PAD_GPIO_1__SD1_CD_B 0x1b0b1
0694 MX6QDL_PAD_DI0_PIN4__SD1_WP 0x1b0b1
0695 >;
0696 };
0697
0698 pinctrl_usdhc2: usdhc2grp {
0699 fsl,pins = <
0700 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0701 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0702 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0703 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0704 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0705 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0706 MX6QDL_PAD_GPIO_4__SD2_CD_B 0x1b0b1
0707 MX6QDL_PAD_GPIO_2__SD2_WP 0x1b0b1
0708 >;
0709 };
0710
0711 pinctrl_usdhc3: usdhc3grp {
0712 fsl,pins = <
0713 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0714 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0715 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0716 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0717 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0718 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0719 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
0720 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
0721 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
0722 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
0723 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
0724 >;
0725 };
0726 };
0727
0728 &ipu1_di0_disp0 {
0729 remote-endpoint = <&rgb_encoder_in>;
0730 };
0731
0732 &pcie {
0733 pinctrl-names = "default";
0734 pinctrl-0 = <&pinctrl_pcie_ctrl>;
0735 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
0736 disable-gpio = <&gpio2 22 GPIO_ACTIVE_LOW>;
0737 };
0738
0739 &pwm1 {
0740 #pwm-cells = <2>;
0741 status = "okay";
0742 };
0743
0744 &pwm3 {
0745 #pwm-cells = <2>;
0746 status = "okay";
0747 };
0748
0749 &pwm4 {
0750 #pwm-cells = <2>;
0751 status = "okay";
0752 };
0753
0754 &uart1 {
0755 pinctrl-names = "default";
0756 pinctrl-0 = <&pinctrl_uart1>;
0757 status = "okay";
0758 };
0759
0760 &uart2 {
0761 pinctrl-names = "default";
0762 pinctrl-0 = <&pinctrl_uart2>;
0763 };
0764
0765 &uart3 {
0766 pinctrl-names = "default";
0767 pinctrl-0 = <&pinctrl_uart3>;
0768 };
0769
0770 &uart4 {
0771 pinctrl-names = "default";
0772 pinctrl-0 = <&pinctrl_uart4>;
0773 };
0774
0775 &uart5 {
0776 pinctrl-names = "default";
0777 pinctrl-0 = <&pinctrl_uart5>;
0778 };
0779
0780 &usbh1 {
0781 pinctrl-names = "default";
0782 pinctrl-0 = <&pinctrl_usb_host1>;
0783 };
0784
0785 &usbotg {
0786 pinctrl-names = "default";
0787 pinctrl-0 = <&pinctrl_usb_otg>;
0788 vbus-supply = <®_usb_otg>;
0789 dr_mode = "peripheral";
0790 };
0791
0792 &usdhc1 {
0793 pinctrl-names = "default";
0794 pinctrl-0 = <&pinctrl_usdhc1>;
0795 fsl,wp-controller;
0796 };
0797
0798 &usdhc2 {
0799 pinctrl-names = "default";
0800 pinctrl-0 = <&pinctrl_usdhc2>;
0801 fsl,wp-controller;
0802 };
0803
0804 &usdhc3 {
0805 pinctrl-names = "default";
0806 pinctrl-0 = <&pinctrl_usdhc3>;
0807 non-removable;
0808 bus-width = <8>;
0809 status = "okay";
0810 };
0811
0812 /******device power Management*********/
0813
0814 &cpu0 {
0815 voltage-tolerance = <2>;
0816 };
0817
0818 ®_arm {
0819 vin-supply = <&vddcore_reg>;
0820 };
0821
0822 ®_soc {
0823 vin-supply = <&vddsoc_reg>;
0824 };
0825
0826 ®_pu {
0827 vin-supply = <&vddsoc_reg>;
0828 };
0829
0830 /*******Disabled HW following***********/
0831
0832 &snvs_rtc {
0833 status = "disabled";
0834 };
