0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003 * Copyright (C) 2021 DH electronics GmbH
0004 */
0005
0006 / {
0007 chosen {
0008 stdout-path = "serial0:115200n8";
0009 };
0010 };
0011
0012 /*
0013 * Special SoM hardware required which uses the pins from micro SD card. The
0014 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
0015 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
0016 * card must be disabled and the uart1 rts/cts must be output on other DHCOM
0017 * pins, see uart1 and usdhc3 node below.
0018 */
0019 &can2 {
0020 status = "okay";
0021 };
0022
0023 &gpio1 {
0024 /*
0025 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
0026 * GPIO line, however the i.MX6 UART driver assumes RX happens
0027 * during TX anyway and that it only controls drive enable DE
0028 * line. Hence, the RX is always enabled here.
0029 */
0030 rs485-rx-en-hog {
0031 gpio-hog;
0032 gpios = <18 0>; /* GPIO Q */
0033 line-name = "rs485-rx-en";
0034 output-low;
0035 };
0036 };
0037
0038 &gpio3 {
0039 gpio-line-names =
0040 "", "", "", "", "", "", "", "",
0041 "", "", "", "", "", "", "", "",
0042 "", "", "", "", "", "", "", "",
0043 "", "", "", "DRC02-In1", "", "", "", "";
0044 };
0045
0046 &gpio4 {
0047 gpio-line-names =
0048 "", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H",
0049 "DHCOM-I", "DRC02-HW0", "", "", "", "", "", "",
0050 "", "", "", "", "DRC02-Out1", "", "", "",
0051 "", "", "", "", "", "", "", "";
0052 };
0053
0054 &gpio6 {
0055 gpio-line-names =
0056 "", "", "", "DRC02-Out2", "", "", "SOM-HW1", "",
0057 "", "", "", "", "", "", "DRC02-HW2", "DRC02-HW1",
0058 "", "", "", "", "", "", "", "",
0059 "", "", "", "", "", "", "", "";
0060 };
0061
0062 &i2c1 {
0063 eeprom@50 {
0064 compatible = "atmel,24c04";
0065 reg = <0x50>;
0066 pagesize = <16>;
0067 };
0068 };
0069
0070 &uart1 {
0071 /*
0072 * Due to the use of can2 the signals for can2 Tx and Rx are routed to
0073 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
0074 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
0075 */
0076 /delete-property/ uart-has-rtscts;
0077 cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
0078 pinctrl-0 = <&pinctrl_uart1 &pinctrl_dhcom_i &pinctrl_dhcom_m>;
0079 pinctrl-names = "default";
0080 rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
0081 };
0082
0083 &uart5 {
0084 /*
0085 * On DRC02 this UART is used as RS485 interface and RS485_TX_En is
0086 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property
0087 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via
0088 * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1
0089 * node above.
0090 */
0091 /delete-property/ uart-has-rtscts;
0092 linux,rs485-enabled-at-boot-time;
0093 pinctrl-0 = <&pinctrl_uart5_core &pinctrl_dhcom_p &pinctrl_dhcom_q>;
0094 pinctrl-names = "default";
0095 rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
0096 };
0097
0098 &usbh1 {
0099 disable-over-current;
0100 };
0101
0102 &usdhc2 { /* SD card */
0103 status = "okay";
0104 };
0105
0106 &usdhc3 {
0107 /*
0108 * Due to the use of can2 the micro SD card on module have to be
0109 * disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as
0110 * can2 Tx and Rx.
0111 */
0112 status = "disabled";
0113 };
0114
0115 &iomuxc {
0116 pinctrl-0 = <
0117 /*
0118 * The following DHCOM GPIOs are used on this board.
0119 * Therefore, they have been removed from the list below.
0120 * I: uart1 rts
0121 * M: uart1 cts
0122 * P: uart5 rs485-tx-en
0123 * Q: uart5 rs485-rx-en
0124 */
0125 &pinctrl_hog_base
0126 &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
0127 &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
0128 &pinctrl_dhcom_g &pinctrl_dhcom_h
0129 &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
0130 &pinctrl_dhcom_n &pinctrl_dhcom_o
0131 &pinctrl_dhcom_r
0132 &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
0133 &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
0134 >;
0135 pinctrl-names = "default";
0136
0137 pinctrl_uart5_core: uart5-core-grp {
0138 fsl,pins = <
0139 MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
0140 MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
0141 >;
0142 };
0143 };
