0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * support fot the imx6 based aristainetos board
0004 *
0005 * Copyright (C) 2014 Heiko Schocher <hs@denx.de>
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009
0010 / {
0011
0012 reg_2p5v: regulator-2p5v {
0013 compatible = "regulator-fixed";
0014 regulator-name = "2P5V";
0015 regulator-min-microvolt = <2500000>;
0016 regulator-max-microvolt = <2500000>;
0017 regulator-always-on;
0018 };
0019
0020 reg_3p3v: regulator-3p3v {
0021 compatible = "regulator-fixed";
0022 regulator-name = "3P3V";
0023 regulator-min-microvolt = <3300000>;
0024 regulator-max-microvolt = <3300000>;
0025 regulator-always-on;
0026 };
0027
0028 reg_usbh1_vbus: regulator-usbh1-vbus {
0029 compatible = "regulator-fixed";
0030 enable-active-high;
0031 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
0032 pinctrl-names = "default";
0033 pinctrl-0 = <&pinctrl_aristainetos_usbh1_vbus>;
0034 regulator-name = "usb_h1_vbus";
0035 regulator-min-microvolt = <5000000>;
0036 regulator-max-microvolt = <5000000>;
0037 };
0038
0039 reg_usbotg_vbus: regulator-usbotg-vbus {
0040 compatible = "regulator-fixed";
0041 enable-active-high;
0042 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
0043 pinctrl-names = "default";
0044 pinctrl-0 = <&pinctrl_aristainetos_usbotg_vbus>;
0045 regulator-name = "usb_otg_vbus";
0046 regulator-min-microvolt = <5000000>;
0047 regulator-max-microvolt = <5000000>;
0048 };
0049 };
0050
0051 &audmux {
0052 pinctrl-names = "default";
0053 pinctrl-0 = <&pinctrl_audmux>;
0054 status = "okay";
0055 };
0056
0057 &can1 {
0058 pinctrl-names = "default";
0059 pinctrl-0 = <&pinctrl_flexcan1>;
0060 status = "okay";
0061 };
0062
0063 &can2 {
0064 pinctrl-names = "default";
0065 pinctrl-0 = <&pinctrl_flexcan2>;
0066 status = "okay";
0067 };
0068
0069 &i2c1 {
0070 clock-frequency = <100000>;
0071 pinctrl-names = "default";
0072 pinctrl-0 = <&pinctrl_i2c1>;
0073 status = "okay";
0074
0075 tmp103: tmp103@71 {
0076 compatible = "ti,tmp103";
0077 reg = <0x71>;
0078 };
0079 };
0080
0081 &i2c3 {
0082 clock-frequency = <100000>;
0083 pinctrl-names = "default";
0084 pinctrl-0 = <&pinctrl_i2c3>;
0085 status = "okay";
0086
0087 rtc@68 {
0088 compatible = "dallas,m41t00";
0089 reg = <0x68>;
0090 };
0091 };
0092
0093 &ecspi4 {
0094 cs-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
0095 pinctrl-names = "default";
0096 pinctrl-0 = <&pinctrl_ecspi4>;
0097 status = "okay";
0098
0099 flash: flash@0 {
0100 #address-cells = <1>;
0101 #size-cells = <1>;
0102 compatible = "micron,n25q128a11", "jedec,spi-nor";
0103 spi-max-frequency = <20000000>;
0104 reg = <0>;
0105 };
0106 };
0107
0108 &fec {
0109 pinctrl-names = "default";
0110 pinctrl-0 = <&pinctrl_enet>;
0111 phy-mode = "rmii";
0112 phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
0113 status = "okay";
0114 };
0115
0116 &gpmi {
0117 pinctrl-names = "default";
0118 pinctrl-0 = <&pinctrl_gpmi_nand>;
0119 status = "okay";
0120 };
0121
0122 &pcie {
0123 status = "okay";
0124 };
0125
0126 &uart2 {
0127 pinctrl-names = "default";
0128 pinctrl-0 = <&pinctrl_uart2>;
0129 status = "okay";
0130 };
0131
0132
0133 &uart4 {
0134 pinctrl-names = "default";
0135 pinctrl-0 = <&pinctrl_uart4>;
0136 uart-has-rtscts;
0137 status = "okay";
0138 };
0139
0140 &uart5 {
0141 pinctrl-names = "default";
0142 pinctrl-0 = <&pinctrl_uart5>;
0143 uart-has-rtscts;
0144 status = "okay";
0145 };
0146
0147 &usbh1 {
0148 vbus-supply = <®_usbh1_vbus>;
0149 dr_mode = "host";
0150 status = "okay";
0151 };
0152
0153 &usbotg {
0154 vbus-supply = <®_usbotg_vbus>;
0155 pinctrl-names = "default";
0156 pinctrl-0 = <&pinctrl_usbotg>;
0157 disable-over-current;
0158 dr_mode = "host";
0159 status = "okay";
0160 };
0161
0162 &usdhc1 {
0163 pinctrl-names = "default";
0164 pinctrl-0 = <&pinctrl_usdhc1>;
0165 vmmc-supply = <®_3p3v>;
0166 cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
0167 status = "okay";
0168 };
0169
0170 &usdhc2 {
0171 pinctrl-names = "default";
0172 pinctrl-0 = <&pinctrl_usdhc2>;
0173 vmmc-supply = <®_3p3v>;
0174 cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
0175 status = "okay";
0176 };
0177
0178 &iomuxc {
0179 pinctrl-names = "default";
0180 pinctrl-0 = <&pinctrl_hog &pinctrl_gpio>;
0181
0182 imx6qdl-aristainetos {
0183 pinctrl_aristainetos_usbh1_vbus: aristainetos-usbh1-vbus {
0184 fsl,pins = <MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0>;
0185 };
0186
0187 pinctrl_aristainetos_usbotg_vbus: aristainetos-usbotg-vbus {
0188 fsl,pins = <MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0>;
0189 };
0190
0191 pinctrl_audmux: audmuxgrp {
0192 fsl,pins = <
0193 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0
0194 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0
0195 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0
0196 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
0197 >;
0198 };
0199
0200 pinctrl_backlight: backlightgrp {
0201 fsl,pins = <
0202 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b0
0203 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b0
0204 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
0205 >;
0206 };
0207
0208 pinctrl_ecspi2: ecspi2grp {
0209 fsl,pins = <
0210 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
0211 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
0212 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
0213 MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x100b1
0214 >;
0215 };
0216
0217 pinctrl_ecspi4: ecspi4grp {
0218 fsl,pins = <
0219 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
0220 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
0221 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
0222 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x100b1
0223 MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */
0224 >;
0225 };
0226
0227 pinctrl_enet: enetgrp {
0228 fsl,pins = <
0229 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0230 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0231 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0232 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
0233 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
0234 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
0235 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
0236 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
0237 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
0238 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
0239 >;
0240 };
0241
0242 pinctrl_flexcan1: flexcan1grp {
0243 fsl,pins = <
0244 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
0245 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
0246 >;
0247 };
0248
0249 pinctrl_flexcan2: flexcan2grp {
0250 fsl,pins = <
0251 MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
0252 MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
0253 >;
0254 };
0255
0256 pinctrl_gpio: gpiogrp {
0257 fsl,pins = <
0258 MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0
0259 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
0260 MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
0261 MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0
0262 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0
0263 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
0264 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
0265 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
0266 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
0267 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
0268 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
0269 >;
0270 };
0271
0272 pinctrl_gpmi_nand: gpminandgrp {
0273 fsl,pins = <
0274 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
0275 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
0276 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
0277 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
0278 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
0279 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
0280 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
0281 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
0282 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
0283 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
0284 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
0285 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
0286 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
0287 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
0288 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
0289 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
0290 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
0291 >;
0292 };
0293
0294 pinctrl_hog: hoggrp {
0295 fsl,pins = <
0296 MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x10
0297 >;
0298 };
0299
0300 pinctrl_i2c1: i2c1grp {
0301 fsl,pins = <
0302 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
0303 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
0304 >;
0305 };
0306
0307 pinctrl_i2c2: i2c2grp {
0308 fsl,pins = <
0309 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0310 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0311 >;
0312 };
0313
0314 pinctrl_i2c3: i2c3grp {
0315 fsl,pins = <
0316 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
0317 MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
0318 >;
0319 };
0320
0321 pinctrl_ipu_disp: ipudisp1grp {
0322 fsl,pins = <
0323 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
0324 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
0325 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
0326 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
0327 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x20000
0328 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
0329 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
0330 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
0331 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
0332 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
0333 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
0334 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
0335 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
0336 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
0337 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
0338 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
0339 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
0340 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
0341 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
0342 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
0343 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
0344 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
0345 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
0346 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
0347 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
0348 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
0349 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
0350 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
0351 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
0352 >;
0353 };
0354
0355 pinctrl_uart2: uart2grp {
0356 fsl,pins = <
0357 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
0358 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
0359 >;
0360 };
0361
0362 pinctrl_uart4: uart4grp {
0363 fsl,pins = <
0364 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
0365 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
0366 MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
0367 MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
0368 >;
0369 };
0370
0371 pinctrl_uart5: uart5grp {
0372 fsl,pins = <
0373 MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
0374 MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
0375 >;
0376 };
0377
0378 pinctrl_usbotg: usbotggrp {
0379 fsl,pins = <
0380 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
0381 >;
0382 };
0383
0384 pinctrl_usdhc1: usdhc1grp {
0385 fsl,pins = <
0386 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
0387 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
0388 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
0389 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
0390 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
0391 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
0392 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
0393 >;
0394 };
0395
0396 pinctrl_usdhc2: usdhc2grp {
0397 fsl,pins = <
0398 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0399 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0400 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0401 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0402 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0403 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0404 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0
0405 >;
0406 };
0407 };
0408 };
