0001 // SPDX-License-Identifier: GPL-2.0+ OR MIT
0002 //
0003 // Copyright 2014 Soeren Moch <smoch@web.de>
0004
0005 /dts-v1/;
0006
0007 #include "imx6q.dtsi"
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/input/input.h>
0010
0011 / {
0012 model = "TBS2910 Matrix ARM mini PC";
0013 compatible = "tbs,imx6q-tbs2910", "fsl,imx6q";
0014
0015 chosen {
0016 stdout-path = &uart1;
0017 };
0018
0019 aliases {
0020 mmc0 = &usdhc2;
0021 mmc1 = &usdhc3;
0022 mmc2 = &usdhc4;
0023 /delete-property/ mmc3;
0024 };
0025
0026 memory@10000000 {
0027 device_type = "memory";
0028 reg = <0x10000000 0x80000000>;
0029 };
0030
0031 fan {
0032 compatible = "gpio-fan";
0033 pinctrl-names = "default";
0034 pinctrl-0 = <&pinctrl_gpio_fan>;
0035 gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
0036 gpio-fan,speed-map = <0 0
0037 3000 1>;
0038 };
0039
0040 ir_recv {
0041 compatible = "gpio-ir-receiver";
0042 gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
0043 pinctrl-names = "default";
0044 pinctrl-0 = <&pinctrl_ir>;
0045 };
0046
0047 leds {
0048 compatible = "gpio-leds";
0049 pinctrl-names = "default";
0050 pinctrl-0 = <&pinctrl_gpio_leds>;
0051
0052 blue {
0053 label = "blue_status_led";
0054 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
0055 default-state = "keep";
0056 };
0057 };
0058
0059 reg_2p5v: regulator-2p5v {
0060 compatible = "regulator-fixed";
0061 regulator-name = "2P5V";
0062 regulator-min-microvolt = <2500000>;
0063 regulator-max-microvolt = <2500000>;
0064 };
0065
0066 reg_3p3v: regulator-3p3v {
0067 compatible = "regulator-fixed";
0068 regulator-name = "3P3V";
0069 regulator-min-microvolt = <3300000>;
0070 regulator-max-microvolt = <3300000>;
0071 };
0072
0073 reg_5p0v: regulator-5p0v {
0074 compatible = "regulator-fixed";
0075 regulator-name = "5P0V";
0076 regulator-min-microvolt = <5000000>;
0077 regulator-max-microvolt = <5000000>;
0078 };
0079
0080 sound-sgtl5000 {
0081 audio-codec = <&sgtl5000>;
0082 audio-routing =
0083 "MIC_IN", "Mic Jack",
0084 "Mic Jack", "Mic Bias",
0085 "Headphone Jack", "HP_OUT";
0086 compatible = "fsl,imx-audio-sgtl5000";
0087 model = "On-board Codec";
0088 mux-ext-port = <3>;
0089 mux-int-port = <1>;
0090 ssi-controller = <&ssi1>;
0091 };
0092
0093 sound-spdif {
0094 compatible = "fsl,imx-audio-spdif";
0095 model = "On-board SPDIF";
0096 spdif-controller = <&spdif>;
0097 spdif-out;
0098 };
0099 };
0100
0101 &audmux {
0102 status = "okay";
0103 };
0104
0105 &fec {
0106 pinctrl-names = "default";
0107 pinctrl-0 = <&pinctrl_enet>;
0108 phy-mode = "rgmii-id";
0109 phy-handle = <&phy>;
0110 status = "okay";
0111
0112 mdio {
0113 #address-cells = <1>;
0114 #size-cells = <0>;
0115
0116 phy: ethernet-phy@4 {
0117 reg = <4>;
0118 qca,clk-out-frequency = <125000000>;
0119 reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
0120 reset-assert-us = <10000>;
0121 };
0122 };
0123 };
0124
0125 &hdmi {
0126 pinctrl-names = "default";
0127 pinctrl-0 = <&pinctrl_hdmi>;
0128 ddc-i2c-bus = <&i2c2>;
0129 status = "okay";
0130 };
0131
0132 &i2c1 {
0133 clock-frequency = <100000>;
0134 pinctrl-names = "default";
0135 pinctrl-0 = <&pinctrl_i2c1>;
0136 status = "okay";
0137
0138 sgtl5000: sgtl5000@a {
0139 clocks = <&clks IMX6QDL_CLK_CKO>;
0140 compatible = "fsl,sgtl5000";
0141 pinctrl-names = "default";
0142 pinctrl-0 = <&pinctrl_sgtl5000>;
0143 reg = <0x0a>;
0144 VDDA-supply = <®_2p5v>;
0145 VDDIO-supply = <®_3p3v>;
0146 };
0147 };
0148
0149 &i2c2 {
0150 clock-frequency = <100000>;
0151 pinctrl-names = "default";
0152 pinctrl-0 = <&pinctrl_i2c2>;
0153 status = "okay";
0154 };
0155
0156 &i2c3 {
0157 clock-frequency = <100000>;
0158 pinctrl-names = "default";
0159 pinctrl-0 = <&pinctrl_i2c3>;
0160 status = "okay";
0161
0162 rtc: rtc@68 {
0163 compatible = "dallas,ds1307";
0164 reg = <0x68>;
0165 };
0166 };
0167
0168 &pcie {
0169 pinctrl-names = "default";
0170 pinctrl-0 = <&pinctrl_pcie>;
0171 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
0172 status = "okay";
0173 };
0174
0175 &sata {
0176 fsl,transmit-level-mV = <1104>;
0177 fsl,transmit-boost-mdB = <3330>;
0178 fsl,transmit-atten-16ths = <16>;
0179 fsl,receive-eq-mdB = <3000>;
0180 status = "okay";
0181 };
0182
0183 &snvs_poweroff {
0184 status = "okay";
0185 };
0186
0187 &spdif {
0188 pinctrl-names = "default";
0189 pinctrl-0 = <&pinctrl_spdif>;
0190 status = "okay";
0191 };
0192
0193 &ssi1 {
0194 status = "okay";
0195 };
0196
0197 &uart1 {
0198 pinctrl-names = "default";
0199 pinctrl-0 = <&pinctrl_uart1>;
0200 status = "okay";
0201 };
0202
0203 &uart2 {
0204 pinctrl-names = "default";
0205 pinctrl-0 = <&pinctrl_uart2>;
0206 status = "okay";
0207 };
0208
0209 &usbh1 {
0210 vbus-supply = <®_5p0v>;
0211 status = "okay";
0212 };
0213
0214 &usbotg {
0215 vbus-supply = <®_5p0v>;
0216 pinctrl-names = "default";
0217 pinctrl-0 = <&pinctrl_usbotg>;
0218 disable-over-current;
0219 status = "okay";
0220 };
0221
0222 &usdhc2 {
0223 pinctrl-names = "default";
0224 pinctrl-0 = <&pinctrl_usdhc2>;
0225 bus-width = <4>;
0226 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
0227 vmmc-supply = <®_3p3v>;
0228 vqmmc-supply = <®_3p3v>;
0229 voltage-ranges = <3300 3300>;
0230 no-1-8-v;
0231 status = "okay";
0232 };
0233
0234 &usdhc3 {
0235 pinctrl-names = "default";
0236 pinctrl-0 = <&pinctrl_usdhc3>;
0237 bus-width = <4>;
0238 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
0239 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
0240 vmmc-supply = <®_3p3v>;
0241 vqmmc-supply = <®_3p3v>;
0242 voltage-ranges = <3300 3300>;
0243 no-1-8-v;
0244 status = "okay";
0245 };
0246
0247 &usdhc4 {
0248 pinctrl-names = "default";
0249 pinctrl-0 = <&pinctrl_usdhc4>;
0250 bus-width = <8>;
0251 vmmc-supply = <®_3p3v>;
0252 vqmmc-supply = <®_3p3v>;
0253 voltage-ranges = <3300 3300>;
0254 non-removable;
0255 no-1-8-v;
0256 status = "okay";
0257 };
0258
0259 &iomuxc {
0260 pinctrl_enet: enetgrp {
0261 fsl,pins = <
0262 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0263 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0264 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0265 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0266 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0267 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0268 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0269 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0270 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0271 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0272 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0273 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0274 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0275 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0276 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0277 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
0278 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059
0279 >;
0280 };
0281
0282 pinctrl_gpio_fan: gpiofangrp {
0283 fsl,pins = <
0284 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1
0285 >;
0286 };
0287
0288 pinctrl_gpio_leds: gpioledsgrp {
0289 fsl,pins = <
0290 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1
0291 >;
0292 };
0293
0294 pinctrl_hdmi: hdmigrp {
0295 fsl,pins = <
0296 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
0297 >;
0298 };
0299
0300 pinctrl_i2c1: i2c1grp {
0301 fsl,pins = <
0302 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
0303 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
0304 >;
0305 };
0306
0307 pinctrl_i2c2: i2c2grp {
0308 fsl,pins = <
0309 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0310 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0311 >;
0312 };
0313
0314 pinctrl_i2c3: i2c3grp {
0315 fsl,pins = <
0316 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0317 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0318 >;
0319 };
0320
0321 pinctrl_ir: irgrp {
0322 fsl,pins = <
0323 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059
0324 >;
0325 };
0326
0327 pinctrl_pcie: pciegrp {
0328 fsl,pins = <
0329 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059
0330 >;
0331 };
0332
0333 pinctrl_sgtl5000: sgtl5000grp {
0334 fsl,pins = <
0335 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0336 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0337 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0338 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0339 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
0340 >;
0341 };
0342
0343 pinctrl_spdif: spdifgrp {
0344 fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091
0345 >;
0346 };
0347
0348 pinctrl_uart1: uart1grp {
0349 fsl,pins = <
0350 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0351 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0352 >;
0353 };
0354
0355 pinctrl_uart2: uart2grp {
0356 fsl,pins = <
0357 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
0358 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
0359 >;
0360 };
0361
0362 pinctrl_usbotg: usbotggrp {
0363 fsl,pins = <
0364 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
0365 >;
0366 };
0367
0368 pinctrl_usdhc2: usdhc2grp {
0369 fsl,pins = <
0370 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0371 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0372 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0373 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0374 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0375 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0376 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059
0377 >;
0378 };
0379
0380 pinctrl_usdhc3: usdhc3grp {
0381 fsl,pins = <
0382 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0383 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0384 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0385 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0386 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0387 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0388 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059
0389 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059
0390 >;
0391 };
0392
0393 pinctrl_usdhc4: usdhc4grp {
0394 fsl,pins = <
0395 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
0396 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
0397 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
0398 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
0399 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
0400 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
0401 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
0402 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
0403 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
0404 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
0405 >;
0406 };
0407 };
