0001 /*
0002 * Copyright 2013 CompuLab Ltd.
0003 *
0004 * Author: Valentin Raevsky <valentin@compulab.co.il>
0005 *
0006 * This file is dual-licensed: you can use it either under the terms
0007 * of the GPL or the X11 license, at your option. Note that this dual
0008 * licensing only applies to this file, and not this project as a
0009 * whole.
0010 *
0011 * a) This file is free software; you can redistribute it and/or
0012 * modify it under the terms of the GNU General Public License
0013 * version 2 as published by the Free Software Foundation.
0014 *
0015 * This file is distributed in the hope that it will be useful,
0016 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0018 * GNU General Public License for more details.
0019 *
0020 * Or, alternatively,
0021 *
0022 * b) Permission is hereby granted, free of charge, to any person
0023 * obtaining a copy of this software and associated documentation
0024 * files (the "Software"), to deal in the Software without
0025 * restriction, including without limitation the rights to use,
0026 * copy, modify, merge, publish, distribute, sublicense, and/or
0027 * sell copies of the Software, and to permit persons to whom the
0028 * Software is furnished to do so, subject to the following
0029 * conditions:
0030 *
0031 * The above copyright notice and this permission notice shall be
0032 * included in all copies or substantial portions of the Software.
0033 *
0034 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0035 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0036 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0037 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0038 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0039 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0040 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0041 * OTHER DEALINGS IN THE SOFTWARE.
0042 */
0043
0044 /dts-v1/;
0045 #include <dt-bindings/gpio/gpio.h>
0046 #include <dt-bindings/sound/fsl-imx-audmux.h>
0047 #include "imx6q.dtsi"
0048
0049 / {
0050 model = "CompuLab CM-FX6";
0051 compatible = "compulab,cm-fx6", "fsl,imx6q";
0052
0053 memory@10000000 {
0054 device_type = "memory";
0055 reg = <0x10000000 0x80000000>;
0056 };
0057
0058 leds {
0059 compatible = "gpio-leds";
0060
0061 heartbeat-led {
0062 label = "Heartbeat";
0063 gpios = <&gpio2 31 0>;
0064 linux,default-trigger = "heartbeat";
0065 };
0066 };
0067
0068 awnh387_pwrseq: pwrseq {
0069 pinctrl-names = "default";
0070 pinctrl-0 = <&pinctrl_pwrseq>;
0071 compatible = "mmc-pwrseq-sd8787";
0072 powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
0073 reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
0074 };
0075
0076 reg_pcie_power_on_gpio: regulator-pcie-power-on-gpio {
0077 compatible = "regulator-fixed";
0078 regulator-name = "regulator-pcie-power-on-gpio";
0079 regulator-min-microvolt = <3300000>;
0080 regulator-max-microvolt = <3300000>;
0081 gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
0082 };
0083
0084 reg_usb_h1_vbus: usb_h1_vbus {
0085 compatible = "regulator-fixed";
0086 regulator-name = "usb_h1_vbus";
0087 regulator-min-microvolt = <5000000>;
0088 regulator-max-microvolt = <5000000>;
0089 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
0090 enable-active-high;
0091 };
0092
0093 reg_usb_otg_vbus: usb_otg_vbus {
0094 compatible = "regulator-fixed";
0095 regulator-name = "usb_otg_vbus";
0096 regulator-min-microvolt = <5000000>;
0097 regulator-max-microvolt = <5000000>;
0098 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0099 enable-active-high;
0100 };
0101
0102 sound-analog {
0103 compatible = "simple-audio-card";
0104 simple-audio-card,name = "On-board analog audio";
0105 simple-audio-card,widgets =
0106 "Headphone", "Headphone Jack",
0107 "Line", "Line Out",
0108 "Microphone", "Mic Jack",
0109 "Line", "Line In";
0110 simple-audio-card,routing =
0111 "Headphone Jack", "RHPOUT",
0112 "Headphone Jack", "LHPOUT",
0113 "MICIN", "Mic Bias",
0114 "Mic Bias", "Mic Jack";
0115 simple-audio-card,format = "i2s";
0116 simple-audio-card,bitclock-master = <&sound_master>;
0117 simple-audio-card,frame-master = <&sound_master>;
0118 simple-audio-card,bitclock-inversion;
0119
0120 sound_master: simple-audio-card,cpu {
0121 sound-dai = <&ssi2>;
0122 system-clock-frequency = <2822400>;
0123 };
0124
0125 simple-audio-card,codec {
0126 sound-dai = <&wm8731>;
0127 };
0128 };
0129
0130 sound-spdif {
0131 compatible = "fsl,imx-audio-spdif";
0132 model = "imx-spdif";
0133 spdif-controller = <&spdif>;
0134 spdif-out;
0135 spdif-in;
0136 };
0137 };
0138
0139 &audmux {
0140 pinctrl-names = "default";
0141 pinctrl-0 = <&pinctrl_audmux>;
0142 status = "okay";
0143
0144 ssi2 {
0145 fsl,audmux-port = <1>;
0146 fsl,port-config = <
0147 (IMX_AUDMUX_V2_PTCR_RCLKDIR |
0148 IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) |
0149 IMX_AUDMUX_V2_PTCR_TCLKDIR |
0150 IMX_AUDMUX_V2_PTCR_TCSEL(3))
0151 IMX_AUDMUX_V2_PDCR_RXDSEL(3)
0152 >;
0153 };
0154
0155 audmux4 {
0156 fsl,audmux-port = <3>;
0157 fsl,port-config = <
0158 (IMX_AUDMUX_V2_PTCR_TFSDIR |
0159 IMX_AUDMUX_V2_PTCR_TFSEL(1) |
0160 IMX_AUDMUX_V2_PTCR_RCLKDIR |
0161 IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) |
0162 IMX_AUDMUX_V2_PTCR_TCLKDIR |
0163 IMX_AUDMUX_V2_PTCR_TCSEL(1))
0164 IMX_AUDMUX_V2_PDCR_RXDSEL(1)
0165 >;
0166 };
0167 };
0168
0169 &cpu0 {
0170 /*
0171 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
0172 * the module behaves unstable at this frequency. Hence, remove the
0173 * 1.2GHz operation point here.
0174 */
0175 operating-points = <
0176 /* kHz uV */
0177 996000 1250000
0178 852000 1250000
0179 792000 1175000
0180 396000 975000
0181 >;
0182 fsl,soc-operating-points = <
0183 /* ARM kHz SOC-PU uV */
0184 996000 1250000
0185 852000 1250000
0186 792000 1175000
0187 396000 1175000
0188 >;
0189 };
0190
0191 &cpu1 {
0192 /*
0193 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
0194 * the module behaves unstable at this frequency. Hence, remove the
0195 * 1.2GHz operation point here.
0196 */
0197 operating-points = <
0198 /* kHz uV */
0199 996000 1250000
0200 852000 1250000
0201 792000 1175000
0202 396000 975000
0203 >;
0204 fsl,soc-operating-points = <
0205 /* ARM kHz SOC-PU uV */
0206 996000 1250000
0207 852000 1250000
0208 792000 1175000
0209 396000 1175000
0210 >;
0211 };
0212
0213 &cpu2 {
0214 /*
0215 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
0216 * the module behaves unstable at this frequency. Hence, remove the
0217 * 1.2GHz operation point here.
0218 */
0219 operating-points = <
0220 /* kHz uV */
0221 996000 1250000
0222 852000 1250000
0223 792000 1175000
0224 396000 975000
0225 >;
0226 fsl,soc-operating-points = <
0227 /* ARM kHz SOC-PU uV */
0228 996000 1250000
0229 852000 1250000
0230 792000 1175000
0231 396000 1175000
0232 >;
0233 };
0234
0235 &cpu3 {
0236 /*
0237 * Although the imx6q fuse indicates that 1.2GHz operation is possible,
0238 * the module behaves unstable at this frequency. Hence, remove the
0239 * 1.2GHz operation point here.
0240 */
0241 operating-points = <
0242 /* kHz uV */
0243 996000 1250000
0244 852000 1250000
0245 792000 1175000
0246 396000 975000
0247 >;
0248 fsl,soc-operating-points = <
0249 /* ARM kHz SOC-PU uV */
0250 996000 1250000
0251 852000 1250000
0252 792000 1175000
0253 396000 1175000
0254 >;
0255 };
0256
0257 &ecspi1 {
0258 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>;
0259 pinctrl-names = "default";
0260 pinctrl-0 = <&pinctrl_ecspi1>;
0261 status = "okay";
0262
0263 flash@0 {
0264 #address-cells = <1>;
0265 #size-cells = <1>;
0266 compatible = "st,m25p", "jedec,spi-nor";
0267 spi-max-frequency = <20000000>;
0268 reg = <0>;
0269 };
0270 };
0271
0272 &fec {
0273 pinctrl-names = "default";
0274 pinctrl-0 = <&pinctrl_enet>;
0275 phy-mode = "rgmii";
0276 status = "okay";
0277 };
0278
0279 &gpmi {
0280 pinctrl-names = "default";
0281 pinctrl-0 = <&pinctrl_gpmi_nand>;
0282 status = "okay";
0283 };
0284
0285 &i2c3 {
0286 pinctrl-names = "default";
0287 pinctrl-0 = <&pinctrl_i2c3>;
0288 status = "okay";
0289 clock-frequency = <100000>;
0290
0291 eeprom@50 {
0292 compatible = "atmel,24c02";
0293 reg = <0x50>;
0294 pagesize = <16>;
0295 };
0296
0297 wm8731: codec@1a {
0298 #sound-dai-cells = <0>;
0299 compatible = "wlf,wm8731";
0300 reg = <0x1a>;
0301 };
0302 };
0303
0304 &iomuxc {
0305 pinctrl_audmux: audmuxgrp {
0306 fsl,pins = <
0307 MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
0308 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
0309 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
0310 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
0311 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
0312 >;
0313 };
0314
0315 pinctrl_ecspi1: ecspi1grp {
0316 fsl,pins = <
0317 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
0318 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
0319 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
0320 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1
0321 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1
0322 >;
0323 };
0324
0325 pinctrl_enet: enetgrp {
0326 fsl,pins = <
0327 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0328 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0329 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0330 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0331 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0332 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0333 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0334 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0335 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0336 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0337 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0338 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0339 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
0340 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0341 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0342 >;
0343 };
0344
0345 pinctrl_gpmi_nand: gpminandgrp {
0346 fsl,pins = <
0347 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
0348 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
0349 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
0350 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
0351 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
0352 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
0353 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
0354 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
0355 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
0356 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
0357 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
0358 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
0359 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
0360 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
0361 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
0362 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
0363 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
0364 >;
0365 };
0366
0367 pinctrl_i2c3: i2c3grp {
0368 fsl,pins = <
0369 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0370 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0371 >;
0372 };
0373
0374 pinctrl_pcie: pciegrp {
0375 fsl,pins = <
0376 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
0377 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1
0378 >;
0379 };
0380
0381 pinctrl_pwrseq: pwrseqgrp {
0382 fsl,pins = <
0383 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
0384 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
0385 >;
0386 };
0387
0388 pinctrl_spdif: spdifgrp {
0389 fsl,pins = <
0390 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
0391 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
0392 >;
0393 };
0394
0395 pinctrl_uart4: uart4grp {
0396 fsl,pins = <
0397 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
0398 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
0399 >;
0400 };
0401
0402 pinctrl_usbh1: usbh1grp {
0403 fsl,pins = <
0404 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
0405 >;
0406 };
0407
0408 pinctrl_usbotg: usbotggrp {
0409 fsl,pins = <
0410 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
0411 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0
0412 >;
0413 };
0414
0415 pinctrl_usdhc1: usdhc1grp {
0416 fsl,pins = <
0417 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071
0418 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071
0419 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
0420 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
0421 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
0422 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
0423 >;
0424 };
0425 };
0426
0427 &pcie {
0428 pinctrl-names = "default";
0429 pinctrl-0 = <&pinctrl_pcie>;
0430 reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
0431 vpcie-supply = <®_pcie_power_on_gpio>;
0432 status = "okay";
0433 };
0434
0435 &sata {
0436 status = "okay";
0437 };
0438
0439 &snvs_poweroff {
0440 status = "okay";
0441 };
0442
0443 &spdif {
0444 pinctrl-names = "default";
0445 pinctrl-0 = <&pinctrl_spdif>;
0446 status = "okay";
0447 };
0448
0449 &ssi2 {
0450 assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
0451 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
0452 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
0453 assigned-clock-rates = <0>, <786432000>;
0454 status = "okay";
0455 };
0456
0457 &uart4 {
0458 pinctrl-names = "default";
0459 pinctrl-0 = <&pinctrl_uart4>;
0460 status = "okay";
0461 };
0462
0463 &usbh1 {
0464 vbus-supply = <®_usb_h1_vbus>;
0465 pinctrl-names = "default";
0466 pinctrl-0 = <&pinctrl_usbh1>;
0467 status = "okay";
0468 };
0469
0470 &usbotg {
0471 vbus-supply = <®_usb_otg_vbus>;
0472 pinctrl-names = "default";
0473 pinctrl-0 = <&pinctrl_usbotg>;
0474 dr_mode = "otg";
0475 status = "okay";
0476 };
0477
0478 &usdhc1 {
0479 pinctrl-names = "default";
0480 pinctrl-0 = <&pinctrl_usdhc1>;
0481 mmc-pwrseq = <&awnh387_pwrseq>;
0482 non-removable;
0483 /*
0484 * If the OS probes the Bluetooth AMP function advertised on this bus
0485 * but the firmware in place does not support it, the WiFi/BT module
0486 * gets unresponsive.
0487 * Users who configured their OS properly can enable this node to gain
0488 * WiFi and/or plain Bluetooth support.
0489 */
0490 status = "disabled";
0491 };
