0001 /*
0002 * Copyright 2015 Timesys Corporation.
0003 * Copyright 2015 General Electric Company
0004 *
0005 * This file is dual-licensed: you can use it either under the terms
0006 * of the GPL or the X11 license, at your option. Note that this dual
0007 * licensing only applies to this file, and not this project as a
0008 * whole.
0009 *
0010 * a) This file is free software; you can redistribute it and/or
0011 * modify it under the terms of the GNU General Public License
0012 * version 2 as published by the Free Software Foundation.
0013 *
0014 * This file is distributed in the hope that it will be useful,
0015 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0016 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0017 * GNU General Public License for more details.
0018 *
0019 * Or, alternatively,
0020 *
0021 * b) Permission is hereby granted, free of charge, to any person
0022 * obtaining a copy of this software and associated documentation
0023 * files (the "Software"), to deal in the Software without
0024 * restriction, including without limitation the rights to use,
0025 * copy, modify, merge, publish, distribute, sublicense, and/or
0026 * sell copies of the Software, and to permit persons to whom the
0027 * Software is furnished to do so, subject to the following
0028 * conditions:
0029 *
0030 * The above copyright notice and this permission notice shall be
0031 * included in all copies or substantial portions of the Software.
0032 *
0033 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0034 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0035 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0036 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0037 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0038 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0039 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0040 * OTHER DEALINGS IN THE SOFTWARE.
0041 */
0042
0043 #include "imx6q-ba16.dtsi"
0044
0045 / {
0046 mclk: clock-mclk {
0047 compatible = "fixed-clock";
0048 #clock-cells = <0>;
0049 clock-frequency = <22000000>;
0050 };
0051
0052 gpio-poweroff {
0053 compatible = "gpio-poweroff";
0054 gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
0055 status = "okay";
0056 };
0057
0058 reg_wl18xx_vmmc: regulator-wl18xx {
0059 compatible = "regulator-fixed";
0060 regulator-name = "vwl1807";
0061 regulator-min-microvolt = <3300000>;
0062 regulator-max-microvolt = <3300000>;
0063 gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>;
0064 startup-delay-us = <70000>;
0065 enable-active-high;
0066 };
0067
0068 reg_wlan: regulator-wlan {
0069 compatible = "regulator-fixed";
0070 regulator-name = "3P3V_wlan";
0071 regulator-min-microvolt = <3300000>;
0072 regulator-max-microvolt = <3300000>;
0073 regulator-always-on;
0074 regulator-boot-on;
0075 gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>;
0076 };
0077
0078 sound {
0079 compatible = "fsl,imx6q-ba16-sgtl5000",
0080 "fsl,imx-audio-sgtl5000";
0081 model = "imx6q-ba16-sgtl5000";
0082 ssi-controller = <&ssi1>;
0083 audio-codec = <&sgtl5000>;
0084 audio-routing =
0085 "MIC_IN", "Mic Jack",
0086 "Mic Jack", "Mic Bias",
0087 "LINE_IN", "Line In Jack",
0088 "Headphone Jack", "HP_OUT";
0089 mux-int-port = <1>;
0090 mux-ext-port = <4>;
0091 };
0092
0093 aliases {
0094 mdio-gpio0 = &mdio0;
0095 };
0096
0097 mdio0: mdio-gpio {
0098 compatible = "virtual,mdio-gpio";
0099 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */
0100 <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */
0101
0102 #address-cells = <1>;
0103 #size-cells = <0>;
0104
0105 switch: switch@0 {
0106 compatible = "marvell,mv88e6085"; /* 88e6240*/
0107 reg = <0>;
0108
0109 interrupt-parent = <&gpio2>;
0110 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
0111 interrupt-controller;
0112 #interrupt-cells = <2>;
0113
0114 switch_ports: ports {
0115 #address-cells = <1>;
0116 #size-cells = <0>;
0117 };
0118
0119 mdio {
0120 #address-cells = <1>;
0121 #size-cells = <0>;
0122
0123 switchphy0: switchphy@0 {
0124 reg = <0>;
0125 interrupt-parent = <&switch>;
0126 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
0127 };
0128
0129 switchphy1: switchphy@1 {
0130 reg = <1>;
0131 interrupt-parent = <&switch>;
0132 interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
0133 };
0134
0135 switchphy2: switchphy@2 {
0136 reg = <2>;
0137 interrupt-parent = <&switch>;
0138 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
0139 };
0140
0141 switchphy3: switchphy@3 {
0142 reg = <3>;
0143 interrupt-parent = <&switch>;
0144 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
0145 };
0146
0147 switchphy4: switchphy@4 {
0148 reg = <4>;
0149 interrupt-parent = <&switch>;
0150 interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
0151 };
0152 };
0153 };
0154 };
0155 };
0156
0157 &ecspi5 {
0158 cs-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
0159 pinctrl-names = "default";
0160 pinctrl-0 = <&pinctrl_ecspi5>;
0161 status = "okay";
0162
0163 m25_eeprom: flash@0 {
0164 compatible = "atmel,at25";
0165 spi-max-frequency = <10000000>;
0166 size = <0x8000>;
0167 pagesize = <64>;
0168 reg = <0>;
0169 address-width = <16>;
0170 };
0171 };
0172
0173 &i2c1 {
0174 pinctrl-names = "default", "gpio";
0175 pinctrl-1 = <&pinctrl_i2c1_gpio>;
0176 sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0177 scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0178
0179 pca9547: mux@70 {
0180 compatible = "nxp,pca9547";
0181 reg = <0x70>;
0182 #address-cells = <1>;
0183 #size-cells = <0>;
0184
0185 mux1_i2c1: i2c@0 {
0186 #address-cells = <1>;
0187 #size-cells = <0>;
0188 reg = <0x0>;
0189
0190 ads7830: ads7830@48 {
0191 compatible = "ti,ads7830";
0192 reg = <0x48>;
0193 };
0194
0195 mma8453: mma8453@1c {
0196 compatible = "fsl,mma8453";
0197 reg = <0x1c>;
0198 };
0199 };
0200
0201 mux1_i2c2: i2c@1 {
0202 #address-cells = <1>;
0203 #size-cells = <0>;
0204 reg = <0x1>;
0205
0206 eeprom: eeprom@50 {
0207 compatible = "atmel,24c08";
0208 reg = <0x50>;
0209 };
0210
0211 mpl3115: mpl3115@60 {
0212 compatible = "fsl,mpl3115";
0213 reg = <0x60>;
0214 };
0215 };
0216
0217 mux1_i2c3: i2c@2 {
0218 #address-cells = <1>;
0219 #size-cells = <0>;
0220 reg = <0x2>;
0221 };
0222
0223 mux1_i2c4: i2c@3 {
0224 #address-cells = <1>;
0225 #size-cells = <0>;
0226 reg = <0x3>;
0227
0228 sgtl5000: codec@a {
0229 compatible = "fsl,sgtl5000";
0230 reg = <0x0a>;
0231 clocks = <&mclk>;
0232 VDDA-supply = <®_1p8v>;
0233 VDDIO-supply = <®_3p3v>;
0234 };
0235 };
0236
0237 mux1_i2c5: i2c@4 {
0238 #address-cells = <1>;
0239 #size-cells = <0>;
0240 reg = <0x4>;
0241
0242 pca9539: pca9539@74 {
0243 compatible = "nxp,pca9539";
0244 reg = <0x74>;
0245 gpio-controller;
0246 #gpio-cells = <2>;
0247 interrupt-controller;
0248 interrupt-parent = <&gpio2>;
0249 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
0250
0251 P12-hog {
0252 gpio-hog;
0253 gpios = <10 0>;
0254 output-low;
0255 line-name = "PCA9539-P12";
0256 };
0257
0258 P13-hog {
0259 gpio-hog;
0260 gpios = <11 0>;
0261 output-low;
0262 line-name = "PCA9539-P13";
0263 };
0264
0265 P14-hog {
0266 gpio-hog;
0267 gpios = <12 0>;
0268 output-low;
0269 line-name = "PCA9539-P14";
0270 };
0271
0272 P15-hog {
0273 gpio-hog;
0274 gpios = <13 0>;
0275 output-low;
0276 line-name = "PCA9539-P15";
0277 };
0278
0279 P16-hog {
0280 gpio-hog;
0281 gpios = <14 0>;
0282 output-low;
0283 line-name = "PCA9539-P16";
0284 };
0285
0286 P17-hog {
0287 gpio-hog;
0288 gpios = <15 0>;
0289 output-low;
0290 line-name = "PCA9539-P17";
0291 };
0292 };
0293 };
0294
0295 mux1_i2c6: i2c@5 {
0296 #address-cells = <1>;
0297 #size-cells = <0>;
0298 reg = <0x5>;
0299 };
0300
0301 mux1_i2c7: i2c@6 {
0302 #address-cells = <1>;
0303 #size-cells = <0>;
0304 reg = <0x6>;
0305 };
0306
0307 mux1_i2c8: i2c@7 {
0308 #address-cells = <1>;
0309 #size-cells = <0>;
0310 reg = <0x7>;
0311 };
0312 };
0313 };
0314
0315 &i2c2 {
0316 pinctrl-names = "default", "gpio";
0317 pinctrl-1 = <&pinctrl_i2c2_gpio>;
0318 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0319 scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0320 };
0321
0322 &i2c3 {
0323 pinctrl-names = "default", "gpio";
0324 pinctrl-1 = <&pinctrl_i2c3_gpio>;
0325 sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0326 scl-gpios = <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0327 };
0328
0329 &iomuxc {
0330 pinctrl_i2c1_gpio: i2c1gpiogrp {
0331 fsl,pins = <
0332 MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0
0333 MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0
0334 >;
0335 };
0336
0337 pinctrl_i2c2_gpio: i2c2gpiogrp {
0338 fsl,pins = <
0339 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0
0340 MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0
0341 >;
0342 };
0343
0344 pinctrl_i2c3_gpio: i2c3gpiogrp {
0345 fsl,pins = <
0346 MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0
0347 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
0348 >;
0349 };
0350 };
0351
0352 &pmu {
0353 secure-reg-access;
0354 };
0355
0356 &usdhc2 {
0357 status = "disabled";
0358 };
0359
0360 &usdhc4 {
0361 pinctrl-names = "default";
0362 pinctrl-0 = <&pinctrl_usdhc4>;
0363 bus-width = <4>;
0364 vmmc-supply = <®_wl18xx_vmmc>;
0365 no-1-8-v;
0366 non-removable;
0367 wakeup-source;
0368 keep-power-in-suspend;
0369 cap-power-off-card;
0370 max-frequency = <25000000>;
0371 #address-cells = <1>;
0372 #size-cells = <0>;
0373 status = "okay";
0374
0375 wlcore: wlcore@2 {
0376 compatible = "ti,wl1837";
0377 reg = <2>;
0378 interrupt-parent = <&gpio2>;
0379 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
0380 tcxo-clock-frequency = <26000000>;
0381 };
0382 };
0383
0384 &pcie {
0385 /* Synopsys, Inc. Device */
0386 pci_root: root@0,0 {
0387 compatible = "pci16c3,abcd";
0388 reg = <0x00000000 0 0 0 0>;
0389
0390 #address-cells = <3>;
0391 #size-cells = <2>;
0392 #interrupt-cells = <1>;
0393 };
0394 };
0395
0396 &clks {
0397 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
0398 <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
0399 <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
0400 <&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
0401 <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>,
0402 <&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>;
0403 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
0404 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
0405 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
0406 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
0407 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>,
0408 <&clks IMX6QDL_CLK_PLL2_PFD0_352M>;
0409 };
