0001 /*
0002 * Support for imx6 based Advantech DMS-BA16 Qseven module
0003 *
0004 * Copyright 2015 Timesys Corporation.
0005 * Copyright 2015 General Electric Company
0006 *
0007 * This file is dual-licensed: you can use it either under the terms
0008 * of the GPL or the X11 license, at your option. Note that this dual
0009 * licensing only applies to this file, and not this project as a
0010 * whole.
0011 *
0012 * a) This file is free software; you can redistribute it and/or
0013 * modify it under the terms of the GNU General Public License
0014 * version 2 as published by the Free Software Foundation.
0015 *
0016 * This file is distributed in the hope that it will be useful,
0017 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0018 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0019 * GNU General Public License for more details.
0020 *
0021 * Or, alternatively,
0022 *
0023 * b) Permission is hereby granted, free of charge, to any person
0024 * obtaining a copy of this software and associated documentation
0025 * files (the "Software"), to deal in the Software without
0026 * restriction, including without limitation the rights to use,
0027 * copy, modify, merge, publish, distribute, sublicense, and/or
0028 * sell copies of the Software, and to permit persons to whom the
0029 * Software is furnished to do so, subject to the following
0030 * conditions:
0031 *
0032 * The above copyright notice and this permission notice shall be
0033 * included in all copies or substantial portions of the Software.
0034 *
0035 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0036 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0037 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0038 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0039 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0040 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0041 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0042 * OTHER DEALINGS IN THE SOFTWARE.
0043 */
0044
0045 #include "imx6q.dtsi"
0046 #include <dt-bindings/gpio/gpio.h>
0047
0048 / {
0049 memory@10000000 {
0050 device_type = "memory";
0051 reg = <0x10000000 0x40000000>;
0052 };
0053
0054 backlight_lvds: backlight {
0055 compatible = "pwm-backlight";
0056 pinctrl-names = "default";
0057 pinctrl-0 = <&pinctrl_display>;
0058 pwms = <&pwm1 0 5000000>;
0059 brightness-levels = < 0 1 2 3 4 5 6 7 8 9
0060 10 11 12 13 14 15 16 17 18 19
0061 20 21 22 23 24 25 26 27 28 29
0062 30 31 32 33 34 35 36 37 38 39
0063 40 41 42 43 44 45 46 47 48 49
0064 50 51 52 53 54 55 56 57 58 59
0065 60 61 62 63 64 65 66 67 68 69
0066 70 71 72 73 74 75 76 77 78 79
0067 80 81 82 83 84 85 86 87 88 89
0068 90 91 92 93 94 95 96 97 98 99
0069 100 101 102 103 104 105 106 107 108 109
0070 110 111 112 113 114 115 116 117 118 119
0071 120 121 122 123 124 125 126 127 128 129
0072 130 131 132 133 134 135 136 137 138 139
0073 140 141 142 143 144 145 146 147 148 149
0074 150 151 152 153 154 155 156 157 158 159
0075 160 161 162 163 164 165 166 167 168 169
0076 170 171 172 173 174 175 176 177 178 179
0077 180 181 182 183 184 185 186 187 188 189
0078 190 191 192 193 194 195 196 197 198 199
0079 200 201 202 203 204 205 206 207 208 209
0080 210 211 212 213 214 215 216 217 218 219
0081 220 221 222 223 224 225 226 227 228 229
0082 230 231 232 233 234 235 236 237 238 239
0083 240 241 242 243 244 245 246 247 248 249
0084 250 251 252 253 254 255>;
0085 default-brightness-level = <255>;
0086 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
0087 };
0088
0089 reg_1p8v: regulator-1p8v {
0090 compatible = "regulator-fixed";
0091 regulator-name = "1P8V";
0092 regulator-min-microvolt = <1800000>;
0093 regulator-max-microvolt = <1800000>;
0094 regulator-always-on;
0095 };
0096
0097 reg_3p3v: regulator-3p3v {
0098 compatible = "regulator-fixed";
0099 regulator-name = "3P3V";
0100 regulator-min-microvolt = <3300000>;
0101 regulator-max-microvolt = <3300000>;
0102 regulator-always-on;
0103 };
0104
0105 reg_lvds: regulator-lvds {
0106 compatible = "regulator-fixed";
0107 regulator-name = "lvds_ppen";
0108 regulator-min-microvolt = <3300000>;
0109 regulator-max-microvolt = <3300000>;
0110 regulator-boot-on;
0111 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0112 enable-active-high;
0113 };
0114
0115 reg_usb_h1_vbus: regulator-usbh1vbus {
0116 compatible = "regulator-fixed";
0117 regulator-name = "usb_h1_vbus";
0118 regulator-min-microvolt = <5000000>;
0119 regulator-max-microvolt = <5000000>;
0120 };
0121
0122 reg_usb_otg_vbus: regulator-usbotgvbus {
0123 compatible = "regulator-fixed";
0124 regulator-name = "usb_otg_vbus";
0125 regulator-min-microvolt = <5000000>;
0126 regulator-max-microvolt = <5000000>;
0127 pinctrl-0 = <&pinctrl_usbotg_vbus>;
0128 gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
0129 enable-active-high;
0130 };
0131 };
0132
0133 &audmux {
0134 pinctrl-names = "default";
0135 pinctrl-0 = <&pinctrl_audmux>;
0136 status = "okay";
0137 };
0138
0139 &ecspi1 {
0140 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
0141 pinctrl-names = "default";
0142 pinctrl-0 = <&pinctrl_ecspi1>;
0143 status = "okay";
0144
0145 flash: flash@0 {
0146 compatible = "jedec,spi-nor";
0147 #address-cells = <1>;
0148 #size-cells = <1>;
0149 spi-max-frequency = <20000000>;
0150 reg = <0>;
0151
0152 partition@0 {
0153 label = "U-Boot";
0154 reg = <0x0 0xc0000>;
0155 };
0156
0157 partition@c0000 {
0158 label = "env";
0159 reg = <0xc0000 0x10000>;
0160 };
0161
0162 partition@d0000 {
0163 label = "spare";
0164 reg = <0xd0000 0x320000>;
0165 };
0166
0167 partition@3f0000 {
0168 label = "mfg";
0169 reg = <0x3f0000 0x10000>;
0170 };
0171 };
0172 };
0173
0174 &fec {
0175 pinctrl-names = "default";
0176 pinctrl-0 = <&pinctrl_enet>;
0177 phy-mode = "rgmii-id";
0178 phy-supply = <®_3p3v>;
0179 phy-handle = <&phy0>;
0180 status = "okay";
0181
0182 mdio {
0183 #address-cells = <1>;
0184 #size-cells = <0>;
0185
0186 phy0: ethernet-phy@4 {
0187 reg = <4>;
0188 qca,clk-out-frequency = <125000000>;
0189 };
0190 };
0191 };
0192
0193 &hdmi {
0194 ddc-i2c-bus = <&i2c2>;
0195 status = "okay";
0196 };
0197
0198 &i2c1 {
0199 clock-frequency = <100000>;
0200 pinctrl-names = "default";
0201 pinctrl-0 = <&pinctrl_i2c1>;
0202 status = "okay";
0203 };
0204
0205 &i2c2 {
0206 clock-frequency = <100000>;
0207 pinctrl-names = "default";
0208 pinctrl-0 = <&pinctrl_i2c2>;
0209 status = "okay";
0210 };
0211
0212 &i2c3 {
0213 clock-frequency = <100000>;
0214 pinctrl-names = "default";
0215 pinctrl-0 = <&pinctrl_i2c3>;
0216 status = "okay";
0217
0218 pmic@58 {
0219 compatible = "dlg,da9063";
0220 reg = <0x58>;
0221 pinctrl-names = "default";
0222 pinctrl-0 = <&pinctrl_pmic>;
0223 interrupt-parent = <&gpio7>;
0224 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
0225
0226 onkey {
0227 compatible = "dlg,da9063-onkey";
0228 };
0229
0230 regulators {
0231 vdd_bcore1: bcore1 {
0232 regulator-min-microvolt = <1420000>;
0233 regulator-max-microvolt = <1420000>;
0234 regulator-always-on;
0235 regulator-boot-on;
0236 };
0237
0238 vdd_bcore2: bcore2 {
0239 regulator-min-microvolt = <1420000>;
0240 regulator-max-microvolt = <1420000>;
0241 regulator-always-on;
0242 regulator-boot-on;
0243 };
0244
0245 vdd_bpro: bpro {
0246 regulator-min-microvolt = <1500000>;
0247 regulator-max-microvolt = <1500000>;
0248 regulator-always-on;
0249 regulator-boot-on;
0250 };
0251
0252 vdd_bmem: bmem {
0253 regulator-min-microvolt = <1800000>;
0254 regulator-max-microvolt = <1800000>;
0255 regulator-always-on;
0256 regulator-boot-on;
0257 };
0258
0259 vdd_bio: bio {
0260 regulator-min-microvolt = <1800000>;
0261 regulator-max-microvolt = <1800000>;
0262 regulator-always-on;
0263 regulator-boot-on;
0264 };
0265
0266 vdd_bperi: bperi {
0267 regulator-min-microvolt = <3300000>;
0268 regulator-max-microvolt = <3300000>;
0269 regulator-always-on;
0270 regulator-boot-on;
0271 };
0272
0273 vdd_ldo1: ldo1 {
0274 regulator-min-microvolt = <600000>;
0275 regulator-max-microvolt = <1860000>;
0276 };
0277
0278 vdd_ldo2: ldo2 {
0279 regulator-min-microvolt = <600000>;
0280 regulator-max-microvolt = <1860000>;
0281 };
0282
0283 vdd_ldo3: ldo3 {
0284 regulator-min-microvolt = <900000>;
0285 regulator-max-microvolt = <3440000>;
0286 };
0287
0288 vdd_ldo4: ldo4 {
0289 regulator-min-microvolt = <900000>;
0290 regulator-max-microvolt = <3440000>;
0291 };
0292
0293 vdd_ldo5: ldo5 {
0294 regulator-min-microvolt = <900000>;
0295 regulator-max-microvolt = <3600000>;
0296 };
0297
0298 vdd_ldo6: ldo6 {
0299 regulator-min-microvolt = <900000>;
0300 regulator-max-microvolt = <3600000>;
0301 };
0302
0303 vdd_ldo7: ldo7 {
0304 regulator-min-microvolt = <900000>;
0305 regulator-max-microvolt = <3600000>;
0306 };
0307
0308 vdd_ldo8: ldo8 {
0309 regulator-min-microvolt = <900000>;
0310 regulator-max-microvolt = <3600000>;
0311 };
0312
0313 vdd_ldo9: ldo9 {
0314 regulator-min-microvolt = <950000>;
0315 regulator-max-microvolt = <3600000>;
0316 };
0317
0318 vdd_ldo10: ldo10 {
0319 regulator-min-microvolt = <900000>;
0320 regulator-max-microvolt = <3600000>;
0321 };
0322
0323 vdd_ldo11: ldo11 {
0324 regulator-min-microvolt = <900000>;
0325 regulator-max-microvolt = <3600000>;
0326 regulator-always-on;
0327 regulator-boot-on;
0328 };
0329 };
0330 };
0331
0332 rtc@32 {
0333 compatible = "epson,rx8010";
0334 pinctrl-names = "default";
0335 pinctrl-0 = <&pinctrl_rtc>;
0336 reg = <0x32>;
0337 interrupt-parent = <&gpio4>;
0338 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
0339 };
0340 };
0341
0342 &pcie {
0343 pinctrl-names = "default";
0344 pinctrl-0 = <&pinctrl_pcie>;
0345 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
0346 fsl,tx-swing-full = <103>;
0347 fsl,tx-swing-low = <103>;
0348 status = "okay";
0349 };
0350
0351 &pwm1 {
0352 #pwm-cells = <2>;
0353 pinctrl-names = "default";
0354 pinctrl-0 = <&pinctrl_pwm1>;
0355 status = "okay";
0356 };
0357
0358 &pwm2 {
0359 pinctrl-names = "default";
0360 pinctrl-0 = <&pinctrl_pwm2>;
0361 status = "disabled";
0362 };
0363
0364 &sata {
0365 status = "okay";
0366 };
0367
0368 &ssi1 {
0369 status = "okay";
0370 };
0371
0372 &uart3 {
0373 pinctrl-names = "default";
0374 pinctrl-0 = <&pinctrl_uart3>;
0375 uart-has-rtscts;
0376 status = "okay";
0377 };
0378
0379 &uart4 {
0380 pinctrl-names = "default";
0381 pinctrl-0 = <&pinctrl_uart4>;
0382 status = "okay";
0383 };
0384
0385 &usbh1 {
0386 pinctrl-names = "default";
0387 pinctrl-0 = <&pinctrl_usbhub>;
0388 vbus-supply = <®_usb_h1_vbus>;
0389 reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
0390 status = "okay";
0391 };
0392
0393 &usbotg {
0394 vbus-supply = <®_usb_otg_vbus>;
0395 pinctrl-names = "default";
0396 pinctrl-0 = <&pinctrl_usbotg>;
0397 disable-over-current;
0398 status = "okay";
0399 };
0400
0401 &usdhc2 {
0402 pinctrl-names = "default";
0403 pinctrl-0 = <&pinctrl_usdhc2>;
0404 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
0405 no-1-8-v;
0406 keep-power-in-suspend;
0407 wakeup-source;
0408 status = "okay";
0409 };
0410
0411 &usdhc3 {
0412 pinctrl-names = "default";
0413 pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
0414 bus-width = <8>;
0415 vmmc-supply = <&vdd_bperi>;
0416 non-removable;
0417 keep-power-in-suspend;
0418 status = "okay";
0419 };
0420
0421 &wdog1 {
0422 pinctrl-names = "default";
0423 pinctrl-0 = <&pinctrl_wdog>;
0424 fsl,ext-reset-output;
0425 };
0426
0427 &iomuxc {
0428 pinctrl-names = "default";
0429 pinctrl-0 = <&pinctrl_hog>;
0430
0431 pinctrl_audmux: audmuxgrp {
0432 fsl,pins = <
0433 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
0434 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
0435 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
0436 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
0437 >;
0438 };
0439
0440 pinctrl_display: dispgrp {
0441 fsl,pins = <
0442 /* BLEN_OUT */
0443 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
0444 /* LVDS_PPEN_OUT */
0445 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
0446 >;
0447 };
0448
0449 pinctrl_ecspi1: ecspi1grp {
0450 fsl,pins = <
0451 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
0452 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
0453 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
0454 /* SPI1 CS */
0455 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
0456 >;
0457 };
0458
0459 pinctrl_ecspi5: ecspi5grp {
0460 fsl,pins = <
0461 MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
0462 MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
0463 MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
0464 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
0465 >;
0466 };
0467
0468 pinctrl_enet: enetgrp {
0469 fsl,pins = <
0470 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
0471 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
0472 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
0473 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
0474 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
0475 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
0476 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
0477 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
0478 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
0479 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
0480 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
0481 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
0482 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
0483 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
0484 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
0485 /* FEC Reset */
0486 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
0487 /* AR8033 Interrupt */
0488 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
0489 >;
0490 };
0491
0492 pinctrl_hog: hoggrp {
0493 fsl,pins = <
0494 /* GPIO 0-7 */
0495 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
0496 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
0497 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
0498 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
0499 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
0500 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0
0501 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
0502 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0
0503 /* SUS_S3_OUT to CPLD */
0504 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
0505 >;
0506 };
0507
0508 pinctrl_i2c1: i2c1grp {
0509 fsl,pins = <
0510 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
0511 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
0512 >;
0513 };
0514
0515 pinctrl_i2c2: i2c2grp {
0516 fsl,pins = <
0517 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0518 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0519 >;
0520 };
0521
0522 pinctrl_i2c3: i2c3grp {
0523 fsl,pins = <
0524 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
0525 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0526 >;
0527 };
0528
0529 pinctrl_pcie: pciegrp {
0530 fsl,pins = <
0531 /* PCIe Reset */
0532 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
0533 /* PCIe Wake */
0534 MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
0535 >;
0536 };
0537
0538 pinctrl_pmic: pmicgrp {
0539 fsl,pins = <
0540 /* PMIC Interrupt */
0541 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
0542 >;
0543 };
0544
0545 pinctrl_pwm1: pwm1grp {
0546 fsl,pins = <
0547 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
0548 >;
0549 };
0550
0551 pinctrl_pwm2: pwm2grp {
0552 fsl,pins = <
0553 MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
0554 >;
0555 };
0556
0557 pinctrl_rtc: rtcgrp {
0558 fsl,pins = <
0559 /* RTC_INT */
0560 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
0561 >;
0562 };
0563
0564 pinctrl_uart3: uart3grp {
0565 fsl,pins = <
0566 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0567 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0568 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
0569 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
0570 >;
0571 };
0572
0573 pinctrl_uart4: uart4grp {
0574 fsl,pins = <
0575 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
0576 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
0577 >;
0578 };
0579
0580 pinctrl_usbhub: usbhubgrp {
0581 fsl,pins = <
0582 /* HUB_RESET */
0583 MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
0584 >;
0585 };
0586
0587 pinctrl_usbotg: usbotggrp {
0588 fsl,pins = <
0589 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
0590 >;
0591 };
0592
0593 pinctrl_usbotg_vbus: usbotgvbusgrp {
0594 fsl,pins = <
0595 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b0
0596 >;
0597 };
0598
0599 pinctrl_usdhc2: usdhc2grp {
0600 fsl,pins = <
0601 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0602 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0603 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0604 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0605 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0606 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0607 /* uSDHC2 CD */
0608 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
0609 >;
0610 };
0611
0612 pinctrl_usdhc3: usdhc3grp {
0613 fsl,pins = <
0614 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0615 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0616 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0617 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0618 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0619 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0620 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
0621 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
0622 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
0623 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
0624 >;
0625 };
0626
0627 pinctrl_usdhc3_reset: usdhc3grp-reset {
0628 fsl,pins = <
0629 MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
0630 >;
0631 };
0632
0633 pinctrl_usdhc4: usdhc4grp {
0634 fsl,pins = <
0635 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
0636 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
0637 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
0638 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
0639 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
0640 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
0641 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
0642 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
0643 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
0644 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
0645 /* uSDHC4 CD */
0646 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
0647 /* uSDHC4 SDIO PWR */
0648 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
0649 /* uSDHC4 SDIO WP */
0650 MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
0651 /* uSDHC4 SDIO LED */
0652 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
0653 >;
0654 };
0655
0656 pinctrl_wdog: wdoggrp {
0657 fsl,pins = <
0658 MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
0659 >;
0660 };
0661 };
