0001 /*
0002 * Copyright 2015 Timesys Corporation.
0003 * Copyright 2015 General Electric Company
0004 *
0005 * This file is dual-licensed: you can use it either under the terms
0006 * of the GPL or the X11 license, at your option. Note that this dual
0007 * licensing only applies to this file, and not this project as a
0008 * whole.
0009 *
0010 * a) This file is free software; you can redistribute it and/or
0011 * modify it under the terms of the GNU General Public License
0012 * version 2 as published by the Free Software Foundation.
0013 *
0014 * This file is distributed in the hope that it will be useful,
0015 * but WITHOUT ANY WARRANTY; without even the implied warranty of
0016 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0017 * GNU General Public License for more details.
0018 *
0019 * Or, alternatively,
0020 *
0021 * b) Permission is hereby granted, free of charge, to any person
0022 * obtaining a copy of this software and associated documentation
0023 * files (the "Software"), to deal in the Software without
0024 * restriction, including without limitation the rights to use,
0025 * copy, modify, merge, publish, distribute, sublicense, and/or
0026 * sell copies of the Software, and to permit persons to whom the
0027 * Software is furnished to do so, subject to the following
0028 * conditions:
0029 *
0030 * The above copyright notice and this permission notice shall be
0031 * included in all copies or substantial portions of the Software.
0032 *
0033 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0034 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
0035 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0036 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
0037 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
0038 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
0039 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0040 * OTHER DEALINGS IN THE SOFTWARE.
0041 */
0042
0043 /dts-v1/;
0044
0045 #include "imx6q-bx50v3.dtsi"
0046
0047 / {
0048 model = "General Electric B850v3";
0049 compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q";
0050
0051 chosen {
0052 stdout-path = &uart3;
0053 };
0054 };
0055
0056 &ldb {
0057 fsl,dual-channel;
0058 status = "okay";
0059
0060 lvds0: lvds-channel@0 {
0061 fsl,data-mapping = "spwg";
0062 fsl,data-width = <24>;
0063 status = "okay";
0064
0065 port@4 {
0066 reg = <4>;
0067
0068 lvds0_out: endpoint {
0069 remote-endpoint = <&stdp4028_in>;
0070 };
0071 };
0072 };
0073 };
0074
0075 &i2c2 {
0076 pca9547_ddc: mux@70 {
0077 compatible = "nxp,pca9547";
0078 reg = <0x70>;
0079 #address-cells = <1>;
0080 #size-cells = <0>;
0081
0082 mux2_i2c1: i2c@0 {
0083 #address-cells = <1>;
0084 #size-cells = <0>;
0085 reg = <0x0>;
0086 };
0087
0088 mux2_i2c2: i2c@1 {
0089 #address-cells = <1>;
0090 #size-cells = <0>;
0091 reg = <0x1>;
0092 };
0093
0094 mux2_i2c3: i2c@2 {
0095 #address-cells = <1>;
0096 #size-cells = <0>;
0097 reg = <0x2>;
0098 };
0099
0100 mux2_i2c4: i2c@3 {
0101 #address-cells = <1>;
0102 #size-cells = <0>;
0103 reg = <0x3>;
0104 };
0105
0106 mux2_i2c5: i2c@4 {
0107 #address-cells = <1>;
0108 #size-cells = <0>;
0109 reg = <0x4>;
0110 };
0111
0112 mux2_i2c6: i2c@5 {
0113 #address-cells = <1>;
0114 #size-cells = <0>;
0115 reg = <0x5>;
0116 };
0117
0118 mux2_i2c7: i2c@6 {
0119 #address-cells = <1>;
0120 #size-cells = <0>;
0121 reg = <0x6>;
0122 };
0123
0124 mux2_i2c8: i2c@7 {
0125 #address-cells = <1>;
0126 #size-cells = <0>;
0127 reg = <0x7>;
0128 };
0129 };
0130 };
0131
0132 &hdmi {
0133 ddc-i2c-bus = <&mux2_i2c1>;
0134 };
0135
0136 &mux1_i2c1 {
0137 ads7830@4a {
0138 compatible = "ti,ads7830";
0139 reg = <0x4a>;
0140 };
0141 };
0142
0143 &mux2_i2c2 {
0144 clock-frequency = <100000>;
0145
0146 stdp2690@72 {
0147 compatible = "megachips,stdp2690-ge-b850v3-fw";
0148 reg = <0x72>;
0149
0150 ports {
0151 #address-cells = <1>;
0152 #size-cells = <0>;
0153
0154 port@0 {
0155 reg = <0>;
0156
0157 stdp2690_in: endpoint {
0158 remote-endpoint = <&stdp4028_out>;
0159 };
0160 };
0161
0162 port@1 {
0163 reg = <1>;
0164
0165 stdp2690_out: endpoint {
0166 /* Connector for external display */
0167 };
0168 };
0169 };
0170 };
0171
0172 stdp4028@73 {
0173 compatible = "megachips,stdp4028-ge-b850v3-fw";
0174 reg = <0x73>;
0175 interrupt-parent = <&gpio2>;
0176 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
0177
0178 ports {
0179 #address-cells = <1>;
0180 #size-cells = <0>;
0181
0182 port@0 {
0183 reg = <0>;
0184
0185 stdp4028_in: endpoint {
0186 remote-endpoint = <&lvds0_out>;
0187 };
0188 };
0189
0190 port@1 {
0191 reg = <1>;
0192
0193 stdp4028_out: endpoint {
0194 remote-endpoint = <&stdp2690_in>;
0195 };
0196 };
0197 };
0198 };
0199 };
0200
0201 &pca9539 {
0202 gpio-line-names = "AMB_P_INT1#", "AMB_P_INT2#", "BT_EN", "WLAN_EN",
0203 "REMOTE_ON_PML#", "SM_D_ACT", "DP1_RST#", "DP2_RST#",
0204 "", "", "", "",
0205 "", "", "", "";
0206
0207 P10-hog {
0208 gpio-hog;
0209 gpios = <8 0>;
0210 output-low;
0211 line-name = "PCA9539-P10";
0212 };
0213
0214 P11-hog {
0215 gpio-hog;
0216 gpios = <9 0>;
0217 output-low;
0218 line-name = "PCA9539-P11";
0219 };
0220 };
0221
0222 &pci_root {
0223 /* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */
0224 bridge@1,0 {
0225 compatible = "pci10b5,8605";
0226 reg = <0x00010000 0 0 0 0>;
0227
0228 #address-cells = <3>;
0229 #size-cells = <2>;
0230 #interrupt-cells = <1>;
0231
0232 bridge@2,1 {
0233 compatible = "pci10b5,8605";
0234 reg = <0x00020800 0 0 0 0>;
0235
0236 #address-cells = <3>;
0237 #size-cells = <2>;
0238 #interrupt-cells = <1>;
0239
0240 /* Intel Corporation I210 Gigabit Network Connection */
0241 ethernet@3,0 {
0242 compatible = "pci8086,1533";
0243 reg = <0x00030000 0 0 0 0>;
0244 };
0245 };
0246
0247 bridge@2,2 {
0248 compatible = "pci10b5,8605";
0249 reg = <0x00021000 0 0 0 0>;
0250
0251 #address-cells = <3>;
0252 #size-cells = <2>;
0253 #interrupt-cells = <1>;
0254
0255 /* Intel Corporation I210 Gigabit Network Connection */
0256 switch_nic: ethernet@4,0 {
0257 compatible = "pci8086,1533";
0258 reg = <0x00040000 0 0 0 0>;
0259 };
0260 };
0261 };
0262 };
0263
0264 &switch_ports {
0265 port@0 {
0266 reg = <0>;
0267 label = "eneport1";
0268 phy-handle = <&switchphy0>;
0269 };
0270
0271 port@1 {
0272 reg = <1>;
0273 label = "eneport2";
0274 phy-handle = <&switchphy1>;
0275 };
0276
0277 port@2 {
0278 reg = <2>;
0279 label = "enix";
0280 phy-handle = <&switchphy2>;
0281 };
0282
0283 port@3 {
0284 reg = <3>;
0285 label = "enid";
0286 phy-handle = <&switchphy3>;
0287 };
0288
0289 port@4 {
0290 reg = <4>;
0291 label = "cpu";
0292 ethernet = <&switch_nic>;
0293 phy-handle = <&switchphy4>;
0294 };
0295 };
