0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright 2014 Iain Paton <ipaton0@gmail.com>
0004 */
0005
0006 /dts-v1/;
0007 #include "imx6dl.dtsi"
0008 #include <dt-bindings/gpio/gpio.h>
0009
0010 / {
0011 model = "RIoTboard i.MX6S";
0012 compatible = "riot,imx6s-riotboard", "fsl,imx6dl";
0013
0014 memory@10000000 {
0015 device_type = "memory";
0016 reg = <0x10000000 0x40000000>;
0017 };
0018
0019 chosen {
0020 stdout-path = "serial1:115200n8";
0021 };
0022
0023 leds {
0024 compatible = "gpio-leds";
0025 pinctrl-names = "default";
0026 pinctrl-0 = <&pinctrl_led>;
0027
0028 led0: user1 {
0029 label = "user1";
0030 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
0031 default-state = "on";
0032 linux,default-trigger = "heartbeat";
0033 };
0034
0035 led1: user2 {
0036 label = "user2";
0037 gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
0038 default-state = "off";
0039 };
0040 };
0041
0042 sound {
0043 compatible = "fsl,imx-audio-sgtl5000";
0044 model = "imx6-riotboard-sgtl5000";
0045 ssi-controller = <&ssi1>;
0046 audio-codec = <&codec>;
0047 audio-routing =
0048 "MIC_IN", "Mic Jack",
0049 "Mic Jack", "Mic Bias",
0050 "Headphone Jack", "HP_OUT";
0051 mux-int-port = <1>;
0052 mux-ext-port = <3>;
0053 };
0054
0055 reg_2p5v: regulator-2p5v {
0056 compatible = "regulator-fixed";
0057 regulator-name = "2P5V";
0058 regulator-min-microvolt = <2500000>;
0059 regulator-max-microvolt = <2500000>;
0060 };
0061
0062 reg_3p3v: regulator-3p3v {
0063 compatible = "regulator-fixed";
0064 regulator-name = "3P3V";
0065 regulator-min-microvolt = <3300000>;
0066 regulator-max-microvolt = <3300000>;
0067 };
0068
0069 reg_usb_otg_vbus: regulator-usbotgvbus {
0070 compatible = "regulator-fixed";
0071 regulator-name = "usb_otg_vbus";
0072 regulator-min-microvolt = <5000000>;
0073 regulator-max-microvolt = <5000000>;
0074 gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
0075 };
0076 };
0077
0078 &audmux {
0079 pinctrl-names = "default";
0080 pinctrl-0 = <&pinctrl_audmux>;
0081 status = "okay";
0082 };
0083
0084 &clks {
0085 fsl,pmic-stby-poweroff;
0086 };
0087
0088 &fec {
0089 pinctrl-names = "default";
0090 pinctrl-0 = <&pinctrl_enet>;
0091 phy-mode = "rgmii-id";
0092 phy-handle = <&rgmii_phy>;
0093 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
0094 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
0095 fsl,err006687-workaround-present;
0096 status = "okay";
0097
0098 mdio {
0099 #address-cells = <1>;
0100 #size-cells = <0>;
0101
0102 /* Atheros AR8035 PHY */
0103 rgmii_phy: ethernet-phy@4 {
0104 reg = <4>;
0105 interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
0106 reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
0107 reset-assert-us = <10000>;
0108 reset-deassert-us = <1000>;
0109 qca,smarteee-tw-us-1g = <24>;
0110 qca,clk-out-frequency = <125000000>;
0111 };
0112 };
0113 };
0114
0115 &gpio1 {
0116 gpio-line-names =
0117 "", "", "SD2_WP", "", "SD2_CD", "I2C3_SCL",
0118 "I2C3_SDA", "I2C4_SCL",
0119 "I2C4_SDA", "", "", "", "", "", "", "",
0120 "", "PWM3", "", "", "", "", "", "",
0121 "", "", "", "", "", "", "", "";
0122 };
0123
0124 &gpio3 {
0125 gpio-line-names =
0126 "", "", "", "", "", "", "", "",
0127 "", "", "", "", "", "", "", "",
0128 "", "", "", "", "", "", "USB_OTG_VBUS", "",
0129 "UART3_TXD", "UART3_RXD", "", "", "EIM_D28", "", "", "";
0130 };
0131
0132 &gpio4 {
0133 gpio-line-names =
0134 "", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
0135 "UART5_TXD", "UART5_RXD", "", "", "", "", "", "",
0136 "GPIO4_16", "GPIO4_17", "GPIO4_18", "GPIO4_19", "",
0137 "CSPI3_CLK", "CSPI3_MOSI", "CSPI3_MISO",
0138 "CSPI3_CS0", "CSPI3_CS1", "GPIO4_26", "GPIO4_27",
0139 "CSPI3_RDY", "PWM1", "PWM2", "GPIO4_31";
0140 };
0141
0142 &gpio5 {
0143 gpio-line-names =
0144 "", "", "EIM_A25", "", "", "GPIO5_05", "GPIO5_06",
0145 "GPIO5_07",
0146 "GPIO5_08", "CSPI2_CS1", "CSPI2_MOSI", "CSPI2_MISO",
0147 "CSPI2_CS0", "CSPI2_CLK", "", "",
0148 "", "", "", "", "", "", "", "",
0149 "", "", "", "", "", "", "", "";
0150 };
0151
0152 &gpio7 {
0153 gpio-line-names =
0154 "SD3_CD", "SD3_WP", "", "", "", "", "", "",
0155 "", "", "", "", "", "", "", "",
0156 "", "", "", "", "", "", "", "",
0157 "", "", "", "", "", "", "", "";
0158 };
0159
0160 &hdmi {
0161 ddc-i2c-bus = <&i2c2>;
0162 status = "okay";
0163 };
0164
0165 &i2c1 {
0166 clock-frequency = <100000>;
0167 pinctrl-names = "default";
0168 pinctrl-0 = <&pinctrl_i2c1>;
0169 status = "okay";
0170
0171 codec: sgtl5000@a {
0172 compatible = "fsl,sgtl5000";
0173 reg = <0x0a>;
0174 clocks = <&clks IMX6QDL_CLK_CKO>;
0175 VDDA-supply = <®_2p5v>;
0176 VDDIO-supply = <®_3p3v>;
0177 };
0178
0179 pmic: pf0100@8 {
0180 compatible = "fsl,pfuze100";
0181 reg = <0x08>;
0182 interrupt-parent = <&gpio5>;
0183 interrupts = <16 8>;
0184 fsl,pmic-stby-poweroff;
0185
0186 regulators {
0187 reg_vddcore: sw1ab { /* VDDARM_IN */
0188 regulator-min-microvolt = <300000>;
0189 regulator-max-microvolt = <1875000>;
0190 regulator-always-on;
0191 };
0192
0193 reg_vddsoc: sw1c { /* VDDSOC_IN */
0194 regulator-min-microvolt = <300000>;
0195 regulator-max-microvolt = <1875000>;
0196 regulator-always-on;
0197 };
0198
0199 reg_gen_3v3: sw2 { /* VDDHIGH_IN */
0200 regulator-min-microvolt = <800000>;
0201 regulator-max-microvolt = <3300000>;
0202 regulator-always-on;
0203 };
0204
0205 reg_ddr_1v5a: sw3a { /* NVCC_DRAM, NVCC_RGMII */
0206 regulator-min-microvolt = <400000>;
0207 regulator-max-microvolt = <1975000>;
0208 regulator-always-on;
0209 };
0210
0211 reg_ddr_1v5b: sw3b { /* NVCC_DRAM, NVCC_RGMII */
0212 regulator-min-microvolt = <400000>;
0213 regulator-max-microvolt = <1975000>;
0214 regulator-always-on;
0215 };
0216
0217 reg_ddr_vtt: sw4 { /* MIPI conn */
0218 regulator-min-microvolt = <400000>;
0219 regulator-max-microvolt = <1975000>;
0220 regulator-always-on;
0221 };
0222
0223 reg_5v_600mA: swbst { /* not used */
0224 regulator-min-microvolt = <5000000>;
0225 regulator-max-microvolt = <5150000>;
0226 };
0227
0228 reg_snvs_3v: vsnvs { /* VDD_SNVS_IN */
0229 regulator-min-microvolt = <1500000>;
0230 regulator-max-microvolt = <3000000>;
0231 regulator-always-on;
0232 };
0233
0234 vref_reg: vrefddr { /* VREF_DDR */
0235 regulator-boot-on;
0236 regulator-always-on;
0237 };
0238
0239 reg_vgen1_1v5: vgen1 { /* not used */
0240 regulator-min-microvolt = <800000>;
0241 regulator-max-microvolt = <1550000>;
0242 };
0243
0244 reg_vgen2_1v2_eth: vgen2 { /* pcie ? */
0245 regulator-min-microvolt = <800000>;
0246 regulator-max-microvolt = <1550000>;
0247 regulator-always-on;
0248 };
0249
0250 reg_vgen3_2v8: vgen3 { /* not used */
0251 regulator-min-microvolt = <1800000>;
0252 regulator-max-microvolt = <3300000>;
0253 };
0254 reg_vgen4_1v8: vgen4 { /* NVCC_SD3 */
0255 regulator-min-microvolt = <1800000>;
0256 regulator-max-microvolt = <3300000>;
0257 regulator-always-on;
0258 };
0259
0260 reg_vgen5_2v5_sgtl: vgen5 { /* Pwr LED & 5V0_delayed enable */
0261 regulator-min-microvolt = <1800000>;
0262 regulator-max-microvolt = <3300000>;
0263 regulator-always-on;
0264 };
0265
0266 reg_vgen6_3v3: vgen6 { /* #V#_DELAYED enable, MIPI */
0267 regulator-min-microvolt = <1800000>;
0268 regulator-max-microvolt = <3300000>;
0269 regulator-always-on;
0270 };
0271 };
0272 };
0273 };
0274
0275 &i2c2 {
0276 clock-frequency = <100000>;
0277 pinctrl-names = "default";
0278 pinctrl-0 = <&pinctrl_i2c2>;
0279 status = "okay";
0280 };
0281
0282 &i2c4 {
0283 clock-frequency = <100000>;
0284 pinctrl-names = "default";
0285 pinctrl-0 = <&pinctrl_i2c4>;
0286 clocks = <&clks 116>;
0287 status = "okay";
0288 };
0289
0290 &pwm1 {
0291 pinctrl-names = "default";
0292 pinctrl-0 = <&pinctrl_pwm1>;
0293 status = "okay";
0294 };
0295
0296 &pwm2 {
0297 pinctrl-names = "default";
0298 pinctrl-0 = <&pinctrl_pwm2>;
0299 status = "okay";
0300 };
0301
0302 &pwm3 {
0303 pinctrl-names = "default";
0304 pinctrl-0 = <&pinctrl_pwm3>;
0305 status = "okay";
0306 };
0307
0308 &pwm4 {
0309 pinctrl-names = "default";
0310 pinctrl-0 = <&pinctrl_pwm4>;
0311 status = "okay";
0312 };
0313
0314 &ssi1 {
0315 status = "okay";
0316 };
0317
0318 &uart1 {
0319 pinctrl-names = "default";
0320 pinctrl-0 = <&pinctrl_uart1>;
0321 status = "okay";
0322 };
0323
0324 &uart2 {
0325 pinctrl-names = "default";
0326 pinctrl-0 = <&pinctrl_uart2>;
0327 status = "okay";
0328 };
0329
0330 &uart3 {
0331 pinctrl-names = "default";
0332 pinctrl-0 = <&pinctrl_uart3>;
0333 status = "okay";
0334 };
0335
0336 &uart4 {
0337 pinctrl-names = "default";
0338 pinctrl-0 = <&pinctrl_uart4>;
0339 status = "okay";
0340 };
0341
0342 &uart5 {
0343 pinctrl-names = "default";
0344 pinctrl-0 = <&pinctrl_uart5>;
0345 status = "okay";
0346 };
0347
0348 &usbh1 {
0349 dr_mode = "host";
0350 disable-over-current;
0351 status = "okay";
0352 };
0353
0354 &usbotg {
0355 vbus-supply = <®_usb_otg_vbus>;
0356 pinctrl-names = "default";
0357 pinctrl-0 = <&pinctrl_usbotg>;
0358 disable-over-current;
0359 dr_mode = "otg";
0360 status = "okay";
0361 };
0362
0363 &usdhc2 {
0364 pinctrl-names = "default";
0365 pinctrl-0 = <&pinctrl_usdhc2>;
0366 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
0367 wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
0368 vmmc-supply = <®_3p3v>;
0369 status = "okay";
0370 };
0371
0372 &usdhc3 {
0373 pinctrl-names = "default";
0374 pinctrl-0 = <&pinctrl_usdhc3>;
0375 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
0376 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
0377 vmmc-supply = <®_3p3v>;
0378 status = "okay";
0379 };
0380
0381 &usdhc4 {
0382 pinctrl-names = "default";
0383 pinctrl-0 = <&pinctrl_usdhc4>;
0384 vmmc-supply = <®_3p3v>;
0385 non-removable;
0386 status = "okay";
0387 };
0388
0389 &iomuxc {
0390 pinctrl-names = "default";
0391
0392 imx6-riotboard {
0393 pinctrl_audmux: audmuxgrp {
0394 fsl,pins = <
0395 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
0396 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
0397 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
0398 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
0399 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */
0400 >;
0401 };
0402
0403 pinctrl_ecspi1: ecspi1grp {
0404 fsl,pins = <
0405 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
0406 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
0407 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
0408 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x000b1 /* CS0 */
0409 >;
0410 };
0411
0412 pinctrl_ecspi2: ecspi2grp {
0413 fsl,pins = <
0414 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x000b1 /* CS1 */
0415 MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1
0416 MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1
0417 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1 /* CS0 */
0418 MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1
0419 >;
0420 };
0421
0422 pinctrl_ecspi3: ecspi3grp {
0423 fsl,pins = <
0424 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
0425 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
0426 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
0427 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 /* CS0 */
0428 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x000b1 /* CS1 */
0429 >;
0430 };
0431
0432 pinctrl_enet: enetgrp {
0433 fsl,pins = <
0434 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0435 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0436 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
0437 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
0438 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
0439 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
0440 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
0441 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
0442 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
0443 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: IO voltage: pull up */
0444 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#0: pull down */
0445 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */
0446 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#1: pull up */
0447 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */
0448 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */
0449 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 /* GPIO16 -> AR8035 25MHz */
0450 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */
0451 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0 /* AR8035 interrupt */
0452 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
0453 >;
0454 };
0455
0456 pinctrl_i2c1: i2c1grp {
0457 fsl,pins = <
0458 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
0459 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
0460 >;
0461 };
0462
0463 pinctrl_i2c2: i2c2grp {
0464 fsl,pins = <
0465 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
0466 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
0467 >;
0468 };
0469
0470 pinctrl_i2c3: i2c3grp {
0471 fsl,pins = <
0472 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
0473 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0474 >;
0475 };
0476
0477 pinctrl_i2c4: i2c4grp {
0478 fsl,pins = <
0479 MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
0480 MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
0481 >;
0482 };
0483
0484 pinctrl_led: ledgrp {
0485 fsl,pins = <
0486 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* user led0 */
0487 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* user led1 */
0488 >;
0489 };
0490
0491 pinctrl_pwm1: pwm1grp {
0492 fsl,pins = <
0493 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
0494 >;
0495 };
0496
0497 pinctrl_pwm2: pwm2grp {
0498 fsl,pins = <
0499 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
0500 >;
0501 };
0502
0503 pinctrl_pwm3: pwm3grp {
0504 fsl,pins = <
0505 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
0506 >;
0507 };
0508
0509 pinctrl_pwm4: pwm4grp {
0510 fsl,pins = <
0511 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
0512 >;
0513 };
0514
0515 pinctrl_uart1: uart1grp {
0516 fsl,pins = <
0517 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
0518 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
0519 >;
0520 };
0521
0522 pinctrl_uart2: uart2grp {
0523 fsl,pins = <
0524 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
0525 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
0526 >;
0527 };
0528
0529 pinctrl_uart3: uart3grp {
0530 fsl,pins = <
0531 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0532 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0533 >;
0534 };
0535
0536 pinctrl_uart4: uart4grp {
0537 fsl,pins = <
0538 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
0539 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
0540 >;
0541 };
0542
0543 pinctrl_uart5: uart5grp {
0544 fsl,pins = <
0545 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
0546 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
0547 >;
0548 };
0549
0550 pinctrl_usbotg: usbotggrp {
0551 fsl,pins = <
0552 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
0553 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */
0554 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
0555 >;
0556 };
0557
0558 pinctrl_usdhc2: usdhc2grp {
0559 fsl,pins = <
0560 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
0561 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
0562 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
0563 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
0564 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
0565 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
0566 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* SD2 CD */
0567 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* SD2 WP */
0568 >;
0569 };
0570
0571 pinctrl_usdhc3: usdhc3grp {
0572 fsl,pins = <
0573 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
0574 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
0575 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
0576 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
0577 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
0578 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
0579 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* SD3 CD */
0580 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* SD3 WP */
0581 >;
0582 };
0583
0584 pinctrl_usdhc4: usdhc4grp {
0585 fsl,pins = <
0586 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
0587 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
0588 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
0589 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
0590 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
0591 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
0592 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x17059 /* SD4 RST (eMMC) */
0593 >;
0594 };
0595 };
0596 };
