0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002 /*
0003 * Copyright (c) 2014 Protonic Holland
0004 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
0005 */
0006
0007 /dts-v1/;
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/leds/common.h>
0010 #include "imx6dl.dtsi"
0011
0012 / {
0013 model = "Plymovent M2M board";
0014 compatible = "ply,plym2m", "fsl,imx6dl";
0015
0016 chosen {
0017 stdout-path = &uart4;
0018 };
0019
0020 backlight: backlight {
0021 compatible = "pwm-backlight";
0022 pwms = <&pwm1 0 5000000 0>;
0023 brightness-levels = <0 1000>;
0024 num-interpolated-steps = <20>;
0025 default-brightness-level = <19>;
0026 power-supply = <®_12v0>;
0027 };
0028
0029 display {
0030 compatible = "fsl,imx-parallel-display";
0031 pinctrl-0 = <&pinctrl_ipu1_disp>;
0032 pinctrl-names = "default";
0033 #address-cells = <1>;
0034 #size-cells = <0>;
0035
0036 port@0 {
0037 reg = <0>;
0038
0039 display_in: endpoint {
0040 remote-endpoint = <&ipu1_di0_disp0>;
0041 };
0042 };
0043
0044 port@1 {
0045 reg = <1>;
0046
0047 display_out: endpoint {
0048 remote-endpoint = <&panel_in>;
0049 };
0050 };
0051 };
0052
0053 iio-hwmon {
0054 compatible = "iio-hwmon";
0055 io-channels = <&vdiv_vaccu>;
0056 };
0057
0058 leds {
0059 compatible = "gpio-leds";
0060 pinctrl-names = "default";
0061 pinctrl-0 = <&pinctrl_leds>;
0062
0063 led-0 {
0064 label = "debug0";
0065 function = LED_FUNCTION_STATUS;
0066 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
0067 linux,default-trigger = "heartbeat";
0068 };
0069 };
0070
0071 panel {
0072 compatible = "edt,etm0700g0bdh6";
0073 backlight = <&backlight>;
0074 power-supply = <®_3v3>;
0075
0076 port {
0077 panel_in: endpoint {
0078 remote-endpoint = <&display_out>;
0079 };
0080 };
0081 };
0082
0083 clk50m_phy: phy-clock {
0084 compatible = "fixed-clock";
0085 #clock-cells = <0>;
0086 clock-frequency = <50000000>;
0087 };
0088
0089 reg_3v3: regulator-3v3 {
0090 compatible = "regulator-fixed";
0091 regulator-name = "3v3";
0092 regulator-min-microvolt = <3300000>;
0093 regulator-max-microvolt = <3300000>;
0094 };
0095
0096 reg_5v0: regulator-5v0 {
0097 compatible = "regulator-fixed";
0098 regulator-name = "5v0";
0099 regulator-min-microvolt = <5000000>;
0100 regulator-max-microvolt = <5000000>;
0101 };
0102
0103 reg_12v0: regulator-12v0 {
0104 compatible = "regulator-fixed";
0105 regulator-name = "12v0";
0106 regulator-min-microvolt = <12000000>;
0107 regulator-max-microvolt = <12000000>;
0108 };
0109
0110 thermal-zones {
0111 chassis-thermal {
0112 polling-delay = <20000>;
0113 polling-delay-passive = <0>;
0114 thermal-sensors = <&tsens0>;
0115 };
0116
0117 touch-thermal0 {
0118 polling-delay = <20000>;
0119 polling-delay-passive = <0>;
0120 thermal-sensors = <&touch_temp0>;
0121 };
0122
0123 touch-thermal1 {
0124 polling-delay = <20000>;
0125 polling-delay-passive = <0>;
0126 thermal-sensors = <&touch_temp1>;
0127 };
0128 };
0129
0130 touchscreen {
0131 compatible = "resistive-adc-touch";
0132 io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>,
0133 <&adc_ts 5>;
0134 io-channel-names = "y", "z1", "z2", "x";
0135 touchscreen-min-pressure = <64687>;
0136 touchscreen-inverted-x;
0137 touchscreen-inverted-y;
0138 touchscreen-x-plate-ohms = <300>;
0139 touchscreen-y-plate-ohms = <800>;
0140 };
0141
0142 touch_temp0: touch-temperature-sensor0 {
0143 compatible = "generic-adc-thermal";
0144 #thermal-sensor-cells = <0>;
0145 io-channels = <&adc_ts 0>;
0146 io-channel-names = "sensor-channel";
0147 temperature-lookup-table = < (-40000) 736
0148 85000 474>;
0149 };
0150
0151 touch_temp1: touch-temperature-sensor1 {
0152 compatible = "generic-adc-thermal";
0153 #thermal-sensor-cells = <0>;
0154 io-channels = <&adc_ts 7>;
0155 io-channel-names = "sensor-channel";
0156 temperature-lookup-table = < (-40000) 826
0157 85000 609>;
0158 };
0159
0160 vdiv_vaccu: voltage-divider-vaccu {
0161 compatible = "voltage-divider";
0162 io-channels = <&adc_ts 2>;
0163 output-ohms = <2500>;
0164 full-ohms = <64000>;
0165 #io-channel-cells = <0>;
0166 };
0167 };
0168
0169 &can1 {
0170 pinctrl-names = "default";
0171 pinctrl-0 = <&pinctrl_can1>;
0172 xceiver-supply = <®_5v0>;
0173 status = "okay";
0174 };
0175
0176 &ecspi1 {
0177 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
0178 pinctrl-names = "default";
0179 pinctrl-0 = <&pinctrl_ecspi1>;
0180 status = "okay";
0181
0182 flash@0 {
0183 compatible = "jedec,spi-nor";
0184 reg = <0>;
0185 spi-max-frequency = <20000000>;
0186 };
0187 };
0188
0189 &ecspi2 {
0190 cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
0191 pinctrl-names = "default";
0192 pinctrl-0 = <&pinctrl_ecspi2>;
0193 status = "okay";
0194
0195 adc_ts: adc@0 {
0196 compatible = "ti,tsc2046e-adc";
0197 reg = <0>;
0198 pinctrl-0 = <&pinctrl_tsc2046>;
0199 pinctrl-names = "default";
0200 spi-max-frequency = <1000000>;
0201 interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
0202 #io-channel-cells = <1>;
0203
0204 #address-cells = <1>;
0205 #size-cells = <0>;
0206
0207 channel@0 {
0208 reg = <0>;
0209 settling-time-us = <300>;
0210 oversampling-ratio = <5>;
0211 };
0212
0213 channel@1 {
0214 reg = <1>;
0215 settling-time-us = <700>;
0216 oversampling-ratio = <5>;
0217 };
0218
0219 channel@2 {
0220 reg = <2>;
0221 settling-time-us = <300>;
0222 oversampling-ratio = <5>;
0223 };
0224
0225 channel@3 {
0226 reg = <3>;
0227 settling-time-us = <700>;
0228 oversampling-ratio = <5>;
0229 };
0230
0231 channel@4 {
0232 reg = <4>;
0233 settling-time-us = <700>;
0234 oversampling-ratio = <5>;
0235 };
0236
0237 channel@5 {
0238 reg = <5>;
0239 settling-time-us = <700>;
0240 oversampling-ratio = <5>;
0241 };
0242
0243 /* channel 6 is not connected */
0244
0245 channel@7 {
0246 reg = <7>;
0247 settling-time-us = <300>;
0248 oversampling-ratio = <5>;
0249 };
0250 };
0251 };
0252
0253 &fec {
0254 pinctrl-names = "default";
0255 pinctrl-0 = <&pinctrl_enet>;
0256 phy-mode = "rmii";
0257 clocks = <&clks IMX6QDL_CLK_ENET>,
0258 <&clks IMX6QDL_CLK_ENET>,
0259 <&clk50m_phy>;
0260 clock-names = "ipg", "ahb", "ptp";
0261 phy-handle = <&rgmii_phy>;
0262 status = "okay";
0263
0264 mdio {
0265 #address-cells = <1>;
0266 #size-cells = <0>;
0267
0268 /* Microchip KSZ8081RNA PHY */
0269 rgmii_phy: ethernet-phy@0 {
0270 reg = <0>;
0271 interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
0272 reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
0273 reset-assert-us = <10000>;
0274 reset-deassert-us = <300>;
0275 };
0276 };
0277 };
0278
0279 &gpio1 {
0280 gpio-line-names =
0281 "CAN1_TERM", "SD1_CD", "", "", "", "", "", "",
0282 "DEBUG_0", "", "", "", "", "", "", "",
0283 "", "", "", "", "", "", "", "",
0284 "", "", "", "", "", "", "", "";
0285 };
0286
0287 &gpio2 {
0288 gpio-line-names =
0289 "", "", "", "", "", "", "", "",
0290 "", "", "", "", "", "", "", "",
0291 "", "", "", "", "", "", "", "",
0292 "", "", "ECSPI2_SS0", "", "", "", "TSC_BUSY", "";
0293 };
0294
0295 &gpio3 {
0296 gpio-line-names =
0297 "", "", "", "", "", "", "", "",
0298 "", "", "", "", "", "", "", "",
0299 "", "", "", "ECSPI1_SS1", "TSC_PENIRQ", "", "", "",
0300 "", "", "", "", "", "", "", "";
0301 };
0302
0303 &gpio4 {
0304 gpio-line-names =
0305 "", "", "", "", "", "", "", "",
0306 "", "", "", "", "CAN1_SR", "", "", "",
0307 "", "", "", "", "", "", "", "",
0308 "", "", "", "", "", "", "", "";
0309 };
0310
0311 &gpio5 {
0312 gpio-line-names =
0313 "", "", "", "", "", "", "", "",
0314 "", "", "", "", "", "", "", "",
0315 "", "", "", "", "", "", "ETH_RESET", "ETH_INTRP",
0316 "", "", "", "", "", "", "", "";
0317 };
0318
0319 &i2c1 {
0320 clock-frequency = <100000>;
0321 pinctrl-names = "default";
0322 pinctrl-0 = <&pinctrl_i2c1>;
0323 status = "okay";
0324
0325 /* additional i2c devices are added automatically by the boot loader */
0326 };
0327
0328 &i2c3 {
0329 clock-frequency = <100000>;
0330 pinctrl-names = "default";
0331 pinctrl-0 = <&pinctrl_i2c3>;
0332 status = "okay";
0333
0334 tsens0: temperature-sensor@70 {
0335 compatible = "ti,tmp103";
0336 reg = <0x70>;
0337 #thermal-sensor-cells = <0>;
0338 };
0339 };
0340
0341 &ipu1_di0_disp0 {
0342 remote-endpoint = <&display_in>;
0343 };
0344
0345 &pwm1 {
0346 pinctrl-names = "default";
0347 pinctrl-0 = <&pinctrl_pwm1>;
0348 status = "okay";
0349 };
0350
0351 &uart4 {
0352 pinctrl-names = "default";
0353 pinctrl-0 = <&pinctrl_uart4>;
0354 status = "okay";
0355 };
0356
0357 &usbphynop1 {
0358 status = "disabled";
0359 };
0360
0361 &usbphynop2 {
0362 status = "disabled";
0363 };
0364
0365 &usbotg {
0366 phy_type = "utmi";
0367 dr_mode = "host";
0368 disable-over-current;
0369 status = "okay";
0370 };
0371
0372 &usdhc1 {
0373 pinctrl-names = "default";
0374 pinctrl-0 = <&pinctrl_usdhc1>;
0375 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
0376 no-1-8-v;
0377 disable-wp;
0378 cap-sd-highspeed;
0379 no-mmc;
0380 no-sdio;
0381 status = "okay";
0382 };
0383
0384 &usdhc3 {
0385 pinctrl-names = "default";
0386 pinctrl-0 = <&pinctrl_usdhc3>;
0387 bus-width = <8>;
0388 no-1-8-v;
0389 non-removable;
0390 no-sd;
0391 no-sdio;
0392 status = "okay";
0393 };
0394
0395 &iomuxc {
0396 pinctrl_can1: can1grp {
0397 fsl,pins = <
0398 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
0399 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
0400 /* CAN1_SR */
0401 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
0402 /* CAN1_TERM */
0403 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
0404 >;
0405 };
0406
0407 pinctrl_ecspi1: ecspi1grp {
0408 fsl,pins = <
0409 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b000
0410 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x3008
0411 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x3008
0412 /* CS */
0413 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x3008
0414 >;
0415 };
0416
0417 pinctrl_ecspi2: ecspi2grp {
0418 fsl,pins = <
0419 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x10000
0420 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x3008
0421 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x3008
0422 /* CS */
0423 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x3008
0424 >;
0425 };
0426
0427 pinctrl_enet: enetgrp {
0428 fsl,pins = <
0429 /* MX6QDL_ENET_PINGRP4 */
0430 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0431 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0432 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
0433 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
0434 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
0435 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
0436 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
0437 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
0438 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
0439
0440 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
0441 /* Phy reset */
0442 MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
0443 /* nINTRP */
0444 MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
0445 >;
0446 };
0447
0448 pinctrl_i2c1: i2c1grp {
0449 fsl,pins = <
0450 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
0451 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
0452 >;
0453 };
0454
0455 pinctrl_i2c3: i2c3grp {
0456 fsl,pins = <
0457 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
0458 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0459 >;
0460 };
0461
0462 pinctrl_ipu1_disp: ipudisp1grp {
0463 fsl,pins = <
0464 /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
0465 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
0466 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
0467 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
0468 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
0469 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
0470 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
0471 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
0472 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
0473 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
0474 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
0475 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
0476 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
0477 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
0478 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
0479 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
0480 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
0481 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
0482 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
0483 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
0484 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
0485 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
0486 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
0487 >;
0488 };
0489
0490 pinctrl_leds: ledsgrp {
0491 fsl,pins = <
0492 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
0493 >;
0494 };
0495
0496 pinctrl_pwm1: pwm1grp {
0497 fsl,pins = <
0498 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
0499 >;
0500 };
0501
0502 pinctrl_tsc2046: tsc2046grp {
0503 fsl,pins = <
0504 /* TSC_PENIRQ */
0505 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1
0506 /* TSC_BUSY */
0507 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
0508 >;
0509 };
0510
0511 pinctrl_uart4: uart4grp {
0512 fsl,pins = <
0513 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
0514 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
0515 >;
0516 };
0517
0518 pinctrl_usdhc1: usdhc1grp {
0519 fsl,pins = <
0520 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
0521 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
0522 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
0523 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
0524 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
0525 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
0526 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
0527 >;
0528 };
0529
0530 pinctrl_usdhc3: usdhc3grp {
0531 fsl,pins = <
0532 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
0533 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
0534 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
0535 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
0536 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
0537 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
0538 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
0539 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
0540 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
0541 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
0542 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
0543 >;
0544 };
0545 };
