0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright (c) 2019 Protonic Holland
0004 * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
0005 */
0006
0007 /dts-v1/;
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/leds/common.h>
0010 #include "imx6dl.dtsi"
0011
0012 / {
0013 model = "Van der Laan LANMCU";
0014 compatible = "vdl,lanmcu", "fsl,imx6dl";
0015
0016 chosen {
0017 stdout-path = &uart4;
0018 };
0019
0020 clock_ksz8081: clock-ksz8081 {
0021 compatible = "fixed-clock";
0022 #clock-cells = <0>;
0023 clock-frequency = <50000000>;
0024 };
0025
0026 backlight: backlight {
0027 compatible = "pwm-backlight";
0028 pwms = <&pwm1 0 5000000 0>;
0029 brightness-levels = <0 1000>;
0030 num-interpolated-steps = <20>;
0031 default-brightness-level = <19>;
0032 };
0033
0034 display {
0035 compatible = "fsl,imx-parallel-display";
0036 pinctrl-0 = <&pinctrl_ipu1_disp>;
0037 pinctrl-names = "default";
0038 #address-cells = <1>;
0039 #size-cells = <0>;
0040
0041 port@0 {
0042 reg = <0>;
0043
0044 display_in: endpoint {
0045 remote-endpoint = <&ipu1_di0_disp0>;
0046 };
0047 };
0048
0049 port@1 {
0050 reg = <1>;
0051
0052 display_out: endpoint {
0053 remote-endpoint = <&panel_in>;
0054 };
0055 };
0056 };
0057
0058 leds {
0059 compatible = "gpio-leds";
0060 pinctrl-names = "default";
0061 pinctrl-0 = <&pinctrl_leds>;
0062
0063 led-0 {
0064 label = "debug0";
0065 function = LED_FUNCTION_STATUS;
0066 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
0067 linux,default-trigger = "heartbeat";
0068 };
0069 };
0070
0071 panel {
0072 compatible = "edt,etm0700g0bdh6";
0073 backlight = <&backlight>;
0074
0075 port {
0076 panel_in: endpoint {
0077 remote-endpoint = <&display_out>;
0078 };
0079 };
0080 };
0081
0082 reg_otg_vbus: regulator-otg-vbus {
0083 compatible = "regulator-fixed";
0084 regulator-name = "otg-vbus";
0085 regulator-min-microvolt = <5000000>;
0086 regulator-max-microvolt = <5000000>;
0087 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
0088 enable-active-high;
0089 };
0090
0091 usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
0092 compatible = "mmc-pwrseq-simple";
0093 pinctrl-names = "default";
0094 pinctrl-0 = <&pinctrl_wifi_npd>;
0095 reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
0096 };
0097
0098 };
0099
0100 &can1 {
0101 pinctrl-names = "default";
0102 pinctrl-0 = <&pinctrl_can1>;
0103 status = "okay";
0104 };
0105
0106 &can2 {
0107 pinctrl-names = "default";
0108 pinctrl-0 = <&pinctrl_can2>;
0109 status = "okay";
0110 };
0111
0112 &fec {
0113 pinctrl-names = "default";
0114 pinctrl-0 = <&pinctrl_enet>;
0115 phy-mode = "rmii";
0116 clocks = <&clks IMX6QDL_CLK_ENET>,
0117 <&clks IMX6QDL_CLK_ENET>,
0118 <&clock_ksz8081>;
0119 clock-names = "ipg", "ahb", "ptp";
0120 phy-handle = <&rgmii_phy>;
0121 status = "okay";
0122
0123 mdio {
0124 #address-cells = <1>;
0125 #size-cells = <0>;
0126
0127 /* Microchip KSZ8081RNA PHY */
0128 rgmii_phy: ethernet-phy@0 {
0129 reg = <0>;
0130 interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
0131 reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
0132 reset-assert-us = <10000>;
0133 reset-deassert-us = <300>;
0134 };
0135 };
0136 };
0137
0138 &gpio1 {
0139 gpio-line-names =
0140 "", "SD1_CD", "", "", "", "", "", "",
0141 "DEBUG_0", "BL_PWM", "", "", "", "", "", "",
0142 "", "", "", "", "", "", "", "ENET_LED_GREEN",
0143 "", "", "", "", "", "", "", "";
0144 };
0145
0146 &gpio3 {
0147 gpio-line-names =
0148 "", "", "", "", "", "", "", "",
0149 "", "", "", "", "", "", "", "",
0150 "", "", "", "", "TS_INT", "USB_OTG1_OC", "USB_OTG1_PWR", "",
0151 "", "", "", "", "UART2_CTS", "", "UART3_CTS", "";
0152 };
0153
0154 &gpio5 {
0155 gpio-line-names =
0156 "", "", "", "", "", "", "", "",
0157 "", "", "", "", "", "", "", "",
0158 "", "", "", "", "", "", "ENET_RST", "ENET_INT",
0159 "", "", "I2C1_SDA", "I2C1_SCL", "", "", "", "";
0160 };
0161
0162 &gpio6 {
0163 gpio-line-names =
0164 "", "", "", "", "", "", "", "",
0165 "", "", "WLAN_REG_ON", "", "", "", "", "",
0166 "", "", "", "", "", "", "", "",
0167 "", "", "", "", "", "", "", "";
0168 };
0169
0170 &gpio7 {
0171 gpio-line-names =
0172 "", "", "", "", "", "", "", "",
0173 "EMMC_RST", "", "", "", "", "", "", "",
0174 "", "", "", "", "", "", "", "",
0175 "", "", "", "", "", "", "", "";
0176 };
0177
0178 &i2c1 {
0179 clock-frequency = <100000>;
0180 pinctrl-names = "default";
0181 pinctrl-0 = <&pinctrl_i2c1>;
0182 status = "okay";
0183
0184 /* additional i2c devices are added automatically by the boot loader */
0185 };
0186
0187 &i2c3 {
0188 clock-frequency = <100000>;
0189 pinctrl-names = "default";
0190 pinctrl-0 = <&pinctrl_i2c3>;
0191 status = "okay";
0192
0193 touchscreen@38 {
0194 compatible = "edt,edt-ft5406";
0195 reg = <0x38>;
0196 pinctrl-names = "default";
0197 pinctrl-0 = <&pinctrl_ts_edt>;
0198 interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
0199
0200 touchscreen-size-x = <1792>;
0201 touchscreen-size-y = <1024>;
0202
0203 touchscreen-fuzz-x = <0>;
0204 touchscreen-fuzz-y = <0>;
0205
0206 /* Touch screen calibration */
0207 threshold = <50>;
0208 gain = <5>;
0209 offset = <10>;
0210 };
0211
0212 rtc@51 {
0213 compatible = "nxp,pcf8563";
0214 reg = <0x51>;
0215 };
0216 };
0217
0218 &ipu1_di0_disp0 {
0219 remote-endpoint = <&display_in>;
0220 };
0221
0222 &pwm1 {
0223 pinctrl-names = "default";
0224 pinctrl-0 = <&pinctrl_pwm1>;
0225 status = "okay";
0226 };
0227
0228 &uart2 {
0229 pinctrl-names = "default";
0230 pinctrl-0 = <&pinctrl_uart2>;
0231 linux,rs485-enabled-at-boot-time;
0232 uart-has-rtscts;
0233 status = "okay";
0234 };
0235
0236 &uart3 {
0237 pinctrl-names = "default";
0238 pinctrl-0 = <&pinctrl_uart3>;
0239 linux,rs485-enabled-at-boot-time;
0240 uart-has-rtscts;
0241 status = "okay";
0242 };
0243
0244 &uart4 {
0245 pinctrl-names = "default";
0246 pinctrl-0 = <&pinctrl_uart4>;
0247 status = "okay";
0248 };
0249
0250 &usbotg {
0251 vbus-supply = <®_otg_vbus>;
0252 pinctrl-names = "default";
0253 pinctrl-0 = <&pinctrl_usbotg>;
0254 phy_type = "utmi";
0255 dr_mode = "host";
0256 status = "okay";
0257 };
0258
0259 &usdhc1 {
0260 pinctrl-names = "default";
0261 pinctrl-0 = <&pinctrl_usdhc1>;
0262 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
0263 no-1-8-v;
0264 disable-wp;
0265 cap-sd-highspeed;
0266 no-mmc;
0267 no-sdio;
0268 status = "okay";
0269 };
0270
0271 &usdhc2 {
0272 pinctrl-names = "default";
0273 pinctrl-0 = <&pinctrl_usdhc2>;
0274 no-1-8-v;
0275 non-removable;
0276 mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
0277 #address-cells = <1>;
0278 #size-cells = <0>;
0279 status = "okay";
0280
0281 wifi@1 {
0282 reg = <1>;
0283 compatible = "brcm,bcm4329-fmac";
0284 };
0285 };
0286
0287 &usdhc3 {
0288 pinctrl-names = "default";
0289 pinctrl-0 = <&pinctrl_usdhc3>;
0290 bus-width = <8>;
0291 no-1-8-v;
0292 non-removable;
0293 no-sd;
0294 no-sdio;
0295 status = "okay";
0296 };
0297
0298 &iomuxc {
0299 pinctrl_can1: can1grp {
0300 fsl,pins = <
0301 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
0302 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
0303 >;
0304 };
0305
0306 pinctrl_can2: can2grp {
0307 fsl,pins = <
0308 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
0309 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
0310 >;
0311 };
0312
0313 pinctrl_enet: enetgrp {
0314 fsl,pins = <
0315 /* MX6QDL_ENET_PINGRP4 */
0316 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
0317 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
0318 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
0319 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
0320 MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
0321 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
0322 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
0323 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
0324 MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
0325
0326 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b0b0
0327 /* Phy reset */
0328 MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x1b0b0
0329 /* nINTRP */
0330 MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23 0x1b0b0
0331 >;
0332 };
0333
0334 pinctrl_i2c1: i2c1grp {
0335 fsl,pins = <
0336 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
0337 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
0338 >;
0339 };
0340
0341 pinctrl_i2c3: i2c3grp {
0342 fsl,pins = <
0343 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
0344 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
0345 >;
0346 };
0347
0348 pinctrl_ipu1_disp: ipudisp1grp {
0349 fsl,pins = <
0350 /* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
0351 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x30
0352 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x30
0353 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x30
0354 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x30
0355 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x30
0356 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x30
0357 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x30
0358 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x30
0359 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x30
0360 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x30
0361 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x30
0362 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x30
0363 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x30
0364 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x30
0365 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x30
0366 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x30
0367 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x30
0368 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x30
0369 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x30
0370 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x30
0371 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x30
0372 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x30
0373 >;
0374 };
0375
0376 pinctrl_leds: ledsgrp {
0377 fsl,pins = <
0378 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
0379 >;
0380 };
0381
0382 pinctrl_pwm1: pwm1grp {
0383 fsl,pins = <
0384 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8
0385 >;
0386 };
0387
0388 pinctrl_ts_edt: ts1grp {
0389 fsl,pins = <
0390 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0
0391 >;
0392 };
0393
0394 pinctrl_uart2: uart2grp {
0395 fsl,pins = <
0396 MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
0397 MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
0398 MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x130b1
0399 >;
0400 };
0401
0402 pinctrl_uart3: uart3grp {
0403 fsl,pins = <
0404 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
0405 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
0406 MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x130b1
0407 >;
0408 };
0409
0410 pinctrl_uart4: uart4grp {
0411 fsl,pins = <
0412 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
0413 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
0414 >;
0415 };
0416
0417 pinctrl_usbotg: usbotggrp {
0418 fsl,pins = <
0419 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
0420 /* power enable, high active */
0421 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
0422 >;
0423 };
0424
0425 pinctrl_usdhc1: usdhc1grp {
0426 fsl,pins = <
0427 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
0428 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
0429 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
0430 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
0431 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
0432 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
0433 MX6QDL_PAD_GPIO_1__SD1_CD_B 0x1b0b0
0434 >;
0435 };
0436
0437 pinctrl_usdhc2: usdhc2grp {
0438 fsl,pins = <
0439 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
0440 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
0441 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
0442 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
0443 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
0444 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
0445 >;
0446 };
0447
0448 pinctrl_usdhc3: usdhc3grp {
0449 fsl,pins = <
0450 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
0451 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
0452 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
0453 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
0454 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
0455 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
0456 MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
0457 MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
0458 MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
0459 MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
0460 MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
0461 >;
0462 };
0463
0464 pinctrl_wifi_npd: wifigrp {
0465 fsl,pins = <
0466 /* WL_REG_ON */
0467 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x13069
0468 >;
0469 };
0470 };
