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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2016 Eckelmann AG.
0004  * Copyright (C) 2013 Freescale Semiconductor, Inc.
0005  */
0006 
0007 /dts-v1/;
0008 
0009 #include <dt-bindings/gpio/gpio.h>
0010 
0011 #include "imx6dl.dtsi"
0012 
0013 / {
0014         model = "Eckelmann CI 4X10 Board";
0015         compatible = "eckelmann,imx6dl-ci4x10", "fsl,imx6dl";
0016 
0017         chosen {
0018                 stdout-path = &uart3;
0019         };
0020 
0021         memory@10000000 {
0022                 device_type = "memory";
0023                 reg = <0x10000000 0x40000000>;
0024         };
0025 
0026         rmii_clk: clock-rmii {
0027                 /* This clock is provided by the phy (KSZ8091RNB) */
0028                 compatible = "fixed-clock";
0029                 #clock-cells = <0>;
0030                 clock-frequency = <50000000>;
0031         };
0032 
0033         reg_usb_h1_vbus: regulator-usb-h1-vbus {
0034                 pinctrl-names = "default";
0035                 pinctrl-0 = <&pinctrl_reg_usb_h1_vbus>;
0036                 compatible = "regulator-fixed";
0037                 regulator-name = "usb_h1_vbus";
0038                 regulator-min-microvolt = <5000000>;
0039                 regulator-max-microvolt = <5000000>;
0040                 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
0041                 enable-active-high;
0042         };
0043 
0044         siox {
0045                 compatible = "eckelmann,siox-gpio";
0046                 pinctrl-names = "default";
0047                 pinctrl-0 = <&pinctrl_siox>;
0048                 din-gpios = <&gpio6 11 GPIO_ACTIVE_HIGH>;
0049                 dout-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
0050                 dclk-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>;
0051                 dld-gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
0052         };
0053 };
0054 
0055 &can1 {
0056         pinctrl-names = "default";
0057         pinctrl-0 = <&pinctrl_flexcan1>;
0058         status = "okay";
0059 };
0060 
0061 &can2 {
0062         pinctrl-names = "default";
0063         pinctrl-0 = <&pinctrl_flexcan2>;
0064         status = "okay";
0065 };
0066 
0067 &ecspi2 {
0068         pinctrl-names = "default";
0069         pinctrl-0 = <&pinctrl_ecspi2>;
0070         cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
0071         status = "okay";
0072 
0073         flash@0 {
0074                 compatible = "everspin,mr25h256";
0075                 reg = <0>;
0076                 spi-max-frequency = <15000000>;
0077         };
0078 };
0079 
0080 &ecspi1 {
0081         pinctrl-names = "default";
0082         pinctrl-0 = <&pinctrl_ecspi1>;
0083         cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
0084         status = "okay";
0085 
0086         tpm@0 {
0087                 compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
0088                 reg = <0>;
0089                 spi-max-frequency = <10000000>;
0090         };
0091 };
0092 
0093 &gpio2 {
0094         gpio-line-names = "buzzer", "", "", "", "", "", "", "",
0095                           "", "", "", "", "", "", "", "",
0096                           "", "", "", "", "", "", "", "",
0097                           "", "", "", "", "", "", "", "";
0098 };
0099 
0100 &gpio4 {
0101         gpio-line-names = "", "", "", "", "", "", "", "in2",
0102                           "prio2", "prio1", "aux", "", "", "", "", "",
0103                           "", "", "", "", "", "", "", "",
0104                           "", "", "", "", "", "", "", "";
0105 };
0106 
0107 &gpio6 {
0108         gpio-line-names = "", "", "", "", "", "", "", "",
0109                           "", "", "", "", "", "", "", "in1",
0110                           "", "", "", "", "", "", "", "",
0111                           "", "", "", "", "", "", "", "";
0112 };
0113 
0114 &i2c1 {
0115         pinctrl-names = "default";
0116         pinctrl-0 = <&pinctrl_i2c1>;
0117         status = "okay";
0118 
0119         temperature-sensor@49 {
0120                 compatible = "ad,ad7414";
0121                 reg = <0x49>;
0122         };
0123 
0124         rtc@51 {
0125                 compatible = "nxp,pcf2127";
0126                 reg = <0x51>;
0127         };
0128 };
0129 
0130 &iomuxc {
0131         pinctrl-names = "default";
0132         pinctrl-0 = <&pinctrl_hog>;
0133 
0134         pinctrl_hog: hog {
0135                 fsl,pins = <
0136                         MX6QDL_PAD_NANDF_D0__GPIO2_IO00         0x00000018 /* buzzer */
0137                         MX6QDL_PAD_KEY_COL1__GPIO4_IO08         0x00000018 /* OUT_1 */
0138                         MX6QDL_PAD_KEY_ROW1__GPIO4_IO09         0x00000018 /* OUT_2 */
0139                         MX6QDL_PAD_KEY_COL2__GPIO4_IO10         0x00000018 /* OUT_3 */
0140                         MX6QDL_PAD_NANDF_CS2__GPIO6_IO15        0x00000000 /* In1 */
0141                         MX6QDL_PAD_KEY_ROW0__GPIO4_IO07         0x00000000 /* In2 */
0142                         MX6QDL_PAD_GPIO_9__GPIO1_IO09           0x00000018 /* unused watchdog pin */
0143                         MX6QDL_PAD_SD1_DAT2__GPIO1_IO19         0x00000018 /* unused watchdog pin */
0144 
0145                 >;
0146         };
0147 
0148         pinctrl_ecspi1: ecspi1grp {
0149                 fsl,pins = <
0150                         MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK       0x000100a0
0151                         MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI       0x000100a0
0152                         MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO       0x000100a0
0153                         MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25        0x000100a0
0154                 >;
0155         };
0156 
0157         pinctrl_ecspi2: ecspi2grp {
0158                 fsl,pins = <
0159                         MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK     0x000100b1
0160                         MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI         0x000100b1
0161                         MX6QDL_PAD_EIM_OE__ECSPI2_MISO          0x000100b1
0162                         MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12      0x000100b1
0163                 >;
0164         };
0165 
0166         pinctrl_enet: enetgrp {
0167                 fsl,pins = <
0168                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
0169                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x0001b098
0170                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x0001b098
0171                         MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0     0x0001b098
0172                         MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1     0x0001b098
0173                         MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x0001b098
0174                         MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER       0x0001b0b0
0175                         MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0     0x0001b0b0
0176                         MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1     0x0001b0b0
0177                         MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN      0x0001b0b0
0178                         MX6QDL_PAD_SD1_CMD__GPIO1_IO18          0x00000018
0179                 >;
0180         };
0181 
0182         pinctrl_flexcan1: flexcan1grp {
0183                 fsl,pins = <
0184                         MX6QDL_PAD_GPIO_7__FLEXCAN1_TX          0x0001b020
0185                         MX6QDL_PAD_GPIO_8__FLEXCAN1_RX          0x0001b0b0
0186                 >;
0187         };
0188 
0189         pinctrl_flexcan2: flexcan2grp {
0190                 fsl,pins = <
0191                         MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX        0x0001b020
0192                         MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX        0x0001b0b0
0193                 >;
0194         };
0195 
0196         pinctrl_i2c1: i2c1grp {
0197                 fsl,pins = <
0198                         /* without SION i2c doesn't detect bus busy */
0199                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL          0x4001b820
0200                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA          0x4001b820
0201                 >;
0202         };
0203 
0204         pinctrl_pcie: pciegrp {
0205                 fsl,pins = <
0206                         MX6QDL_PAD_SD1_CLK__GPIO1_IO20          0x00000018
0207                 >;
0208         };
0209 
0210         pinctrl_reg_usb_h1_vbus: reg_usb_h1_vbusgrp {
0211                 fsl,pins = <
0212                         MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x0001b0b0
0213                 >;
0214         };
0215 
0216         pinctrl_siox: sioxgrp {
0217                 fsl,pins = <
0218                         MX6QDL_PAD_NANDF_CS0__GPIO6_IO11        0x0001b010      /* DIN */
0219                         MX6QDL_PAD_NANDF_ALE__GPIO6_IO08        0x0001b010      /* DOUT */
0220                         MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09       0x0001b010      /* DCLK */
0221                         MX6QDL_PAD_NANDF_RB0__GPIO6_IO10        0x0001b010      /* DLD */
0222                 >;
0223         };
0224 
0225         pinctrl_uart1_dte: uart1grp {
0226                 fsl,pins = <
0227                         MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA    0x0001b010
0228                         MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA    0x0001b010
0229                         MX6QDL_PAD_EIM_D19__UART1_RTS_B         0x0001b010
0230                         MX6QDL_PAD_EIM_D20__UART1_CTS_B         0x0001b010
0231                         MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x0001b010      /* DCD */
0232                         MX6QDL_PAD_EIM_D24__GPIO3_IO24          0x0001b010      /* DTR */
0233                         MX6QDL_PAD_EIM_D25__GPIO3_IO25          0x0001b010      /* DSR */
0234                 >;
0235         };
0236 
0237         pinctrl_uart2_dte: uart2grp {
0238                 fsl,pins = <
0239                         MX6QDL_PAD_EIM_D27__UART2_TX_DATA       0x0001b010
0240                         MX6QDL_PAD_EIM_D26__UART2_RX_DATA       0x0001b010
0241                         MX6QDL_PAD_EIM_D28__UART2_RTS_B         0x0001b010
0242                         MX6QDL_PAD_EIM_D29__UART2_CTS_B         0x0001b010
0243                         MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x0001b010      /* DCD */
0244                         MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x0001b010      /* DTR */
0245                         MX6QDL_PAD_NANDF_CS3__GPIO6_IO16        0x0001b010      /* DSR */
0246                 >;
0247         };
0248 
0249         pinctrl_uart3_dce: uart3grp {
0250                 fsl,pins = <
0251                         MX6QDL_PAD_SD4_CLK__UART3_RX_DATA       0x0001b010
0252                         MX6QDL_PAD_SD4_CMD__UART3_TX_DATA       0x0001b010
0253                 >;
0254         };
0255 
0256         pinctrl_uart4_dce: uart4grp {
0257                 fsl,pins = <
0258                         MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA    0x0001b010
0259                         MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA    0x0001b010
0260                         MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03       0x0001b010
0261                 >;
0262         };
0263 
0264         pinctrl_uart5_dce: uart5grp {
0265                 fsl,pins = <
0266                         MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA    0x0001b010
0267                         MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA    0x0001b010
0268                         MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05       0x0001b010      /* RTS */
0269                 >;
0270         };
0271 
0272         pinctrl_usbh1: usbh1grp {
0273                 fsl,pins = <
0274                         MX6QDL_PAD_EIM_D30__USB_H1_OC           0x0001b0b0
0275                 >;
0276         };
0277 
0278         pinctrl_usdhc3: usdhc3grp {
0279                 fsl,pins = <
0280                         MX6QDL_PAD_SD3_CMD__SD3_CMD             0x00017059
0281                         MX6QDL_PAD_SD3_CLK__SD3_CLK             0x00010059
0282                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x00017059
0283                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x00017059
0284                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x00017059
0285                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x00017059
0286                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x00017059
0287                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x00017059
0288                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x00017059
0289                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x00017059
0290                 >;
0291         };
0292 };
0293 
0294 &fec {
0295         pinctrl-names = "default";
0296         pinctrl-0 = <&pinctrl_enet>;
0297         phy-mode = "rmii";
0298         phy-reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
0299         phy-handle = <&phy>;
0300         clocks = <&clks IMX6QDL_CLK_ENET>,
0301                  <&clks IMX6QDL_CLK_ENET>,
0302                  <&rmii_clk>,
0303                  <&clks IMX6QDL_CLK_ENET_REF>;
0304         clock-names = "ipg", "ahb", "ptp", "enet_out";
0305         status = "okay";
0306 
0307         mdio {
0308                 #address-cells = <1>;
0309                 #size-cells = <0>;
0310 
0311                 phy: ethernet-phy@1 {
0312                         compatible = "ethernet-phy-ieee802.3-c22";
0313                         reg = <1>;
0314                 };
0315         };
0316 };
0317 
0318 &pcie {
0319         pinctrl-names = "default";
0320         pinctrl-0 = <&pinctrl_pcie>;
0321         reset-gpio = <&gpio1 20 GPIO_ACTIVE_LOW>;
0322         status = "okay";
0323 };
0324 
0325 &uart1 {
0326         pinctrl-names = "default";
0327         pinctrl-0 = <&pinctrl_uart1_dte>;
0328         uart-has-rtscts;
0329         fsl,dte-mode;
0330         dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
0331         dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
0332         dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
0333         status = "okay";
0334 };
0335 
0336 &uart2 {
0337         pinctrl-names = "default";
0338         pinctrl-0 = <&pinctrl_uart2_dte>;
0339         uart-has-rtscts;
0340         fsl,dte-mode;
0341         dcd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
0342         dtr-gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
0343         dsr-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>;
0344         status = "okay";
0345 };
0346 
0347 &uart3 {
0348         pinctrl-names = "default";
0349         pinctrl-0 = <&pinctrl_uart3_dce>;
0350         status = "okay";
0351 };
0352 
0353 &uart4 {
0354         pinctrl-names = "default";
0355         pinctrl-0 = <&pinctrl_uart4_dce>;
0356         rts-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;
0357         status = "okay";
0358 };
0359 
0360 &uart5 {
0361         pinctrl-names = "default";
0362         pinctrl-0 = <&pinctrl_uart5_dce>;
0363         rts-gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>;
0364         status = "okay";
0365 };
0366 
0367 &usbh1 {
0368         pinctrl-names = "default";
0369         pinctrl-0 = <&pinctrl_usbh1>;
0370         vbus-supply = <&reg_usb_h1_vbus>;
0371         status = "okay";
0372 };
0373 
0374 &usbotg {
0375         dr_mode = "peripheral";
0376         status = "okay";
0377 };
0378 
0379 &usdhc3 {
0380         pinctrl-names = "default";
0381         pinctrl-0 = <&pinctrl_usdhc3>;
0382         bus-width = <8>;
0383         non-removable;
0384         status = "okay";
0385 };