boot/dts/imx6dl-colibri-eval-v3.dts

0001 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
0002 /*
0003  * Copyright 2014-2022 Toradex
0004  * Copyright 2012 Freescale Semiconductor, Inc.
0005  * Copyright 2011 Linaro Ltd.
0006  */
0007
0008 /dts-v1/;
0009
0010 #include <dt-bindings/input/input.h>
0011 #include <dt-bindings/interrupt-controller/irq.h>
0012 #include "imx6dl.dtsi"
0013 #include "imx6qdl-colibri.dtsi"
0014
0015 / {
0016         model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3";
0017         compatible = "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl",
0018                      "fsl,imx6dl";
0019
0020         aliases {
0021                 i2c0 = &i2c2;
0022                 i2c1 = &i2c3;
0023         };
0024
0025         aliases {
0026                 rtc0 = &rtc_i2c;
0027                 rtc1 = &snvs_rtc;
0028         };
0029
0030         chosen {
0031                 stdout-path = "serial0:115200n8";
0032         };
0033
0034         /* Fixed crystal dedicated to mcp251x */
0035         clk16m: clock-16m {
0036                 compatible = "fixed-clock";
0037                 #clock-cells = <0>;
0038                 clock-frequency = <16000000>;
0039                 clock-output-names = "clk16m";
0040         };
0041 };
0042
0043 /* Colibri SSP */
0044 &ecspi4 {
0045         status = "okay";
0046
0047         mcp251x0: mcp251x@0 {
0048                 compatible = "microchip,mcp2515";
0049                 clocks = <&clk16m>;
0050                 interrupt-parent = <&gpio3>;
0051                 interrupts = <27 0x2>;
0052                 reg = <0>;
0053                 spi-max-frequency = <10000000>;
0054                 status = "okay";
0055         };
0056 };
0057
0058 /*
0059  * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
0060  */
0061 &i2c3 {
0062         status = "okay";
0063
0064         /* M41T0M6 real time clock on carrier board */
0065         rtc_i2c: rtc@68 {
0066                 compatible = "st,m41t0";
0067                 reg = <0x68>;
0068         };
0069 };
0070
0071 &iomuxc {
0072         pinctrl-names = "default";
0073         pinctrl-0 = <
0074                 &pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
0075                 &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
0076                 &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6
0077                 &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
0078         >;
0079 };
0080
0081 &pwm1 {
0082         status = "okay";
0083 };
0084
0085 &pwm2 {
0086         status = "okay";
0087 };
0088
0089 &pwm3 {
0090         status = "okay";
0091 };
0092
0093 &pwm4 {
0094         status = "okay";
0095 };
0096
0097 &reg_usb_host_vbus {
0098         status = "okay";
0099 };
0100
0101 &uart1 {
0102         status = "okay";
0103 };
0104
0105 &uart2 {
0106         status = "okay";
0107 };
0108
0109 &uart3 {
0110         status = "okay";
0111 };
0112
0113 &usbh1 {
0114         vbus-supply = <&reg_usb_host_vbus>;
0115         status = "okay";
0116 };
0117
0118 &usbotg {
0119         status = "okay";
0120 };
0121
0122 /* Colibri MMC */
0123 &usdhc1 {
0124         status = "okay";
0125 };
0126
0127 &weim {
0128         status = "okay";
0129
0130         /* weim memory map: 32MB on CS0, CS1, CS2 and CS3 */
0131         ranges = <0 0 0x08000000 0x02000000
0132                   1 0 0x0a000000 0x02000000
0133                   2 0 0x0c000000 0x02000000
0134                   3 0 0x0e000000 0x02000000>;
0135
0136         /* SRAM on Colibri nEXT_CS0 */
0137         sram@0,0 {
0138                 compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
0139                 reg = <0 0 0x00010000>;
0140                 #address-cells = <1>;
0141                 #size-cells = <1>;
0142                 bank-width = <2>;
0143                 fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
0144                                       0x00000000 0x04000040 0x00000000>;
0145         };
0146
0147         /* SRAM on Colibri nEXT_CS1 */
0148         sram@1,0 {
0149                 compatible = "cypress,cy7c1019dv33-10zsxi", "mtd-ram";
0150                 reg = <1 0 0x00010000>;
0151                 #address-cells = <1>;
0152                 #size-cells = <1>;
0153                 bank-width = <2>;
0154                 fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
0155                                       0x00000000 0x04000040 0x00000000>;
0156         };
0157 };