0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
0004 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
0005 */
0006
0007 #include "imx53.dtsi"
0008
0009 / {
0010 model = "TQ TQMa53";
0011 compatible = "tq,tqma53", "fsl,imx53";
0012
0013 memory@70000000 {
0014 device_type = "memory";
0015 reg = <0x70000000 0x40000000>; /* Up to 1GiB */
0016 };
0017
0018 regulators {
0019 compatible = "simple-bus";
0020 #address-cells = <1>;
0021 #size-cells = <0>;
0022
0023 reg_3p3v: regulator@0 {
0024 compatible = "regulator-fixed";
0025 reg = <0>;
0026 regulator-name = "3P3V";
0027 regulator-min-microvolt = <3300000>;
0028 regulator-max-microvolt = <3300000>;
0029 regulator-always-on;
0030 };
0031 };
0032 };
0033
0034 &esdhc2 {
0035 pinctrl-names = "default";
0036 pinctrl-0 = <&pinctrl_esdhc2>,
0037 <&pinctrl_esdhc2_cdwp>;
0038 vmmc-supply = <®_3p3v>;
0039 wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
0040 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
0041 status = "disabled";
0042 };
0043
0044 &uart3 {
0045 pinctrl-names = "default";
0046 pinctrl-0 = <&pinctrl_uart3>;
0047 status = "disabled";
0048 };
0049
0050 &ecspi1 {
0051 pinctrl-names = "default";
0052 pinctrl-0 = <&pinctrl_ecspi1>;
0053 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>,
0054 <&gpio3 24 GPIO_ACTIVE_LOW>, <&gpio3 25 GPIO_ACTIVE_LOW>;
0055 status = "disabled";
0056 };
0057
0058 &esdhc3 { /* EMMC */
0059 pinctrl-names = "default";
0060 pinctrl-0 = <&pinctrl_esdhc3>;
0061 vmmc-supply = <®_3p3v>;
0062 non-removable;
0063 bus-width = <8>;
0064 status = "okay";
0065 };
0066
0067 &iomuxc {
0068 pinctrl-names = "default";
0069 pinctrl-0 = <&pinctrl_hog>;
0070
0071 imx53-tqma53 {
0072 pinctrl_hog: hoggrp {
0073 fsl,pins = <
0074 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
0075 MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 /* LCD_BLT_EN */
0076 MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 /* LCD_RESET */
0077 MX53_PAD_PATA_DATA5__GPIO2_5 0x80000000 /* LCD_POWER */
0078 MX53_PAD_PATA_DATA6__GPIO2_6 0x80000000 /* PMIC_INT */
0079 MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 /* CSI_RST */
0080 MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 /* CSI_PWDN */
0081 MX53_PAD_GPIO_19__GPIO4_5 0x80000000 /* #SYSTEM_DOWN */
0082 MX53_PAD_GPIO_3__GPIO1_3 0x80000000
0083 MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 /* #PHY_RESET */
0084 MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000 /* LCD_CONTRAST */
0085 >;
0086 };
0087
0088 pinctrl_audmux: audmuxgrp {
0089 fsl,pins = <
0090 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
0091 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
0092 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
0093 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
0094 >;
0095 };
0096
0097 pinctrl_can1: can1grp {
0098 fsl,pins = <
0099 MX53_PAD_KEY_COL2__CAN1_TXCAN 0x80000000
0100 MX53_PAD_KEY_ROW2__CAN1_RXCAN 0x80000000
0101 >;
0102 };
0103
0104 pinctrl_can2: can2grp {
0105 fsl,pins = <
0106 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
0107 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
0108 >;
0109 };
0110
0111 pinctrl_cspi: cspigrp {
0112 fsl,pins = <
0113 MX53_PAD_SD1_DATA0__CSPI_MISO 0x1d5
0114 MX53_PAD_SD1_CMD__CSPI_MOSI 0x1d5
0115 MX53_PAD_SD1_CLK__CSPI_SCLK 0x1d5
0116 >;
0117 };
0118
0119 pinctrl_ecspi1: ecspi1grp {
0120 fsl,pins = <
0121 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
0122 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
0123 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
0124 >;
0125 };
0126
0127 pinctrl_esdhc2: esdhc2grp {
0128 fsl,pins = <
0129 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
0130 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
0131 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
0132 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
0133 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
0134 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
0135 >;
0136 };
0137
0138 pinctrl_esdhc2_cdwp: esdhc2cdwp {
0139 fsl,pins = <
0140 MX53_PAD_GPIO_4__GPIO1_4 0x80000000 /* SD2_CD */
0141 MX53_PAD_GPIO_2__GPIO1_2 0x80000000 /* SD2_WP */
0142 >;
0143 };
0144
0145 pinctrl_esdhc3: esdhc3grp {
0146 fsl,pins = <
0147 MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
0148 MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
0149 MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
0150 MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
0151 MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
0152 MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
0153 MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
0154 MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
0155 MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
0156 MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
0157 >;
0158 };
0159
0160 pinctrl_fec: fecgrp {
0161 fsl,pins = <
0162 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
0163 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
0164 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
0165 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
0166 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
0167 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
0168 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
0169 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
0170 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
0171 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
0172 >;
0173 };
0174
0175 pinctrl_i2c2: i2c2grp {
0176 fsl,pins = <
0177 MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
0178 MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
0179 >;
0180 };
0181
0182 pinctrl_i2c3: i2c3grp {
0183 fsl,pins = <
0184 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
0185 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
0186 >;
0187 };
0188
0189 pinctrl_uart1: uart1grp {
0190 fsl,pins = <
0191 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
0192 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
0193 >;
0194 };
0195
0196 pinctrl_uart2: uart2grp {
0197 fsl,pins = <
0198 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
0199 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
0200 >;
0201 };
0202
0203 pinctrl_uart3: uart3grp {
0204 fsl,pins = <
0205 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
0206 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
0207 >;
0208 };
0209 };
0210 };
0211
0212 &pwm1 {
0213 #pwm-cells = <2>;
0214 };
0215
0216 &pwm2 {
0217 #pwm-cells = <2>;
0218 };
0219
0220 &uart1 {
0221 pinctrl-names = "default";
0222 pinctrl-0 = <&pinctrl_uart1>;
0223 uart-has-rtscts;
0224 status = "disabled";
0225 };
0226
0227 &uart2 {
0228 pinctrl-names = "default";
0229 pinctrl-0 = <&pinctrl_uart2>;
0230 status = "disabled";
0231 };
0232
0233 &can1 {
0234 pinctrl-names = "default";
0235 pinctrl-0 = <&pinctrl_can1>;
0236 status = "disabled";
0237 };
0238
0239 &can2 {
0240 pinctrl-names = "default";
0241 pinctrl-0 = <&pinctrl_can2>;
0242 status = "disabled";
0243 };
0244
0245 &i2c3 {
0246 pinctrl-names = "default";
0247 pinctrl-0 = <&pinctrl_i2c3>;
0248 status = "disabled";
0249 };
0250
0251 &cspi {
0252 pinctrl-names = "default";
0253 pinctrl-0 = <&pinctrl_cspi>;
0254 cs-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>, <&gpio1 19 GPIO_ACTIVE_LOW>,
0255 <&gpio1 21 GPIO_ACTIVE_LOW>;
0256 status = "disabled";
0257 };
0258
0259 &i2c2 {
0260 pinctrl-names = "default";
0261 pinctrl-0 = <&pinctrl_i2c2>;
0262 status = "okay";
0263
0264 pmic: mc34708@8 {
0265 compatible = "fsl,mc34708";
0266 reg = <0x8>;
0267 fsl,mc13xxx-uses-rtc;
0268 interrupt-parent = <&gpio2>;
0269 interrupts = <6 4>; /* PATA_DATA6, active high */
0270 };
0271
0272 sensor1: lm75@48 {
0273 compatible = "lm75";
0274 reg = <0x48>;
0275 };
0276
0277 eeprom: 24c64@50 {
0278 compatible = "atmel,24c64";
0279 pagesize = <32>;
0280 reg = <0x50>;
0281 };
0282 };
0283
0284 &fec {
0285 pinctrl-names = "default";
0286 pinctrl-0 = <&pinctrl_fec>;
0287 phy-mode = "rmii";
0288 status = "disabled";
0289 };
