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0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // Copyright 2011 Freescale Semiconductor, Inc.
0004 // Copyright 2011 Linaro Ltd.
0005 
0006 /dts-v1/;
0007 #include <dt-bindings/input/input.h>
0008 #include "imx53.dtsi"
0009 
0010 / {
0011         model = "Freescale i.MX53 Smart Mobile Reference Design Board";
0012         compatible = "fsl,imx53-smd", "fsl,imx53";
0013 
0014         memory@70000000 {
0015                 device_type = "memory";
0016                 reg = <0x70000000 0x40000000>;
0017         };
0018 
0019         gpio-keys {
0020                 compatible = "gpio-keys";
0021 
0022                 volume-up {
0023                         label = "Volume Up";
0024                         gpios = <&gpio2 14 0>;
0025                         linux,code = <KEY_VOLUMEUP>;
0026                 };
0027 
0028                 volume-down {
0029                         label = "Volume Down";
0030                         gpios = <&gpio2 15 0>;
0031                         linux,code = <KEY_VOLUMEDOWN>;
0032                 };
0033         };
0034 };
0035 
0036 &esdhc1 {
0037         pinctrl-names = "default";
0038         pinctrl-0 = <&pinctrl_esdhc1>;
0039         cd-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
0040         wp-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
0041         status = "okay";
0042 };
0043 
0044 &esdhc2 {
0045         pinctrl-names = "default";
0046         pinctrl-0 = <&pinctrl_esdhc2>;
0047         non-removable;
0048         status = "okay";
0049 };
0050 
0051 &uart3 {
0052         pinctrl-names = "default";
0053         pinctrl-0 = <&pinctrl_uart3>;
0054         uart-has-rtscts;
0055         status = "okay";
0056 };
0057 
0058 &ecspi1 {
0059         pinctrl-names = "default";
0060         pinctrl-0 = <&pinctrl_ecspi1>;
0061         cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>;
0062         status = "okay";
0063 
0064         zigbee: mc1323@0 {
0065                 compatible = "fsl,mc1323";
0066                 spi-max-frequency = <8000000>;
0067                 reg = <0>;
0068         };
0069 
0070         flash: m25p32@1 {
0071                 #address-cells = <1>;
0072                 #size-cells = <1>;
0073                 compatible = "st,m25p32", "st,m25p", "jedec,spi-nor";
0074                 spi-max-frequency = <20000000>;
0075                 reg = <1>;
0076 
0077                 partition@0 {
0078                         label = "U-Boot";
0079                         reg = <0x0 0x40000>;
0080                         read-only;
0081                 };
0082 
0083                 partition@40000 {
0084                         label = "Kernel";
0085                         reg = <0x40000 0x3c0000>;
0086                 };
0087         };
0088 };
0089 
0090 &esdhc3 {
0091         pinctrl-names = "default";
0092         pinctrl-0 = <&pinctrl_esdhc3>;
0093         non-removable;
0094         status = "okay";
0095 };
0096 
0097 &iomuxc {
0098         pinctrl-names = "default";
0099         pinctrl-0 = <&pinctrl_hog>;
0100 
0101         imx53-smd {
0102                 pinctrl_hog: hoggrp {
0103                         fsl,pins = <
0104                                 MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
0105                                 MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
0106                                 MX53_PAD_EIM_EB2__GPIO2_30     0x80000000
0107                                 MX53_PAD_EIM_DA13__GPIO3_13    0x80000000
0108                                 MX53_PAD_EIM_D19__GPIO3_19     0x80000000
0109                                 MX53_PAD_KEY_ROW2__GPIO4_11    0x80000000
0110                                 MX53_PAD_PATA_DA_0__GPIO7_6    0x80000000
0111                         >;
0112                 };
0113 
0114                 pinctrl_ecspi1: ecspi1grp {
0115                         fsl,pins = <
0116                                 MX53_PAD_EIM_D16__ECSPI1_SCLK           0x80000000
0117                                 MX53_PAD_EIM_D17__ECSPI1_MISO           0x80000000
0118                                 MX53_PAD_EIM_D18__ECSPI1_MOSI           0x80000000
0119                         >;
0120                 };
0121 
0122                 pinctrl_esdhc1: esdhc1grp {
0123                         fsl,pins = <
0124                                 MX53_PAD_SD1_DATA0__ESDHC1_DAT0         0x1d5
0125                                 MX53_PAD_SD1_DATA1__ESDHC1_DAT1         0x1d5
0126                                 MX53_PAD_SD1_DATA2__ESDHC1_DAT2         0x1d5
0127                                 MX53_PAD_SD1_DATA3__ESDHC1_DAT3         0x1d5
0128                                 MX53_PAD_SD1_CMD__ESDHC1_CMD            0x1d5
0129                                 MX53_PAD_SD1_CLK__ESDHC1_CLK            0x1d5
0130                         >;
0131                 };
0132 
0133                 pinctrl_esdhc2: esdhc2grp {
0134                         fsl,pins = <
0135                                 MX53_PAD_SD2_CMD__ESDHC2_CMD            0x1d5
0136                                 MX53_PAD_SD2_CLK__ESDHC2_CLK            0x1d5
0137                                 MX53_PAD_SD2_DATA0__ESDHC2_DAT0         0x1d5
0138                                 MX53_PAD_SD2_DATA1__ESDHC2_DAT1         0x1d5
0139                                 MX53_PAD_SD2_DATA2__ESDHC2_DAT2         0x1d5
0140                                 MX53_PAD_SD2_DATA3__ESDHC2_DAT3         0x1d5
0141                         >;
0142                 };
0143 
0144                 pinctrl_esdhc3: esdhc3grp {
0145                         fsl,pins = <
0146                                 MX53_PAD_PATA_DATA8__ESDHC3_DAT0        0x1d5
0147                                 MX53_PAD_PATA_DATA9__ESDHC3_DAT1        0x1d5
0148                                 MX53_PAD_PATA_DATA10__ESDHC3_DAT2       0x1d5
0149                                 MX53_PAD_PATA_DATA11__ESDHC3_DAT3       0x1d5
0150                                 MX53_PAD_PATA_DATA0__ESDHC3_DAT4        0x1d5
0151                                 MX53_PAD_PATA_DATA1__ESDHC3_DAT5        0x1d5
0152                                 MX53_PAD_PATA_DATA2__ESDHC3_DAT6        0x1d5
0153                                 MX53_PAD_PATA_DATA3__ESDHC3_DAT7        0x1d5
0154                                 MX53_PAD_PATA_RESET_B__ESDHC3_CMD       0x1d5
0155                                 MX53_PAD_PATA_IORDY__ESDHC3_CLK         0x1d5
0156                         >;
0157                 };
0158 
0159                 pinctrl_fec: fecgrp {
0160                         fsl,pins = <
0161                                 MX53_PAD_FEC_MDC__FEC_MDC               0x80000000
0162                                 MX53_PAD_FEC_MDIO__FEC_MDIO             0x80000000
0163                                 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK        0x80000000
0164                                 MX53_PAD_FEC_RX_ER__FEC_RX_ER           0x80000000
0165                                 MX53_PAD_FEC_CRS_DV__FEC_RX_DV          0x80000000
0166                                 MX53_PAD_FEC_RXD1__FEC_RDATA_1          0x80000000
0167                                 MX53_PAD_FEC_RXD0__FEC_RDATA_0          0x80000000
0168                                 MX53_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
0169                                 MX53_PAD_FEC_TXD1__FEC_TDATA_1          0x80000000
0170                                 MX53_PAD_FEC_TXD0__FEC_TDATA_0          0x80000000
0171                         >;
0172                 };
0173 
0174                 pinctrl_i2c1: i2c1grp {
0175                         fsl,pins = <
0176                                 MX53_PAD_CSI0_DAT8__I2C1_SDA            0xc0000000
0177                                 MX53_PAD_CSI0_DAT9__I2C1_SCL            0xc0000000
0178                         >;
0179                 };
0180 
0181                 pinctrl_i2c2: i2c2grp {
0182                         fsl,pins = <
0183                                 MX53_PAD_KEY_ROW3__I2C2_SDA             0xc0000000
0184                                 MX53_PAD_KEY_COL3__I2C2_SCL             0xc0000000
0185                         >;
0186                 };
0187 
0188                 pinctrl_ipu_csi0: ipucsi0grp {
0189                         fsl,pins = <
0190                                 MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12    0x1c4
0191                                 MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13    0x1c4
0192                                 MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14    0x1c4
0193                                 MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15    0x1c4
0194                                 MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16    0x1c4
0195                                 MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17    0x1c4
0196                                 MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18    0x1c4
0197                                 MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19    0x1c4
0198                                 MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1e4
0199                                 MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC   0x1e4
0200                                 MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC    0x1e4
0201                                 MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1e4
0202                         >;
0203                 };
0204 
0205                 pinctrl_ov5642: ov5642grp {
0206                         fsl,pins = <
0207                                 MX53_PAD_NANDF_WP_B__GPIO6_9   0x1e4
0208                                 MX53_PAD_NANDF_RB0__GPIO6_10   0x1e4
0209                                 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4
0210                         >;
0211                 };
0212 
0213                 pinctrl_uart1: uart1grp {
0214                         fsl,pins = <
0215                                 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX      0x1e4
0216                                 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX      0x1e4
0217                         >;
0218                 };
0219 
0220                 pinctrl_uart2: uart2grp {
0221                         fsl,pins = <
0222                                 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX  0x1e4
0223                                 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX      0x1e4
0224                         >;
0225                 };
0226 
0227                 pinctrl_uart3: uart3grp {
0228                         fsl,pins = <
0229                                 MX53_PAD_PATA_CS_0__UART3_TXD_MUX       0x1e4
0230                                 MX53_PAD_PATA_CS_1__UART3_RXD_MUX       0x1e4
0231                                 MX53_PAD_PATA_DA_1__UART3_CTS           0x1e4
0232                                 MX53_PAD_PATA_DA_2__UART3_RTS           0x1e4
0233                         >;
0234                 };
0235         };
0236 };
0237 
0238 &uart1 {
0239         pinctrl-names = "default";
0240         pinctrl-0 = <&pinctrl_uart1>;
0241         status = "okay";
0242 };
0243 
0244 &uart2 {
0245         pinctrl-names = "default";
0246         pinctrl-0 = <&pinctrl_uart2>;
0247         status = "okay";
0248 };
0249 
0250 &i2c2 {
0251         pinctrl-names = "default";
0252         pinctrl-0 = <&pinctrl_i2c2>;
0253         status = "okay";
0254 
0255         codec: sgtl5000@a {
0256                 compatible = "fsl,sgtl5000";
0257                 reg = <0x0a>;
0258         };
0259 
0260         magnetometer: mag3110@e {
0261                 compatible = "fsl,mag3110";
0262                 reg = <0x0e>;
0263         };
0264 
0265         touchkey: mpr121@5a {
0266                 compatible = "fsl,mpr121";
0267                 reg = <0x5a>;
0268         };
0269 };
0270 
0271 &i2c1 {
0272         pinctrl-names = "default";
0273         pinctrl-0 = <&pinctrl_i2c1>;
0274         status = "okay";
0275 
0276         accelerometer: mma8450@1c {
0277                 compatible = "fsl,mma8450";
0278                 reg = <0x1c>;
0279         };
0280 
0281         camera: ov5642@3c {
0282                 compatible = "ovti,ov5642";
0283                 reg = <0x3c>;
0284                 pinctrl-names = "default";
0285                 pinctrl-0 = <&pinctrl_ov5642>;
0286                 assigned-clocks = <&clks IMX5_CLK_SSI_EXT1_SEL>,
0287                                   <&clks IMX5_CLK_SSI_EXT1_COM_SEL>;
0288                 assigned-clock-parents = <&clks IMX5_CLK_PLL2_SW>,
0289                                          <&clks IMX5_CLK_SSI_EXT1_PODF>;
0290                 assigned-clock-rates = <0>, <24000000>;
0291                 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
0292                 clock-names = "xclk";
0293                 DVDD-supply = <&ldo9_reg>;
0294                 AVDD-supply = <&ldo7_reg>;
0295                 reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>;
0296                 powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;
0297 
0298                 port {
0299                         ov5642_to_ipu_csi0: endpoint {
0300                                 remote-endpoint = <&ipu_csi0_from_parallel_sensor>;
0301                                 bus-width = <8>;
0302                                 hsync-active = <1>;
0303                                 vsync-active = <1>;
0304                         };
0305                 };
0306         };
0307 
0308         pmic: dialog@48 {
0309                 compatible = "dlg,da9053", "dlg,da9052";
0310                 reg = <0x48>;
0311                 interrupt-parent = <&gpio7>;
0312                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
0313 
0314                 regulators {
0315                         ldo7_reg: ldo7 {
0316                                 regulator-min-microvolt = <1200000>;
0317                                 regulator-max-microvolt = <3600000>;
0318                         };
0319 
0320                         ldo9_reg: ldo9 {
0321                                 regulator-min-microvolt = <1250000>;
0322                                 regulator-max-microvolt = <3650000>;
0323                         };
0324                 };
0325         };
0326 };
0327 
0328 &fec {
0329         pinctrl-names = "default";
0330         pinctrl-0 = <&pinctrl_fec>;
0331         phy-mode = "rmii";
0332         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
0333         status = "okay";
0334 };
0335 
0336 &ipu_csi0_from_parallel_sensor {
0337         remote-endpoint = <&ov5642_to_ipu_csi0>;
0338         data-shift = <12>; /* Lines 19:12 used */
0339         hsync-active = <1>;
0340         vsync-active = <1>;
0341 };
0342 
0343 &ipu_csi0 {
0344         pinctrl-names = "default";
0345         pinctrl-0 = <&pinctrl_ipu_csi0>;
0346 };