Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
0004  * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
0005  */
0006 
0007 /dts-v1/;
0008 #include "imx53-tqma53.dtsi"
0009 
0010 / {
0011         model = "TQ MBa53 starter kit";
0012         compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
0013 
0014         chosen {
0015                 stdout-path = &uart2;
0016         };
0017 
0018         backlight {
0019                 compatible = "pwm-backlight";
0020                 pwms = <&pwm2 0 50000>;
0021                 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
0022                 default-brightness-level = <10>;
0023                 enable-gpios = <&gpio7 7 0>;
0024                 power-supply = <&reg_backlight>;
0025         };
0026 
0027         disp1: disp1 {
0028                 compatible = "fsl,imx-parallel-display";
0029                 pinctrl-names = "default";
0030                 pinctrl-0 = <&pinctrl_disp1_1>;
0031                 interface-pix-fmt = "rgb24";
0032                 status = "disabled";
0033 
0034                 port {
0035                         display1_in: endpoint {
0036                                 remote-endpoint = <&ipu_di1_disp1>;
0037                         };
0038                 };
0039         };
0040 
0041         regulators {
0042                 compatible = "simple-bus";
0043                 #address-cells = <1>;
0044                 #size-cells = <0>;
0045 
0046                 reg_backlight: regulator@0 {
0047                         compatible = "regulator-fixed";
0048                         reg = <0>;
0049                         regulator-name = "lcd-supply";
0050                         gpio = <&gpio2 5 0>;
0051                         startup-delay-us = <5000>;
0052                 };
0053 
0054                 reg_3p2v: regulator@1 {
0055                         compatible = "regulator-fixed";
0056                         reg = <1>;
0057                         regulator-name = "3P2V";
0058                         regulator-min-microvolt = <3200000>;
0059                         regulator-max-microvolt = <3200000>;
0060                         regulator-always-on;
0061                 };
0062         };
0063 
0064         sound {
0065                 compatible = "tq,imx53-mba53-sgtl5000",
0066                              "fsl,imx-audio-sgtl5000";
0067                 model = "imx53-mba53-sgtl5000";
0068                 ssi-controller = <&ssi2>;
0069                 audio-codec = <&codec>;
0070                 audio-routing =
0071                         "MIC_IN", "Mic Jack",
0072                         "Mic Jack", "Mic Bias",
0073                         "Headphone Jack", "HP_OUT";
0074                 mux-int-port = <2>;
0075                 mux-ext-port = <5>;
0076         };
0077 };
0078 
0079 &ldb {
0080         pinctrl-names = "default";
0081         pinctrl-0 = <&pinctrl_lvds1_1>;
0082         status = "disabled";
0083 };
0084 
0085 &iomuxc {
0086         lvds1 {
0087                 pinctrl_lvds1_1: lvds1-grp1 {
0088                         fsl,pins = <
0089                                 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
0090                                 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
0091                                 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
0092                                 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
0093                                 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
0094                         >;
0095                 };
0096 
0097                 pinctrl_lvds1_2: lvds1-grp2 {
0098                         fsl,pins = <
0099                                 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000
0100                                 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000
0101                                 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000
0102                                 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000
0103                                 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000
0104                         >;
0105                 };
0106         };
0107 
0108         disp1 {
0109                 pinctrl_disp1_1: disp1-grp1 {
0110                         fsl,pins = <
0111                                 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */
0112                                 MX53_PAD_EIM_DA10__IPU_DI1_PIN15   0x80000000 /* DISP1_DRDY */
0113                                 MX53_PAD_EIM_D23__IPU_DI1_PIN2     0x80000000 /* DISP1_HSYNC */
0114                                 MX53_PAD_EIM_EB3__IPU_DI1_PIN3     0x80000000 /* DISP1_VSYNC */
0115                                 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000
0116                                 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000
0117                                 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000
0118                                 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000
0119                                 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000
0120                                 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000
0121                                 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000
0122                                 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000
0123                                 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000
0124                                 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000
0125                                 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000
0126                                 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000
0127                                 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000
0128                                 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000
0129                                 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9  0x80000000
0130                                 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8  0x80000000
0131                                 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7  0x80000000
0132                                 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6  0x80000000
0133                                 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5  0x80000000
0134                                 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4  0x80000000
0135                                 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3  0x80000000
0136                                 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2  0x80000000
0137                                 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1  0x80000000
0138                                 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0  0x80000000
0139                         >;
0140                 };
0141         };
0142 
0143         tve {
0144                 pinctrl_vga_sync_1: vgasync-grp1 {
0145                         fsl,pins = <
0146                                 /* VGA_VSYNC, HSYNC with max drive strength */
0147                                 MX53_PAD_EIM_CS1__IPU_DI1_PIN6     0xe6
0148                                 MX53_PAD_EIM_DA15__IPU_DI1_PIN4    0xe6
0149                         >;
0150                 };
0151         };
0152 };
0153 
0154 &ipu_di1_disp1 {
0155         remote-endpoint = <&display1_in>;
0156 };
0157 
0158 &cspi {
0159         status = "okay";
0160 };
0161 
0162 &audmux {
0163         status = "okay";
0164         pinctrl-names = "default";
0165         pinctrl-0 = <&pinctrl_audmux>;
0166 };
0167 
0168 &i2c2 {
0169         codec: sgtl5000@a {
0170                 compatible = "fsl,sgtl5000";
0171                 reg = <0x0a>;
0172                 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
0173                 VDDA-supply = <&reg_3p2v>;
0174                 VDDIO-supply = <&reg_3p2v>;
0175         };
0176 
0177         expander: pca9554@20 {
0178                 compatible = "pca9554";
0179                 reg = <0x20>;
0180                 interrupts = <109>;
0181                 #gpio-cells = <2>;
0182                 gpio-controller;
0183         };
0184 
0185         sensor2: lm75@49 {
0186                 compatible = "lm75";
0187                 reg = <0x49>;
0188         };
0189 };
0190 
0191 &fec {
0192         phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
0193         status = "okay";
0194 };
0195 
0196 &esdhc2 {
0197         status = "okay";
0198 };
0199 
0200 &uart3 {
0201         status = "okay";
0202 };
0203 
0204 &ecspi1 {
0205         status = "okay";
0206 };
0207 
0208 &usbotg {
0209         dr_mode = "host";
0210         status = "okay";
0211 };
0212 
0213 &usbh1 {
0214         status = "okay";
0215 };
0216 
0217 &uart1 {
0218         status = "okay";
0219 };
0220 
0221 &ssi2 {
0222         status = "okay";
0223 };
0224 
0225 &uart2 {
0226         status = "okay";
0227 };
0228 
0229 &can1 {
0230         status = "okay";
0231 };
0232 
0233 &can2 {
0234         status = "okay";
0235 };
0236 
0237 &i2c3 {
0238         status = "okay";
0239 };
0240 
0241 &tve {
0242         pinctrl-names = "default";
0243         pinctrl-0 = <&pinctrl_vga_sync_1>;
0244         ddc-i2c-bus = <&i2c3>;
0245         fsl,tve-mode = "vga";
0246         fsl,hsync-pin = <4>;
0247         fsl,vsync-pin = <6>;
0248         status = "okay";
0249 };