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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
0004  */
0005 
0006 /dts-v1/;
0007 #include "imx51-eukrea-cpuimx51.dtsi"
0008 #include <dt-bindings/gpio/gpio.h>
0009 
0010 / {
0011         model = "Eukrea CPUIMX51";
0012         compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
0013 
0014         clocks {
0015                 clk24M: can_clock {
0016                         compatible = "fixed-clock";
0017                         #clock-cells = <0>;
0018                         clock-frequency = <24000000>;
0019                 };
0020         };
0021 
0022         gpio_keys {
0023                 compatible = "gpio-keys";
0024                 pinctrl-names = "default";
0025                 pinctrl-0 = <&pinctrl_gpiokeys_1>;
0026 
0027                 button-1 {
0028                         label = "BP1";
0029                         gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
0030                         linux,code = <256>;
0031                         wakeup-source;
0032                         linux,input-type = <1>;
0033                 };
0034         };
0035 
0036         leds {
0037                 compatible = "gpio-leds";
0038                 pinctrl-names = "default";
0039                 pinctrl-0 = <&pinctrl_gpioled>;
0040 
0041                 led1 {
0042                         label = "led1";
0043                         gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
0044                         linux,default-trigger = "heartbeat";
0045                 };
0046         };
0047 
0048         regulators {
0049                 compatible = "simple-bus";
0050                 #address-cells = <1>;
0051                 #size-cells = <0>;
0052 
0053                 reg_can: regulator@0 {
0054                         compatible = "regulator-fixed";
0055                         reg = <0>;
0056                         regulator-name = "CAN_RST";
0057                         regulator-min-microvolt = <3300000>;
0058                         regulator-max-microvolt = <3300000>;
0059                         gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
0060                         startup-delay-us = <20000>;
0061                         enable-active-high;
0062                 };
0063         };
0064 
0065         sound {
0066                 compatible = "eukrea,asoc-tlv320";
0067                 eukrea,model = "imx51-eukrea-tlv320aic23";
0068                 ssi-controller = <&ssi2>;
0069                 fsl,mux-int-port = <2>;
0070                 fsl,mux-ext-port = <3>;
0071         };
0072 
0073         usbphy1: usbphy1 {
0074                 compatible = "usb-nop-xceiv";
0075                 clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
0076                 clock-names = "main_clk";
0077                 clock-frequency = <19200000>;
0078                 #phy-cells = <0>;
0079         };
0080 };
0081 
0082 &audmux {
0083         pinctrl-names = "default";
0084         pinctrl-0 = <&pinctrl_audmux>;
0085         status = "okay";
0086 };
0087 
0088 &esdhc1 {
0089         pinctrl-names = "default";
0090         pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
0091         cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
0092         status = "okay";
0093 };
0094 
0095 &ecspi1 {
0096         pinctrl-names = "default";
0097         pinctrl-0 = <&pinctrl_ecspi1>;
0098         cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
0099         status = "okay";
0100 
0101         can0: can@0 {
0102                 pinctrl-names = "default";
0103                 pinctrl-0 = <&pinctrl_can>;
0104                 compatible = "microchip,mcp2515";
0105                 reg = <0>;
0106                 clocks = <&clk24M>;
0107                 spi-max-frequency = <10000000>;
0108                 interrupt-parent = <&gpio1>;
0109                 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
0110                 vdd-supply = <&reg_can>;
0111         };
0112 };
0113 
0114 &i2c1 {
0115         tlv320aic23: codec@1a {
0116                 compatible = "ti,tlv320aic23";
0117                 reg = <0x1a>;
0118         };
0119 };
0120 
0121 &iomuxc {
0122         imx51-eukrea {
0123                 pinctrl_audmux: audmuxgrp {
0124                         fsl,pins = <
0125                                 MX51_PAD_AUD3_BB_TXD__AUD3_TXD          0x80000000
0126                                 MX51_PAD_AUD3_BB_RXD__AUD3_RXD          0x80000000
0127                                 MX51_PAD_AUD3_BB_CK__AUD3_TXC           0x80000000
0128                                 MX51_PAD_AUD3_BB_FS__AUD3_TXFS          0x80000000
0129                         >;
0130                 };
0131 
0132 
0133                 pinctrl_can: cangrp {
0134                         fsl,pins = <
0135                                 MX51_PAD_CSI2_PIXCLK__GPIO4_15          0x80000000      /* nReset */
0136                                 MX51_PAD_GPIO1_1__GPIO1_1               0x80000000      /* IRQ */
0137                         >;
0138                 };
0139 
0140                 pinctrl_ecspi1: ecspi1grp {
0141                         fsl,pins = <
0142                                 MX51_PAD_CSPI1_MISO__ECSPI1_MISO        0x185
0143                                 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI        0x185
0144                                 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK        0x185
0145                                 MX51_PAD_CSPI1_SS0__GPIO4_24            0x80000000      /* CS0 */
0146                         >;
0147                 };
0148 
0149                 pinctrl_esdhc1: esdhc1grp {
0150                         fsl,pins = <
0151                                 MX51_PAD_SD1_CMD__SD1_CMD               0x400020d5
0152                                 MX51_PAD_SD1_CLK__SD1_CLK               0x20d5
0153                                 MX51_PAD_SD1_DATA0__SD1_DATA0           0x20d5
0154                                 MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
0155                                 MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
0156                                 MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
0157                         >;
0158                 };
0159 
0160                 pinctrl_uart1: uart1grp {
0161                         fsl,pins = <
0162                                 MX51_PAD_UART1_RXD__UART1_RXD           0x1c5
0163                                 MX51_PAD_UART1_TXD__UART1_TXD           0x1c5
0164                         >;
0165                 };
0166 
0167                 pinctrl_uart3: uart3grp {
0168                         fsl,pins = <
0169                                 MX51_PAD_UART3_RXD__UART3_RXD           0x1c5
0170                                 MX51_PAD_UART3_TXD__UART3_TXD           0x1c5
0171                         >;
0172                 };
0173 
0174                 pinctrl_uart3_rtscts: uart3rtsctsgrp {
0175                         fsl,pins = <
0176                                 MX51_PAD_KEY_COL4__UART3_RTS            0x1c5
0177                                 MX51_PAD_KEY_COL5__UART3_CTS            0x1c5
0178                         >;
0179                 };
0180 
0181                 pinctrl_backlight_1: backlightgrp-1 {
0182                         fsl,pins = <
0183                                 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
0184                         >;
0185                 };
0186 
0187                 pinctrl_esdhc1_cd: esdhc1_cd {
0188                         fsl,pins = <
0189                                 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
0190                         >;
0191                 };
0192 
0193                 pinctrl_gpiokeys_1: gpiokeysgrp-1 {
0194                         fsl,pins = <
0195                                 MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
0196                         >;
0197                 };
0198 
0199                 pinctrl_gpioled: gpioledgrp-1 {
0200                         fsl,pins = <
0201                                 MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
0202                         >;
0203                 };
0204 
0205                 pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
0206                         fsl,pins = <
0207                                 MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
0208                         >;
0209                 };
0210 
0211                 pinctrl_usbh1: usbh1grp {
0212                         fsl,pins = <
0213                                 MX51_PAD_USBH1_CLK__USBH1_CLK     0x1e5
0214                                 MX51_PAD_USBH1_DIR__USBH1_DIR     0x1e5
0215                                 MX51_PAD_USBH1_NXT__USBH1_NXT     0x1e5
0216                                 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
0217                                 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
0218                                 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
0219                                 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
0220                                 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
0221                                 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
0222                                 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
0223                                 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
0224                                 MX51_PAD_USBH1_STP__USBH1_STP     0x1e5
0225                         >;
0226                 };
0227 
0228                 pinctrl_usbh1_vbus: usbh1-vbusgrp {
0229                         fsl,pins = <
0230                                 MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
0231                         >;
0232                 };
0233         };
0234 };
0235 
0236 &ssi2 {
0237         codec-handle = <&tlv320aic23>;
0238         status = "okay";
0239 };
0240 
0241 &uart1 {
0242         pinctrl-names = "default";
0243         pinctrl-0 = <&pinctrl_uart1>;
0244         uart-has-rtscts;
0245         status = "okay";
0246 };
0247 
0248 &uart3 {
0249         pinctrl-names = "default";
0250         pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
0251         uart-has-rtscts;
0252         status = "okay";
0253 };
0254 
0255 &usbh1 {
0256         pinctrl-names = "default";
0257         pinctrl-0 = <&pinctrl_usbh1>;
0258         fsl,usbphy = <&usbphy1>;
0259         dr_mode = "host";
0260         phy_type = "ulpi";
0261         status = "okay";
0262 };
0263 
0264 &usbotg {
0265         dr_mode = "otg";
0266         phy_type = "utmi_wide";
0267         status = "okay";
0268 };
0269 
0270 &usbphy0 {
0271         pinctrl-names = "default";
0272         pinctrl-0 = <&pinctrl_usbh1_vbus>;
0273         reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
0274 };