0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // Copyright 2011 Freescale Semiconductor, Inc.
0004 // Copyright 2011 Linaro Ltd.
0005
0006 /dts-v1/;
0007 #include "imx51.dtsi"
0008
0009 / {
0010 model = "Freescale i.MX51 Babbage Board";
0011 compatible = "fsl,imx51-babbage", "fsl,imx51";
0012
0013 chosen {
0014 stdout-path = &uart1;
0015 };
0016
0017 memory@90000000 {
0018 device_type = "memory";
0019 reg = <0x90000000 0x20000000>;
0020 };
0021
0022 ckih1 {
0023 clock-frequency = <22579200>;
0024 };
0025
0026 clk_osc: clk-osc {
0027 compatible = "fixed-clock";
0028 #clock-cells = <0>;
0029 clock-frequency = <26000000>;
0030 };
0031
0032 clk_osc_gate: clk-osc-gate {
0033 compatible = "gpio-gate-clock";
0034 pinctrl-names = "default";
0035 pinctrl-0 = <&pinctrl_clk26mhz_osc>;
0036 clocks = <&clk_osc>;
0037 #clock-cells = <0>;
0038 enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
0039 };
0040
0041 clk_audio: clk-audio {
0042 compatible = "gpio-gate-clock";
0043 pinctrl-names = "default";
0044 pinctrl-0 = <&pinctrl_clk26mhz_audio>;
0045 clocks = <&clk_osc_gate>;
0046 #clock-cells = <0>;
0047 enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
0048 };
0049
0050 clk_usb: clk-usb {
0051 compatible = "gpio-gate-clock";
0052 pinctrl-names = "default";
0053 pinctrl-0 = <&pinctrl_clk26mhz_usb>;
0054 clocks = <&clk_osc_gate>;
0055 #clock-cells = <0>;
0056 enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
0057 };
0058
0059 display1: disp1 {
0060 compatible = "fsl,imx-parallel-display";
0061 #address-cells = <1>;
0062 #size-cells = <0>;
0063 interface-pix-fmt = "rgb24";
0064 pinctrl-names = "default";
0065 pinctrl-0 = <&pinctrl_ipu_disp1>;
0066
0067 port@0 {
0068 reg = <0>;
0069
0070 display0_in: endpoint {
0071 remote-endpoint = <&ipu_di0_disp1>;
0072 };
0073 };
0074
0075 port@1 {
0076 reg = <1>;
0077
0078 parallel_display_out: endpoint {
0079 remote-endpoint = <&tfp410_in>;
0080 };
0081 };
0082 };
0083
0084 display2: disp2 {
0085 compatible = "fsl,imx-parallel-display";
0086 interface-pix-fmt = "rgb565";
0087 pinctrl-names = "default";
0088 pinctrl-0 = <&pinctrl_ipu_disp2>;
0089 status = "disabled";
0090 display-timings {
0091 native-mode = <&timing1>;
0092 timing1: claawvga {
0093 clock-frequency = <27000000>;
0094 hactive = <800>;
0095 vactive = <480>;
0096 hback-porch = <40>;
0097 hfront-porch = <60>;
0098 vback-porch = <10>;
0099 vfront-porch = <10>;
0100 hsync-len = <20>;
0101 vsync-len = <10>;
0102 hsync-active = <0>;
0103 vsync-active = <0>;
0104 de-active = <1>;
0105 pixelclk-active = <0>;
0106 };
0107 };
0108
0109 port {
0110 display1_in: endpoint {
0111 remote-endpoint = <&ipu_di1_disp2>;
0112 };
0113 };
0114 };
0115
0116 dvi-connector {
0117 compatible = "dvi-connector";
0118 digital;
0119
0120 port {
0121 dvi_connector_in: endpoint {
0122 remote-endpoint = <&tfp410_out>;
0123 };
0124 };
0125 };
0126
0127 dvi-encoder {
0128 compatible = "ti,tfp410";
0129
0130 ports {
0131 #address-cells = <1>;
0132 #size-cells = <0>;
0133
0134 port@0 {
0135 reg = <0>;
0136
0137 tfp410_in: endpoint {
0138 remote-endpoint = <¶llel_display_out>;
0139 };
0140 };
0141
0142 port@1 {
0143 reg = <1>;
0144
0145 tfp410_out: endpoint {
0146 remote-endpoint = <&dvi_connector_in>;
0147 };
0148 };
0149 };
0150 };
0151
0152 gpio-keys {
0153 compatible = "gpio-keys";
0154 pinctrl-names = "default";
0155 pinctrl-0 = <&pinctrl_gpio_keys>;
0156
0157 power {
0158 label = "Power Button";
0159 gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
0160 linux,code = <KEY_POWER>;
0161 wakeup-source;
0162 };
0163 };
0164
0165 leds {
0166 compatible = "gpio-leds";
0167 pinctrl-names = "default";
0168 pinctrl-0 = <&pinctrl_gpio_leds>;
0169
0170 led-diagnostic {
0171 label = "diagnostic";
0172 gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
0173 };
0174 };
0175
0176 regulators {
0177 compatible = "simple-bus";
0178 #address-cells = <1>;
0179 #size-cells = <0>;
0180
0181 reg_hub_reset: regulator@0 {
0182 compatible = "regulator-fixed";
0183 pinctrl-names = "default";
0184 pinctrl-0 = <&pinctrl_usbotgreg>;
0185 reg = <0>;
0186 regulator-name = "hub_reset";
0187 regulator-min-microvolt = <5000000>;
0188 regulator-max-microvolt = <5000000>;
0189 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
0190 enable-active-high;
0191 };
0192 };
0193
0194 sound {
0195 compatible = "fsl,imx51-babbage-sgtl5000",
0196 "fsl,imx-audio-sgtl5000";
0197 model = "imx51-babbage-sgtl5000";
0198 ssi-controller = <&ssi2>;
0199 audio-codec = <&sgtl5000>;
0200 audio-routing =
0201 "MIC_IN", "Mic Jack",
0202 "Mic Jack", "Mic Bias",
0203 "Headphone Jack", "HP_OUT";
0204 mux-int-port = <2>;
0205 mux-ext-port = <3>;
0206 };
0207
0208 usbphy1: usbphy1 {
0209 compatible = "usb-nop-xceiv";
0210 pinctrl-names = "default";
0211 pinctrl-0 = <&pinctrl_usbh1reg>;
0212 clocks = <&clk_usb>;
0213 clock-names = "main_clk";
0214 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
0215 vcc-supply = <&vusb_reg>;
0216 #phy-cells = <0>;
0217 };
0218 };
0219
0220 &audmux {
0221 pinctrl-names = "default";
0222 pinctrl-0 = <&pinctrl_audmux>;
0223 status = "okay";
0224 };
0225
0226 &ecspi1 {
0227 pinctrl-names = "default";
0228 pinctrl-0 = <&pinctrl_ecspi1>;
0229 cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
0230 <&gpio4 25 GPIO_ACTIVE_LOW>;
0231 status = "okay";
0232
0233 pmic: mc13892@0 {
0234 compatible = "fsl,mc13892";
0235 pinctrl-names = "default";
0236 pinctrl-0 = <&pinctrl_pmic>;
0237 spi-max-frequency = <6000000>;
0238 spi-cs-high;
0239 reg = <0>;
0240 interrupt-parent = <&gpio1>;
0241 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
0242 fsl,mc13xxx-uses-adc;
0243 fsl,mc13xxx-uses-rtc;
0244
0245 regulators {
0246 sw1_reg: sw1 {
0247 regulator-min-microvolt = <600000>;
0248 regulator-max-microvolt = <1375000>;
0249 regulator-boot-on;
0250 regulator-always-on;
0251 };
0252
0253 sw2_reg: sw2 {
0254 regulator-min-microvolt = <900000>;
0255 regulator-max-microvolt = <1850000>;
0256 regulator-boot-on;
0257 regulator-always-on;
0258 };
0259
0260 sw3_reg: sw3 {
0261 regulator-min-microvolt = <1100000>;
0262 regulator-max-microvolt = <1850000>;
0263 regulator-boot-on;
0264 regulator-always-on;
0265 };
0266
0267 sw4_reg: sw4 {
0268 regulator-min-microvolt = <1100000>;
0269 regulator-max-microvolt = <1850000>;
0270 regulator-boot-on;
0271 regulator-always-on;
0272 };
0273
0274 vpll_reg: vpll {
0275 regulator-min-microvolt = <1050000>;
0276 regulator-max-microvolt = <1800000>;
0277 regulator-boot-on;
0278 regulator-always-on;
0279 };
0280
0281 vdig_reg: vdig {
0282 regulator-min-microvolt = <1650000>;
0283 regulator-max-microvolt = <1650000>;
0284 regulator-boot-on;
0285 };
0286
0287 vsd_reg: vsd {
0288 regulator-min-microvolt = <1800000>;
0289 regulator-max-microvolt = <3150000>;
0290 };
0291
0292 vusb_reg: vusb {
0293 regulator-boot-on;
0294 };
0295
0296 vusb2_reg: vusb2 {
0297 regulator-min-microvolt = <2400000>;
0298 regulator-max-microvolt = <2775000>;
0299 regulator-boot-on;
0300 regulator-always-on;
0301 };
0302
0303 vvideo_reg: vvideo {
0304 regulator-min-microvolt = <2775000>;
0305 regulator-max-microvolt = <2775000>;
0306 };
0307
0308 vaudio_reg: vaudio {
0309 regulator-min-microvolt = <2300000>;
0310 regulator-max-microvolt = <3000000>;
0311 };
0312
0313 vcam_reg: vcam {
0314 regulator-min-microvolt = <2500000>;
0315 regulator-max-microvolt = <3000000>;
0316 };
0317
0318 vgen1_reg: vgen1 {
0319 regulator-min-microvolt = <1200000>;
0320 regulator-max-microvolt = <1200000>;
0321 };
0322
0323 vgen2_reg: vgen2 {
0324 regulator-min-microvolt = <1200000>;
0325 regulator-max-microvolt = <3150000>;
0326 regulator-always-on;
0327 };
0328
0329 vgen3_reg: vgen3 {
0330 regulator-min-microvolt = <1800000>;
0331 regulator-max-microvolt = <2900000>;
0332 regulator-always-on;
0333 };
0334 };
0335 };
0336
0337 flash: at45db321d@1 {
0338 #address-cells = <1>;
0339 #size-cells = <1>;
0340 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
0341 spi-max-frequency = <25000000>;
0342 reg = <1>;
0343
0344 partition@0 {
0345 label = "U-Boot";
0346 reg = <0x0 0x40000>;
0347 read-only;
0348 };
0349
0350 partition@40000 {
0351 label = "Kernel";
0352 reg = <0x40000 0x3c0000>;
0353 };
0354 };
0355 };
0356
0357 &esdhc1 {
0358 pinctrl-names = "default";
0359 pinctrl-0 = <&pinctrl_esdhc1>;
0360 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
0361 wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
0362 status = "okay";
0363 };
0364
0365 &esdhc2 {
0366 pinctrl-names = "default";
0367 pinctrl-0 = <&pinctrl_esdhc2>;
0368 cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
0369 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
0370 status = "okay";
0371 };
0372
0373 &fec {
0374 pinctrl-names = "default";
0375 pinctrl-0 = <&pinctrl_fec>;
0376 phy-mode = "mii";
0377 phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
0378 phy-reset-duration = <1>;
0379 status = "okay";
0380 };
0381
0382 &i2c1 {
0383 pinctrl-names = "default";
0384 pinctrl-0 = <&pinctrl_i2c1>;
0385 status = "okay";
0386 };
0387
0388 &i2c2 {
0389 pinctrl-names = "default";
0390 pinctrl-0 = <&pinctrl_i2c2>;
0391 status = "okay";
0392
0393 sgtl5000: codec@a {
0394 compatible = "fsl,sgtl5000";
0395 reg = <0x0a>;
0396 #sound-dai-cells = <0>;
0397 clocks = <&clk_audio>;
0398 VDDA-supply = <&vdig_reg>;
0399 VDDIO-supply = <&vvideo_reg>;
0400 };
0401 };
0402
0403 &ipu_di0_disp1 {
0404 remote-endpoint = <&display0_in>;
0405 };
0406
0407 &ipu_di1_disp2 {
0408 remote-endpoint = <&display1_in>;
0409 };
0410
0411 &kpp {
0412 pinctrl-names = "default";
0413 pinctrl-0 = <&pinctrl_kpp>;
0414 linux,keymap = <
0415 MATRIX_KEY(0, 0, KEY_UP)
0416 MATRIX_KEY(0, 1, KEY_DOWN)
0417 MATRIX_KEY(0, 2, KEY_VOLUMEDOWN)
0418 MATRIX_KEY(0, 3, KEY_HOME)
0419 MATRIX_KEY(1, 0, KEY_RIGHT)
0420 MATRIX_KEY(1, 1, KEY_LEFT)
0421 MATRIX_KEY(1, 2, KEY_ENTER)
0422 MATRIX_KEY(1, 3, KEY_VOLUMEUP)
0423 MATRIX_KEY(2, 0, KEY_F6)
0424 MATRIX_KEY(2, 1, KEY_F8)
0425 MATRIX_KEY(2, 2, KEY_F9)
0426 MATRIX_KEY(2, 3, KEY_F10)
0427 MATRIX_KEY(3, 0, KEY_F1)
0428 MATRIX_KEY(3, 1, KEY_F2)
0429 MATRIX_KEY(3, 2, KEY_F3)
0430 MATRIX_KEY(3, 3, KEY_POWER)
0431 >;
0432 status = "okay";
0433 };
0434
0435 &pmu {
0436 secure-reg-access;
0437 };
0438
0439 &ssi2 {
0440 status = "okay";
0441 };
0442
0443 &uart1 {
0444 pinctrl-names = "default";
0445 pinctrl-0 = <&pinctrl_uart1>;
0446 uart-has-rtscts;
0447 status = "okay";
0448 };
0449
0450 &uart2 {
0451 pinctrl-names = "default";
0452 pinctrl-0 = <&pinctrl_uart2>;
0453 status = "okay";
0454 };
0455
0456 &uart3 {
0457 pinctrl-names = "default";
0458 pinctrl-0 = <&pinctrl_uart3>;
0459 uart-has-rtscts;
0460 status = "okay";
0461 };
0462
0463 &usbh1 {
0464 pinctrl-names = "default";
0465 pinctrl-0 = <&pinctrl_usbh1>;
0466 vbus-supply = <®_hub_reset>;
0467 fsl,usbphy = <&usbphy1>;
0468 phy_type = "ulpi";
0469 status = "okay";
0470 };
0471
0472 &usbphy0 {
0473 vcc-supply = <&vusb_reg>;
0474 };
0475
0476 &usbotg {
0477 dr_mode = "otg";
0478 disable-over-current;
0479 phy_type = "utmi_wide";
0480 status = "okay";
0481 };
0482
0483 &iomuxc {
0484 imx51-babbage {
0485 pinctrl_audmux: audmuxgrp {
0486 fsl,pins = <
0487 MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
0488 MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
0489 MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
0490 MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
0491 >;
0492 };
0493
0494 pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
0495 fsl,pins = <
0496 MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
0497 >;
0498 };
0499
0500 pinctrl_clk26mhz_osc: clk26mhzoscgrp {
0501 fsl,pins = <
0502 MX51_PAD_DI1_PIN12__GPIO3_1 0x85
0503 >;
0504 };
0505
0506 pinctrl_clk26mhz_usb: clk26mhzusbgrp {
0507 fsl,pins = <
0508 MX51_PAD_EIM_D17__GPIO2_1 0x85
0509 >;
0510 };
0511
0512 pinctrl_ecspi1: ecspi1grp {
0513 fsl,pins = <
0514 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
0515 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
0516 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
0517 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */
0518 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 /* CS1 */
0519 >;
0520 };
0521
0522 pinctrl_esdhc1: esdhc1grp {
0523 fsl,pins = <
0524 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
0525 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
0526 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
0527 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
0528 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
0529 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
0530 MX51_PAD_GPIO1_0__GPIO1_0 0x100
0531 MX51_PAD_GPIO1_1__GPIO1_1 0x100
0532 >;
0533 };
0534
0535 pinctrl_esdhc2: esdhc2grp {
0536 fsl,pins = <
0537 MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
0538 MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
0539 MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
0540 MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
0541 MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
0542 MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
0543 MX51_PAD_GPIO1_5__GPIO1_5 0x100 /* WP */
0544 MX51_PAD_GPIO1_6__GPIO1_6 0x100 /* CD */
0545 >;
0546 };
0547
0548 pinctrl_fec: fecgrp {
0549 fsl,pins = <
0550 MX51_PAD_EIM_EB2__FEC_MDIO 0x000001f5
0551 MX51_PAD_EIM_EB3__FEC_RDATA1 0x00000085
0552 MX51_PAD_EIM_CS2__FEC_RDATA2 0x00000085
0553 MX51_PAD_EIM_CS3__FEC_RDATA3 0x00000085
0554 MX51_PAD_EIM_CS4__FEC_RX_ER 0x00000180
0555 MX51_PAD_EIM_CS5__FEC_CRS 0x00000180
0556 MX51_PAD_NANDF_RB2__FEC_COL 0x00000180
0557 MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x00000180
0558 MX51_PAD_NANDF_D9__FEC_RDATA0 0x00002180
0559 MX51_PAD_NANDF_D8__FEC_TDATA0 0x00002004
0560 MX51_PAD_NANDF_CS2__FEC_TX_ER 0x00002004
0561 MX51_PAD_NANDF_CS3__FEC_MDC 0x00002004
0562 MX51_PAD_NANDF_CS4__FEC_TDATA1 0x00002004
0563 MX51_PAD_NANDF_CS5__FEC_TDATA2 0x00002004
0564 MX51_PAD_NANDF_CS6__FEC_TDATA3 0x00002004
0565 MX51_PAD_NANDF_CS7__FEC_TX_EN 0x00002004
0566 MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x00002180
0567 MX51_PAD_NANDF_D11__FEC_RX_DV 0x000020a4
0568 MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */
0569 >;
0570 };
0571
0572 pinctrl_gpio_keys: gpiokeysgrp {
0573 fsl,pins = <
0574 MX51_PAD_EIM_A27__GPIO2_21 0x5
0575 >;
0576 };
0577
0578 pinctrl_gpio_leds: gpioledsgrp {
0579 fsl,pins = <
0580 MX51_PAD_EIM_D22__GPIO2_6 0x80000000
0581 >;
0582 };
0583
0584 pinctrl_i2c1: i2c1grp {
0585 fsl,pins = <
0586 MX51_PAD_EIM_D19__I2C1_SCL 0x400001ed
0587 MX51_PAD_EIM_D16__I2C1_SDA 0x400001ed
0588 >;
0589 };
0590
0591 pinctrl_i2c2: i2c2grp {
0592 fsl,pins = <
0593 MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
0594 MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
0595 >;
0596 };
0597
0598 pinctrl_ipu_disp1: ipudisp1grp {
0599 fsl,pins = <
0600 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
0601 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
0602 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
0603 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
0604 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
0605 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
0606 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
0607 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
0608 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
0609 MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
0610 MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
0611 MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
0612 MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
0613 MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
0614 MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
0615 MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
0616 MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
0617 MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
0618 MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
0619 MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
0620 MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
0621 MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
0622 MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
0623 MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
0624 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
0625 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
0626 >;
0627 };
0628
0629 pinctrl_ipu_disp2: ipudisp2grp {
0630 fsl,pins = <
0631 MX51_PAD_DISP2_DAT0__DISP2_DAT0 0x5
0632 MX51_PAD_DISP2_DAT1__DISP2_DAT1 0x5
0633 MX51_PAD_DISP2_DAT2__DISP2_DAT2 0x5
0634 MX51_PAD_DISP2_DAT3__DISP2_DAT3 0x5
0635 MX51_PAD_DISP2_DAT4__DISP2_DAT4 0x5
0636 MX51_PAD_DISP2_DAT5__DISP2_DAT5 0x5
0637 MX51_PAD_DISP2_DAT6__DISP2_DAT6 0x5
0638 MX51_PAD_DISP2_DAT7__DISP2_DAT7 0x5
0639 MX51_PAD_DISP2_DAT8__DISP2_DAT8 0x5
0640 MX51_PAD_DISP2_DAT9__DISP2_DAT9 0x5
0641 MX51_PAD_DISP2_DAT10__DISP2_DAT10 0x5
0642 MX51_PAD_DISP2_DAT11__DISP2_DAT11 0x5
0643 MX51_PAD_DISP2_DAT12__DISP2_DAT12 0x5
0644 MX51_PAD_DISP2_DAT13__DISP2_DAT13 0x5
0645 MX51_PAD_DISP2_DAT14__DISP2_DAT14 0x5
0646 MX51_PAD_DISP2_DAT15__DISP2_DAT15 0x5
0647 MX51_PAD_DI2_PIN2__DI2_PIN2 0x5
0648 MX51_PAD_DI2_PIN3__DI2_PIN3 0x5
0649 MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5
0650 MX51_PAD_DI_GP4__DI2_PIN15 0x5
0651 >;
0652 };
0653
0654 pinctrl_kpp: kppgrp {
0655 fsl,pins = <
0656 MX51_PAD_KEY_ROW0__KEY_ROW0 0xe0
0657 MX51_PAD_KEY_ROW1__KEY_ROW1 0xe0
0658 MX51_PAD_KEY_ROW2__KEY_ROW2 0xe0
0659 MX51_PAD_KEY_ROW3__KEY_ROW3 0xe0
0660 MX51_PAD_KEY_COL0__KEY_COL0 0xe8
0661 MX51_PAD_KEY_COL1__KEY_COL1 0xe8
0662 MX51_PAD_KEY_COL2__KEY_COL2 0xe8
0663 MX51_PAD_KEY_COL3__KEY_COL3 0xe8
0664 >;
0665 };
0666
0667 pinctrl_pmic: pmicgrp {
0668 fsl,pins = <
0669 MX51_PAD_GPIO1_8__GPIO1_8 0xe5 /* IRQ */
0670 >;
0671 };
0672
0673 pinctrl_uart1: uart1grp {
0674 fsl,pins = <
0675 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
0676 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
0677 MX51_PAD_UART1_RTS__UART1_RTS 0x1c5
0678 MX51_PAD_UART1_CTS__UART1_CTS 0x1c5
0679 >;
0680 };
0681
0682 pinctrl_uart2: uart2grp {
0683 fsl,pins = <
0684 MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
0685 MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
0686 >;
0687 };
0688
0689 pinctrl_uart3: uart3grp {
0690 fsl,pins = <
0691 MX51_PAD_EIM_D25__UART3_RXD 0x1c5
0692 MX51_PAD_EIM_D26__UART3_TXD 0x1c5
0693 MX51_PAD_EIM_D27__UART3_RTS 0x1c5
0694 MX51_PAD_EIM_D24__UART3_CTS 0x1c5
0695 >;
0696 };
0697
0698 pinctrl_usbh1: usbh1grp {
0699 fsl,pins = <
0700 MX51_PAD_USBH1_CLK__USBH1_CLK 0x80000000
0701 MX51_PAD_USBH1_DIR__USBH1_DIR 0x80000000
0702 MX51_PAD_USBH1_NXT__USBH1_NXT 0x80000000
0703 MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x80000000
0704 MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x80000000
0705 MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x80000000
0706 MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x80000000
0707 MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x80000000
0708 MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x80000000
0709 MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x80000000
0710 MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x80000000
0711 >;
0712 };
0713
0714 pinctrl_usbh1reg: usbh1reggrp {
0715 fsl,pins = <
0716 MX51_PAD_EIM_D21__GPIO2_5 0x85
0717 >;
0718 };
0719
0720 pinctrl_usbotgreg: usbotgreggrp {
0721 fsl,pins = <
0722 MX51_PAD_GPIO1_7__GPIO1_7 0x85
0723 >;
0724 };
0725 };
0726 };
