0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright 2013 Armadeus Systems - <support@armadeus.com>
0004 */
0005
0006 /* APF51Dev is a docking board for the APF51 SOM */
0007 #include "imx51-apf51.dts"
0008
0009 / {
0010 model = "Armadeus Systems APF51Dev docking/development board";
0011 compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51";
0012
0013 backlight {
0014 pinctrl-names = "default";
0015 pinctrl-0 = <&pinctrl_backlight>;
0016 compatible = "gpio-backlight";
0017 gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
0018 default-on;
0019 };
0020
0021 disp1 {
0022 compatible = "fsl,imx-parallel-display";
0023 interface-pix-fmt = "bgr666";
0024 pinctrl-names = "default";
0025 pinctrl-0 = <&pinctrl_ipu_disp1>;
0026
0027 display-timings {
0028 lw700 {
0029 native-mode;
0030 clock-frequency = <33000033>;
0031 hactive = <800>;
0032 vactive = <480>;
0033 hback-porch = <96>;
0034 hfront-porch = <96>;
0035 vback-porch = <20>;
0036 vfront-porch = <21>;
0037 hsync-len = <64>;
0038 vsync-len = <4>;
0039 hsync-active = <1>;
0040 vsync-active = <1>;
0041 de-active = <1>;
0042 pixelclk-active = <0>;
0043 };
0044 };
0045
0046 port {
0047 display_in: endpoint {
0048 remote-endpoint = <&ipu_di0_disp1>;
0049 };
0050 };
0051 };
0052
0053 gpio-keys {
0054 compatible = "gpio-keys";
0055
0056 user-key {
0057 label = "user";
0058 gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
0059 linux,code = <256>; /* BTN_0 */
0060 };
0061 };
0062
0063 leds {
0064 compatible = "gpio-leds";
0065
0066 user {
0067 label = "Heartbeat";
0068 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
0069 linux,default-trigger = "heartbeat";
0070 };
0071 };
0072 };
0073
0074 &ecspi1 {
0075 pinctrl-names = "default";
0076 pinctrl-0 = <&pinctrl_ecspi1>;
0077 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>,
0078 <&gpio4 25 GPIO_ACTIVE_LOW>;
0079 status = "okay";
0080 };
0081
0082 &ecspi2 {
0083 pinctrl-names = "default";
0084 pinctrl-0 = <&pinctrl_ecspi2>;
0085 cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>,
0086 <&gpio3 27 GPIO_ACTIVE_LOW>;
0087 status = "okay";
0088 };
0089
0090 &esdhc1 {
0091 pinctrl-names = "default";
0092 pinctrl-0 = <&pinctrl_esdhc1>;
0093 cd-gpios = <&gpio2 29 GPIO_ACTIVE_LOW>;
0094 bus-width = <4>;
0095 status = "okay";
0096 };
0097
0098 &esdhc2 {
0099 pinctrl-names = "default";
0100 pinctrl-0 = <&pinctrl_esdhc2>;
0101 bus-width = <4>;
0102 non-removable;
0103 status = "okay";
0104 };
0105
0106 &i2c2 {
0107 pinctrl-names = "default";
0108 pinctrl-0 = <&pinctrl_i2c2>;
0109 status = "okay";
0110 };
0111
0112 &iomuxc {
0113 pinctrl-names = "default";
0114 pinctrl-0 = <&pinctrl_hog>;
0115
0116 imx51-apf51dev {
0117 pinctrl_backlight: backlightgrp {
0118 fsl,pins = <
0119 MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
0120 >;
0121 };
0122
0123 pinctrl_hog: hoggrp {
0124 fsl,pins = <
0125 MX51_PAD_EIM_EB2__GPIO2_22 0x0C5
0126 MX51_PAD_EIM_EB3__GPIO2_23 0x0C5
0127 MX51_PAD_EIM_CS4__GPIO2_29 0x100
0128 MX51_PAD_NANDF_D13__GPIO3_27 0x0C5
0129 MX51_PAD_NANDF_D12__GPIO3_28 0x0C5
0130 MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5
0131 MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5
0132 MX51_PAD_GPIO1_2__GPIO1_2 0x0C5
0133 MX51_PAD_GPIO1_3__GPIO1_3 0x0C5
0134 >;
0135 };
0136
0137 pinctrl_ecspi1: ecspi1grp {
0138 fsl,pins = <
0139 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
0140 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
0141 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
0142 >;
0143 };
0144
0145 pinctrl_ecspi2: ecspi2grp {
0146 fsl,pins = <
0147 MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185
0148 MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185
0149 MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185
0150 >;
0151 };
0152
0153 pinctrl_esdhc1: esdhc1grp {
0154 fsl,pins = <
0155 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
0156 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
0157 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
0158 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
0159 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
0160 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
0161 >;
0162 };
0163
0164 pinctrl_esdhc2: esdhc2grp {
0165 fsl,pins = <
0166 MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5
0167 MX51_PAD_SD2_CLK__SD2_CLK 0x20d5
0168 MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5
0169 MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5
0170 MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5
0171 MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5
0172 >;
0173 };
0174
0175 pinctrl_i2c2: i2c2grp {
0176 fsl,pins = <
0177 MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed
0178 MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed
0179 >;
0180 };
0181
0182 pinctrl_ipu_disp1: ipudisp1grp {
0183 fsl,pins = <
0184 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
0185 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
0186 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
0187 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
0188 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
0189 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
0190 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
0191 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
0192 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
0193 MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
0194 MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
0195 MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
0196 MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
0197 MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
0198 MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
0199 MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
0200 MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
0201 MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
0202 MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
0203 MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
0204 MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
0205 MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
0206 MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
0207 MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
0208 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
0209 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
0210 >;
0211 };
0212 };
0213 };
0214
0215 &ipu_di0_disp1 {
0216 remote-endpoint = <&display_in>;
0217 };