0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
0004 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
0005
0006 / {
0007 #address-cells = <1>;
0008 #size-cells = <1>;
0009 /*
0010 * The decompressor and also some bootloaders rely on a
0011 * pre-existing /chosen node to be available to insert the
0012 * command line and merge other ATAGS info.
0013 */
0014 chosen {};
0015
0016 aliases {
0017 gpio0 = &gpio1;
0018 gpio1 = &gpio2;
0019 gpio2 = &gpio3;
0020 i2c0 = &i2c1;
0021 i2c1 = &i2c2;
0022 i2c2 = &i2c3;
0023 serial0 = &uart1;
0024 serial1 = &uart2;
0025 serial2 = &uart3;
0026 serial3 = &uart4;
0027 serial4 = &uart5;
0028 spi0 = &spi1;
0029 spi1 = &spi2;
0030 spi2 = &spi3;
0031 };
0032
0033 cpus {
0034 #address-cells = <1>;
0035 #size-cells = <0>;
0036
0037 cpu@0 {
0038 compatible = "arm,arm1136jf-s";
0039 device_type = "cpu";
0040 reg = <0>;
0041 };
0042 };
0043
0044 avic: interrupt-controller@68000000 {
0045 compatible = "fsl,imx31-avic", "fsl,avic";
0046 interrupt-controller;
0047 #interrupt-cells = <1>;
0048 reg = <0x68000000 0x100000>;
0049 };
0050
0051 soc: soc {
0052 #address-cells = <1>;
0053 #size-cells = <1>;
0054 compatible = "simple-bus";
0055 interrupt-parent = <&avic>;
0056 ranges;
0057
0058 iram: sram@1fffc000 {
0059 compatible = "mmio-sram";
0060 reg = <0x1fffc000 0x4000>;
0061 #address-cells = <1>;
0062 #size-cells = <1>;
0063 ranges = <0 0x1fffc000 0x4000>;
0064 };
0065
0066 aips1: bus@43f00000 { /* AIPS1 */
0067 compatible = "fsl,aips-bus", "simple-bus";
0068 #address-cells = <1>;
0069 #size-cells = <1>;
0070 reg = <0x43f00000 0x100000>;
0071 ranges;
0072
0073 i2c1: i2c@43f80000 {
0074 compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
0075 reg = <0x43f80000 0x4000>;
0076 interrupts = <10>;
0077 clocks = <&clks 33>;
0078 #address-cells = <1>;
0079 #size-cells = <0>;
0080 status = "disabled";
0081 };
0082
0083 i2c3: i2c@43f84000 {
0084 compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
0085 reg = <0x43f84000 0x4000>;
0086 interrupts = <3>;
0087 clocks = <&clks 35>;
0088 #address-cells = <1>;
0089 #size-cells = <0>;
0090 status = "disabled";
0091 };
0092
0093 ata: ata@43f8c000 {
0094 compatible = "fsl,imx31-pata", "fsl,imx27-pata";
0095 reg = <0x43f8c000 0x4000>;
0096 interrupts = <15>;
0097 clocks = <&clks 26>;
0098 status = "disabled";
0099 };
0100
0101 uart1: serial@43f90000 {
0102 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
0103 reg = <0x43f90000 0x4000>;
0104 interrupts = <45>;
0105 clocks = <&clks 10>, <&clks 30>;
0106 clock-names = "ipg", "per";
0107 status = "disabled";
0108 };
0109
0110 uart2: serial@43f94000 {
0111 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
0112 reg = <0x43f94000 0x4000>;
0113 interrupts = <32>;
0114 clocks = <&clks 10>, <&clks 31>;
0115 clock-names = "ipg", "per";
0116 status = "disabled";
0117 };
0118
0119 i2c2: i2c@43f98000 {
0120 compatible = "fsl,imx31-i2c", "fsl,imx21-i2c";
0121 reg = <0x43f98000 0x4000>;
0122 interrupts = <4>;
0123 clocks = <&clks 34>;
0124 #address-cells = <1>;
0125 #size-cells = <0>;
0126 status = "disabled";
0127 };
0128
0129 spi1: spi@43fa4000 {
0130 compatible = "fsl,imx31-cspi";
0131 reg = <0x43fa4000 0x4000>;
0132 interrupts = <14>;
0133 clocks = <&clks 10>, <&clks 53>;
0134 clock-names = "ipg", "per";
0135 dmas = <&sdma 8 8 0>, <&sdma 9 8 0>;
0136 dma-names = "rx", "tx";
0137 #address-cells = <1>;
0138 #size-cells = <0>;
0139 status = "disabled";
0140 };
0141
0142 kpp: kpp@43fa8000 {
0143 compatible = "fsl,imx31-kpp", "fsl,imx21-kpp";
0144 reg = <0x43fa8000 0x4000>;
0145 interrupts = <24>;
0146 clocks = <&clks 46>;
0147 status = "disabled";
0148 };
0149
0150 uart4: serial@43fb0000 {
0151 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
0152 reg = <0x43fb0000 0x4000>;
0153 clocks = <&clks 10>, <&clks 49>;
0154 clock-names = "ipg", "per";
0155 interrupts = <46>;
0156 status = "disabled";
0157 };
0158
0159 uart5: serial@43fb4000 {
0160 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
0161 reg = <0x43fb4000 0x4000>;
0162 interrupts = <47>;
0163 clocks = <&clks 10>, <&clks 50>;
0164 clock-names = "ipg", "per";
0165 status = "disabled";
0166 };
0167 };
0168
0169 spba-bus@50000000 {
0170 compatible = "fsl,spba-bus", "simple-bus";
0171 #address-cells = <1>;
0172 #size-cells = <1>;
0173 reg = <0x50000000 0x100000>;
0174 ranges;
0175
0176 sdhci1: mmc@50004000 {
0177 compatible = "fsl,imx31-mmc";
0178 reg = <0x50004000 0x4000>;
0179 interrupts = <9>;
0180 clocks = <&clks 10>, <&clks 20>;
0181 clock-names = "ipg", "per";
0182 dmas = <&sdma 20 3 0>;
0183 dma-names = "rx-tx";
0184 status = "disabled";
0185 };
0186
0187 sdhci2: mmc@50008000 {
0188 compatible = "fsl,imx31-mmc";
0189 reg = <0x50008000 0x4000>;
0190 interrupts = <8>;
0191 clocks = <&clks 10>, <&clks 21>;
0192 clock-names = "ipg", "per";
0193 dmas = <&sdma 21 3 0>;
0194 dma-names = "rx-tx";
0195 status = "disabled";
0196 };
0197
0198 uart3: serial@5000c000 {
0199 compatible = "fsl,imx31-uart", "fsl,imx21-uart";
0200 reg = <0x5000c000 0x4000>;
0201 interrupts = <18>;
0202 clocks = <&clks 10>, <&clks 48>;
0203 clock-names = "ipg", "per";
0204 status = "disabled";
0205 };
0206
0207 spi2: spi@50010000 {
0208 compatible = "fsl,imx31-cspi";
0209 reg = <0x50010000 0x4000>;
0210 interrupts = <13>;
0211 clocks = <&clks 10>, <&clks 54>;
0212 clock-names = "ipg", "per";
0213 dmas = <&sdma 6 8 0>, <&sdma 7 8 0>;
0214 dma-names = "rx", "tx";
0215 #address-cells = <1>;
0216 #size-cells = <0>;
0217 status = "disabled";
0218 };
0219
0220 iim: efuse@5001c000 {
0221 compatible = "fsl,imx31-iim", "fsl,imx27-iim";
0222 reg = <0x5001c000 0x1000>;
0223 interrupts = <19>;
0224 clocks = <&clks 25>;
0225 };
0226 };
0227
0228 bus@53f00000 { /* AIPS2 */
0229 compatible = "fsl,aips-bus", "simple-bus";
0230 #address-cells = <1>;
0231 #size-cells = <1>;
0232 reg = <0x53f00000 0x100000>;
0233 ranges;
0234
0235 clks: ccm@53f80000{
0236 compatible = "fsl,imx31-ccm";
0237 reg = <0x53f80000 0x4000>;
0238 interrupts = <31>, <53>;
0239 #clock-cells = <1>;
0240 };
0241
0242 spi3: spi@53f84000 {
0243 compatible = "fsl,imx31-cspi";
0244 reg = <0x53f84000 0x4000>;
0245 interrupts = <17>;
0246 clocks = <&clks 10>, <&clks 28>;
0247 clock-names = "ipg", "per";
0248 dmas = <&sdma 10 8 0>, <&sdma 11 8 0>;
0249 dma-names = "rx", "tx";
0250 #address-cells = <1>;
0251 #size-cells = <0>;
0252 status = "disabled";
0253 };
0254
0255 gpt: timer@53f90000 {
0256 compatible = "fsl,imx31-gpt";
0257 reg = <0x53f90000 0x4000>;
0258 interrupts = <29>;
0259 clocks = <&clks 10>, <&clks 22>;
0260 clock-names = "ipg", "per";
0261 };
0262
0263 gpio3: gpio@53fa4000 {
0264 compatible = "fsl,imx31-gpio";
0265 reg = <0x53fa4000 0x4000>;
0266 interrupts = <56>;
0267 gpio-controller;
0268 #gpio-cells = <2>;
0269 interrupt-controller;
0270 #interrupt-cells = <2>;
0271 };
0272
0273 rng@53fb0000 {
0274 compatible = "fsl,imx31-rnga";
0275 reg = <0x53fb0000 0x4000>;
0276 interrupts = <22>;
0277 clocks = <&clks 29>;
0278 };
0279
0280 gpio1: gpio@53fcc000 {
0281 compatible = "fsl,imx31-gpio";
0282 reg = <0x53fcc000 0x4000>;
0283 interrupts = <52>;
0284 gpio-controller;
0285 #gpio-cells = <2>;
0286 interrupt-controller;
0287 #interrupt-cells = <2>;
0288 };
0289
0290 gpio2: gpio@53fd0000 {
0291 compatible = "fsl,imx31-gpio";
0292 reg = <0x53fd0000 0x4000>;
0293 interrupts = <51>;
0294 gpio-controller;
0295 #gpio-cells = <2>;
0296 interrupt-controller;
0297 #interrupt-cells = <2>;
0298 };
0299
0300 sdma: sdma@53fd4000 {
0301 compatible = "fsl,imx31-sdma";
0302 reg = <0x53fd4000 0x4000>;
0303 interrupts = <34>;
0304 clocks = <&clks 10>, <&clks 27>;
0305 clock-names = "ipg", "ahb";
0306 #dma-cells = <3>;
0307 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx31.bin";
0308 };
0309
0310 rtc: rtc@53fd8000 {
0311 compatible = "fsl,imx31-rtc", "fsl,imx21-rtc";
0312 reg = <0x53fd8000 0x4000>;
0313 interrupts = <25>;
0314 clocks = <&clks 2>, <&clks 40>;
0315 clock-names = "ref", "ipg";
0316 };
0317
0318 wdog: watchdog@53fdc000 {
0319 compatible = "fsl,imx31-wdt", "fsl,imx21-wdt";
0320 reg = <0x53fdc000 0x4000>;
0321 clocks = <&clks 41>;
0322 interrupts = <55>;
0323 };
0324
0325 pwm: pwm@53fe0000 {
0326 compatible = "fsl,imx31-pwm", "fsl,imx27-pwm";
0327 reg = <0x53fe0000 0x4000>;
0328 interrupts = <26>;
0329 clocks = <&clks 10>, <&clks 42>;
0330 clock-names = "ipg", "per";
0331 #pwm-cells = <3>;
0332 status = "disabled";
0333 };
0334 };
0335
0336 emi@b8000000 { /* External Memory Interface */
0337 compatible = "simple-bus";
0338 reg = <0xb8000000 0x5000>;
0339 ranges;
0340 #address-cells = <1>;
0341 #size-cells = <1>;
0342
0343 nfc: nand@b8000000 {
0344 compatible = "fsl,imx31-nand", "fsl,imx27-nand";
0345 reg = <0xb8000000 0x1000>;
0346 interrupts = <33>;
0347 clocks = <&clks 9>;
0348 dmas = <&sdma 30 17 0>;
0349 dma-names = "rx-tx";
0350 #address-cells = <1>;
0351 #size-cells = <1>;
0352 status = "disabled";
0353 };
0354
0355 weim: weim@b8002000 {
0356 compatible = "fsl,imx31-weim", "fsl,imx27-weim";
0357 reg = <0xb8002000 0x1000>;
0358 clocks = <&clks 56>;
0359 #address-cells = <2>;
0360 #size-cells = <1>;
0361 ranges = <0 0 0xa0000000 0x08000000
0362 1 0 0xa8000000 0x08000000
0363 2 0 0xb0000000 0x02000000
0364 3 0 0xb2000000 0x02000000
0365 4 0 0xb4000000 0x02000000
0366 5 0 0xb6000000 0x02000000>;
0367 status = "disabled";
0368 };
0369 };
0370 };
0371 };
