OSCL-LXR |
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0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // Copyright 2012 Freescale Semiconductor, Inc.
0004
0005 #include <dt-bindings/gpio/gpio.h>
0006 #include "imx28-pinfunc.h"
0007
0008 / {
0009 #address-cells = <1>;
0010 #size-cells = <1>;
0011
0012 interrupt-parent = <&icoll>;
0013 /*
0014 * The decompressor and also some bootloaders rely on a
0015 * pre-existing /chosen node to be available to insert the
0016 * command line and merge other ATAGS info.
0017 */
0018 chosen {};
0019
0020 aliases {
0021 ethernet0 = &mac0;
0022 ethernet1 = &mac1;
0023 gpio0 = &gpio0;
0024 gpio1 = &gpio1;
0025 gpio2 = &gpio2;
0026 gpio3 = &gpio3;
0027 gpio4 = &gpio4;
0028 saif0 = &saif0;
0029 saif1 = &saif1;
0030 serial0 = &auart0;
0031 serial1 = &auart1;
0032 serial2 = &auart2;
0033 serial3 = &auart3;
0034 serial4 = &auart4;
0035 spi0 = &ssp1;
0036 spi1 = &ssp2;
0037 usbphy0 = &usbphy0;
0038 usbphy1 = &usbphy1;
0039 };
0040
0041 cpus {
0042 #address-cells = <1>;
0043 #size-cells = <0>;
0044
0045 cpu@0 {
0046 compatible = "arm,arm926ej-s";
0047 device_type = "cpu";
0048 reg = <0>;
0049 };
0050 };
0051
0052 apb@80000000 {
0053 compatible = "simple-bus";
0054 #address-cells = <1>;
0055 #size-cells = <1>;
0056 reg = <0x80000000 0x80000>;
0057 ranges;
0058
0059 apbh@80000000 {
0060 compatible = "simple-bus";
0061 #address-cells = <1>;
0062 #size-cells = <1>;
0063 reg = <0x80000000 0x3c900>;
0064 ranges;
0065
0066 icoll: interrupt-controller@80000000 {
0067 compatible = "fsl,imx28-icoll", "fsl,icoll";
0068 interrupt-controller;
0069 #interrupt-cells = <1>;
0070 reg = <0x80000000 0x2000>;
0071 };
0072
0073 hsadc: hsadc@80002000 {
0074 reg = <0x80002000 0x2000>;
0075 interrupts = <13>;
0076 dmas = <&dma_apbh 12>;
0077 dma-names = "rx";
0078 status = "disabled";
0079 };
0080
0081 dma_apbh: dma-apbh@80004000 {
0082 compatible = "fsl,imx28-dma-apbh";
0083 reg = <0x80004000 0x2000>;
0084 interrupts = <82 83 84 85
0085 88 88 88 88
0086 88 88 88 88
0087 87 86 0 0>;
0088 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
0089 "gpmi0", "gmpi1", "gpmi2", "gmpi3",
0090 "gpmi4", "gmpi5", "gpmi6", "gmpi7",
0091 "hsadc", "lcdif", "empty", "empty";
0092 #dma-cells = <1>;
0093 dma-channels = <16>;
0094 clocks = <&clks 25>;
0095 };
0096
0097 perfmon: perfmon@80006000 {
0098 reg = <0x80006000 0x800>;
0099 interrupts = <27>;
0100 status = "disabled";
0101 };
0102
0103 gpmi: nand-controller@8000c000 {
0104 compatible = "fsl,imx28-gpmi-nand";
0105 #address-cells = <1>;
0106 #size-cells = <1>;
0107 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
0108 reg-names = "gpmi-nand", "bch";
0109 interrupts = <41>;
0110 interrupt-names = "bch";
0111 clocks = <&clks 50>;
0112 clock-names = "gpmi_io";
0113 assigned-clocks = <&clks 13>;
0114 assigned-clock-parents = <&clks 10>;
0115 dmas = <&dma_apbh 4>;
0116 dma-names = "rx-tx";
0117 status = "disabled";
0118 };
0119
0120 ssp0: spi@80010000 {
0121 #address-cells = <1>;
0122 #size-cells = <0>;
0123 reg = <0x80010000 0x2000>;
0124 interrupts = <96>;
0125 clocks = <&clks 46>;
0126 dmas = <&dma_apbh 0>;
0127 dma-names = "rx-tx";
0128 status = "disabled";
0129 };
0130
0131 ssp1: spi@80012000 {
0132 #address-cells = <1>;
0133 #size-cells = <0>;
0134 reg = <0x80012000 0x2000>;
0135 interrupts = <97>;
0136 clocks = <&clks 47>;
0137 dmas = <&dma_apbh 1>;
0138 dma-names = "rx-tx";
0139 status = "disabled";
0140 };
0141
0142 ssp2: spi@80014000 {
0143 #address-cells = <1>;
0144 #size-cells = <0>;
0145 reg = <0x80014000 0x2000>;
0146 interrupts = <98>;
0147 clocks = <&clks 48>;
0148 dmas = <&dma_apbh 2>;
0149 dma-names = "rx-tx";
0150 status = "disabled";
0151 };
0152
0153 ssp3: spi@80016000 {
0154 #address-cells = <1>;
0155 #size-cells = <0>;
0156 reg = <0x80016000 0x2000>;
0157 interrupts = <99>;
0158 clocks = <&clks 49>;
0159 dmas = <&dma_apbh 3>;
0160 dma-names = "rx-tx";
0161 status = "disabled";
0162 };
0163
0164 pinctrl: pinctrl@80018000 {
0165 #address-cells = <1>;
0166 #size-cells = <0>;
0167 compatible = "fsl,imx28-pinctrl", "simple-bus";
0168 reg = <0x80018000 0x2000>;
0169
0170 gpio0: gpio@0 {
0171 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
0172 reg = <0>;
0173 interrupts = <127>;
0174 gpio-controller;
0175 #gpio-cells = <2>;
0176 interrupt-controller;
0177 #interrupt-cells = <2>;
0178 };
0179
0180 gpio1: gpio@1 {
0181 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
0182 reg = <1>;
0183 interrupts = <126>;
0184 gpio-controller;
0185 #gpio-cells = <2>;
0186 interrupt-controller;
0187 #interrupt-cells = <2>;
0188 };
0189
0190 gpio2: gpio@2 {
0191 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
0192 reg = <2>;
0193 interrupts = <125>;
0194 gpio-controller;
0195 #gpio-cells = <2>;
0196 interrupt-controller;
0197 #interrupt-cells = <2>;
0198 };
0199
0200 gpio3: gpio@3 {
0201 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
0202 reg = <3>;
0203 interrupts = <124>;
0204 gpio-controller;
0205 #gpio-cells = <2>;
0206 interrupt-controller;
0207 #interrupt-cells = <2>;
0208 };
0209
0210 gpio4: gpio@4 {
0211 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
0212 reg = <4>;
0213 interrupts = <123>;
0214 gpio-controller;
0215 #gpio-cells = <2>;
0216 interrupt-controller;
0217 #interrupt-cells = <2>;
0218 };
0219
0220 duart_pins_a: duart@0 {
0221 reg = <0>;
0222 fsl,pinmux-ids = <
0223 MX28_PAD_PWM0__DUART_RX
0224 MX28_PAD_PWM1__DUART_TX
0225 >;
0226 fsl,drive-strength = <MXS_DRIVE_4mA>;
0227 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0228 fsl,pull-up = <MXS_PULL_DISABLE>;
0229 };
0230
0231 duart_pins_b: duart@1 {
0232 reg = <1>;
0233 fsl,pinmux-ids = <
0234 MX28_PAD_AUART0_CTS__DUART_RX
0235 MX28_PAD_AUART0_RTS__DUART_TX
0236 >;
0237 fsl,drive-strength = <MXS_DRIVE_4mA>;
0238 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0239 fsl,pull-up = <MXS_PULL_DISABLE>;
0240 };
0241
0242 duart_4pins_a: duart-4pins@0 {
0243 reg = <0>;
0244 fsl,pinmux-ids = <
0245 MX28_PAD_AUART0_CTS__DUART_RX
0246 MX28_PAD_AUART0_RTS__DUART_TX
0247 MX28_PAD_AUART0_RX__DUART_CTS
0248 MX28_PAD_AUART0_TX__DUART_RTS
0249 >;
0250 fsl,drive-strength = <MXS_DRIVE_4mA>;
0251 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0252 fsl,pull-up = <MXS_PULL_DISABLE>;
0253 };
0254
0255 gpmi_pins_a: gpmi-nand@0 {
0256 reg = <0>;
0257 fsl,pinmux-ids = <
0258 MX28_PAD_GPMI_D00__GPMI_D0
0259 MX28_PAD_GPMI_D01__GPMI_D1
0260 MX28_PAD_GPMI_D02__GPMI_D2
0261 MX28_PAD_GPMI_D03__GPMI_D3
0262 MX28_PAD_GPMI_D04__GPMI_D4
0263 MX28_PAD_GPMI_D05__GPMI_D5
0264 MX28_PAD_GPMI_D06__GPMI_D6
0265 MX28_PAD_GPMI_D07__GPMI_D7
0266 MX28_PAD_GPMI_CE0N__GPMI_CE0N
0267 MX28_PAD_GPMI_RDY0__GPMI_READY0
0268 MX28_PAD_GPMI_RDN__GPMI_RDN
0269 MX28_PAD_GPMI_WRN__GPMI_WRN
0270 MX28_PAD_GPMI_ALE__GPMI_ALE
0271 MX28_PAD_GPMI_CLE__GPMI_CLE
0272 MX28_PAD_GPMI_RESETN__GPMI_RESETN
0273 >;
0274 fsl,drive-strength = <MXS_DRIVE_4mA>;
0275 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0276 fsl,pull-up = <MXS_PULL_DISABLE>;
0277 };
0278
0279 gpmi_status_cfg: gpmi-status-cfg@0 {
0280 reg = <0>;
0281 fsl,pinmux-ids = <
0282 MX28_PAD_GPMI_RDN__GPMI_RDN
0283 MX28_PAD_GPMI_WRN__GPMI_WRN
0284 MX28_PAD_GPMI_RESETN__GPMI_RESETN
0285 >;
0286 fsl,drive-strength = <MXS_DRIVE_12mA>;
0287 };
0288
0289 auart0_pins_a: auart0@0 {
0290 reg = <0>;
0291 fsl,pinmux-ids = <
0292 MX28_PAD_AUART0_RX__AUART0_RX
0293 MX28_PAD_AUART0_TX__AUART0_TX
0294 MX28_PAD_AUART0_CTS__AUART0_CTS
0295 MX28_PAD_AUART0_RTS__AUART0_RTS
0296 >;
0297 fsl,drive-strength = <MXS_DRIVE_4mA>;
0298 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0299 fsl,pull-up = <MXS_PULL_DISABLE>;
0300 };
0301
0302 auart0_2pins_a: auart0-2pins@0 {
0303 reg = <0>;
0304 fsl,pinmux-ids = <
0305 MX28_PAD_AUART0_RX__AUART0_RX
0306 MX28_PAD_AUART0_TX__AUART0_TX
0307 >;
0308 fsl,drive-strength = <MXS_DRIVE_4mA>;
0309 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0310 fsl,pull-up = <MXS_PULL_DISABLE>;
0311 };
0312
0313 auart1_pins_a: auart1@0 {
0314 reg = <0>;
0315 fsl,pinmux-ids = <
0316 MX28_PAD_AUART1_RX__AUART1_RX
0317 MX28_PAD_AUART1_TX__AUART1_TX
0318 MX28_PAD_AUART1_CTS__AUART1_CTS
0319 MX28_PAD_AUART1_RTS__AUART1_RTS
0320 >;
0321 fsl,drive-strength = <MXS_DRIVE_4mA>;
0322 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0323 fsl,pull-up = <MXS_PULL_DISABLE>;
0324 };
0325
0326 auart1_2pins_a: auart1-2pins@0 {
0327 reg = <0>;
0328 fsl,pinmux-ids = <
0329 MX28_PAD_AUART1_RX__AUART1_RX
0330 MX28_PAD_AUART1_TX__AUART1_TX
0331 >;
0332 fsl,drive-strength = <MXS_DRIVE_4mA>;
0333 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0334 fsl,pull-up = <MXS_PULL_DISABLE>;
0335 };
0336
0337 auart2_2pins_a: auart2-2pins@0 {
0338 reg = <0>;
0339 fsl,pinmux-ids = <
0340 MX28_PAD_SSP2_SCK__AUART2_RX
0341 MX28_PAD_SSP2_MOSI__AUART2_TX
0342 >;
0343 fsl,drive-strength = <MXS_DRIVE_4mA>;
0344 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0345 fsl,pull-up = <MXS_PULL_DISABLE>;
0346 };
0347
0348 auart2_2pins_b: auart2-2pins@1 {
0349 reg = <1>;
0350 fsl,pinmux-ids = <
0351 MX28_PAD_AUART2_RX__AUART2_RX
0352 MX28_PAD_AUART2_TX__AUART2_TX
0353 >;
0354 fsl,drive-strength = <MXS_DRIVE_4mA>;
0355 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0356 fsl,pull-up = <MXS_PULL_DISABLE>;
0357 };
0358
0359 auart2_pins_a: auart2-pins@0 {
0360 reg = <0>;
0361 fsl,pinmux-ids = <
0362 MX28_PAD_AUART2_RX__AUART2_RX
0363 MX28_PAD_AUART2_TX__AUART2_TX
0364 MX28_PAD_AUART2_CTS__AUART2_CTS
0365 MX28_PAD_AUART2_RTS__AUART2_RTS
0366 >;
0367 fsl,drive-strength = <MXS_DRIVE_4mA>;
0368 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0369 fsl,pull-up = <MXS_PULL_DISABLE>;
0370 };
0371
0372 auart3_pins_a: auart3@0 {
0373 reg = <0>;
0374 fsl,pinmux-ids = <
0375 MX28_PAD_AUART3_RX__AUART3_RX
0376 MX28_PAD_AUART3_TX__AUART3_TX
0377 MX28_PAD_AUART3_CTS__AUART3_CTS
0378 MX28_PAD_AUART3_RTS__AUART3_RTS
0379 >;
0380 fsl,drive-strength = <MXS_DRIVE_4mA>;
0381 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0382 fsl,pull-up = <MXS_PULL_DISABLE>;
0383 };
0384
0385 auart3_2pins_a: auart3-2pins@0 {
0386 reg = <0>;
0387 fsl,pinmux-ids = <
0388 MX28_PAD_SSP2_MISO__AUART3_RX
0389 MX28_PAD_SSP2_SS0__AUART3_TX
0390 >;
0391 fsl,drive-strength = <MXS_DRIVE_4mA>;
0392 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0393 fsl,pull-up = <MXS_PULL_DISABLE>;
0394 };
0395
0396 auart3_2pins_b: auart3-2pins@1 {
0397 reg = <1>;
0398 fsl,pinmux-ids = <
0399 MX28_PAD_AUART3_RX__AUART3_RX
0400 MX28_PAD_AUART3_TX__AUART3_TX
0401 >;
0402 fsl,drive-strength = <MXS_DRIVE_4mA>;
0403 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0404 fsl,pull-up = <MXS_PULL_DISABLE>;
0405 };
0406
0407 auart4_2pins_a: auart4@0 {
0408 reg = <0>;
0409 fsl,pinmux-ids = <
0410 MX28_PAD_SSP3_SCK__AUART4_TX
0411 MX28_PAD_SSP3_MOSI__AUART4_RX
0412 >;
0413 fsl,drive-strength = <MXS_DRIVE_4mA>;
0414 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0415 fsl,pull-up = <MXS_PULL_DISABLE>;
0416 };
0417
0418 auart4_2pins_b: auart4@1 {
0419 reg = <1>;
0420 fsl,pinmux-ids = <
0421 MX28_PAD_AUART0_CTS__AUART4_RX
0422 MX28_PAD_AUART0_RTS__AUART4_TX
0423 >;
0424 fsl,drive-strength = <MXS_DRIVE_4mA>;
0425 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0426 fsl,pull-up = <MXS_PULL_DISABLE>;
0427 };
0428
0429 mac0_pins_a: mac0@0 {
0430 reg = <0>;
0431 fsl,pinmux-ids = <
0432 MX28_PAD_ENET0_MDC__ENET0_MDC
0433 MX28_PAD_ENET0_MDIO__ENET0_MDIO
0434 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
0435 MX28_PAD_ENET0_RXD0__ENET0_RXD0
0436 MX28_PAD_ENET0_RXD1__ENET0_RXD1
0437 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
0438 MX28_PAD_ENET0_TXD0__ENET0_TXD0
0439 MX28_PAD_ENET0_TXD1__ENET0_TXD1
0440 MX28_PAD_ENET_CLK__CLKCTRL_ENET
0441 >;
0442 fsl,drive-strength = <MXS_DRIVE_8mA>;
0443 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0444 fsl,pull-up = <MXS_PULL_ENABLE>;
0445 };
0446
0447 mac0_pins_b: mac0@1 {
0448 reg = <1>;
0449 fsl,pinmux-ids = <
0450 MX28_PAD_ENET0_MDC__ENET0_MDC
0451 MX28_PAD_ENET0_MDIO__ENET0_MDIO
0452 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
0453 MX28_PAD_ENET0_RXD0__ENET0_RXD0
0454 MX28_PAD_ENET0_RXD1__ENET0_RXD1
0455 MX28_PAD_ENET0_RXD2__ENET0_RXD2
0456 MX28_PAD_ENET0_RXD3__ENET0_RXD3
0457 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
0458 MX28_PAD_ENET0_TXD0__ENET0_TXD0
0459 MX28_PAD_ENET0_TXD1__ENET0_TXD1
0460 MX28_PAD_ENET0_TXD2__ENET0_TXD2
0461 MX28_PAD_ENET0_TXD3__ENET0_TXD3
0462 MX28_PAD_ENET_CLK__CLKCTRL_ENET
0463 MX28_PAD_ENET0_COL__ENET0_COL
0464 MX28_PAD_ENET0_CRS__ENET0_CRS
0465 MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK
0466 MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK
0467 >;
0468 fsl,drive-strength = <MXS_DRIVE_8mA>;
0469 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0470 fsl,pull-up = <MXS_PULL_ENABLE>;
0471 };
0472
0473 mac1_pins_a: mac1@0 {
0474 reg = <0>;
0475 fsl,pinmux-ids = <
0476 MX28_PAD_ENET0_CRS__ENET1_RX_EN
0477 MX28_PAD_ENET0_RXD2__ENET1_RXD0
0478 MX28_PAD_ENET0_RXD3__ENET1_RXD1
0479 MX28_PAD_ENET0_COL__ENET1_TX_EN
0480 MX28_PAD_ENET0_TXD2__ENET1_TXD0
0481 MX28_PAD_ENET0_TXD3__ENET1_TXD1
0482 >;
0483 fsl,drive-strength = <MXS_DRIVE_8mA>;
0484 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0485 fsl,pull-up = <MXS_PULL_ENABLE>;
0486 };
0487
0488 mmc0_8bit_pins_a: mmc0-8bit@0 {
0489 reg = <0>;
0490 fsl,pinmux-ids = <
0491 MX28_PAD_SSP0_DATA0__SSP0_D0
0492 MX28_PAD_SSP0_DATA1__SSP0_D1
0493 MX28_PAD_SSP0_DATA2__SSP0_D2
0494 MX28_PAD_SSP0_DATA3__SSP0_D3
0495 MX28_PAD_SSP0_DATA4__SSP0_D4
0496 MX28_PAD_SSP0_DATA5__SSP0_D5
0497 MX28_PAD_SSP0_DATA6__SSP0_D6
0498 MX28_PAD_SSP0_DATA7__SSP0_D7
0499 MX28_PAD_SSP0_CMD__SSP0_CMD
0500 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
0501 MX28_PAD_SSP0_SCK__SSP0_SCK
0502 >;
0503 fsl,drive-strength = <MXS_DRIVE_8mA>;
0504 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0505 fsl,pull-up = <MXS_PULL_ENABLE>;
0506 };
0507
0508 mmc0_4bit_pins_a: mmc0-4bit@0 {
0509 reg = <0>;
0510 fsl,pinmux-ids = <
0511 MX28_PAD_SSP0_DATA0__SSP0_D0
0512 MX28_PAD_SSP0_DATA1__SSP0_D1
0513 MX28_PAD_SSP0_DATA2__SSP0_D2
0514 MX28_PAD_SSP0_DATA3__SSP0_D3
0515 MX28_PAD_SSP0_CMD__SSP0_CMD
0516 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
0517 MX28_PAD_SSP0_SCK__SSP0_SCK
0518 >;
0519 fsl,drive-strength = <MXS_DRIVE_8mA>;
0520 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0521 fsl,pull-up = <MXS_PULL_ENABLE>;
0522 };
0523
0524 mmc0_cd_cfg: mmc0-cd-cfg@0 {
0525 reg = <0>;
0526 fsl,pinmux-ids = <
0527 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
0528 >;
0529 fsl,pull-up = <MXS_PULL_DISABLE>;
0530 };
0531
0532 mmc0_sck_cfg: mmc0-sck-cfg@0 {
0533 reg = <0>;
0534 fsl,pinmux-ids = <
0535 MX28_PAD_SSP0_SCK__SSP0_SCK
0536 >;
0537 fsl,drive-strength = <MXS_DRIVE_12mA>;
0538 fsl,pull-up = <MXS_PULL_DISABLE>;
0539 };
0540
0541 mmc1_4bit_pins_a: mmc1-4bit@0 {
0542 reg = <0>;
0543 fsl,pinmux-ids = <
0544 MX28_PAD_GPMI_D00__SSP1_D0
0545 MX28_PAD_GPMI_D01__SSP1_D1
0546 MX28_PAD_GPMI_D02__SSP1_D2
0547 MX28_PAD_GPMI_D03__SSP1_D3
0548 MX28_PAD_GPMI_RDY1__SSP1_CMD
0549 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
0550 MX28_PAD_GPMI_WRN__SSP1_SCK
0551 >;
0552 fsl,drive-strength = <MXS_DRIVE_8mA>;
0553 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0554 fsl,pull-up = <MXS_PULL_ENABLE>;
0555 };
0556
0557 mmc1_cd_cfg: mmc1-cd-cfg@0 {
0558 reg = <0>;
0559 fsl,pinmux-ids = <
0560 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
0561 >;
0562 fsl,pull-up = <MXS_PULL_DISABLE>;
0563 };
0564
0565 mmc1_sck_cfg: mmc1-sck-cfg@0 {
0566 reg = <0>;
0567 fsl,pinmux-ids = <
0568 MX28_PAD_GPMI_WRN__SSP1_SCK
0569 >;
0570 fsl,drive-strength = <MXS_DRIVE_12mA>;
0571 fsl,pull-up = <MXS_PULL_DISABLE>;
0572 };
0573
0574
0575 mmc2_4bit_pins_a: mmc2-4bit@0 {
0576 reg = <0>;
0577 fsl,pinmux-ids = <
0578 MX28_PAD_SSP0_DATA4__SSP2_D0
0579 MX28_PAD_SSP1_SCK__SSP2_D1
0580 MX28_PAD_SSP1_CMD__SSP2_D2
0581 MX28_PAD_SSP0_DATA5__SSP2_D3
0582 MX28_PAD_SSP0_DATA6__SSP2_CMD
0583 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
0584 MX28_PAD_SSP0_DATA7__SSP2_SCK
0585 >;
0586 fsl,drive-strength = <MXS_DRIVE_8mA>;
0587 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0588 fsl,pull-up = <MXS_PULL_ENABLE>;
0589 };
0590
0591 mmc2_4bit_pins_b: mmc2-4bit@1 {
0592 reg = <1>;
0593 fsl,pinmux-ids = <
0594 MX28_PAD_SSP2_SCK__SSP2_SCK
0595 MX28_PAD_SSP2_MOSI__SSP2_CMD
0596 MX28_PAD_SSP2_MISO__SSP2_D0
0597 MX28_PAD_SSP2_SS0__SSP2_D3
0598 MX28_PAD_SSP2_SS1__SSP2_D1
0599 MX28_PAD_SSP2_SS2__SSP2_D2
0600 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
0601 >;
0602 fsl,drive-strength = <MXS_DRIVE_8mA>;
0603 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0604 fsl,pull-up = <MXS_PULL_ENABLE>;
0605 };
0606
0607 mmc2_cd_cfg: mmc2-cd-cfg@0 {
0608 reg = <0>;
0609 fsl,pinmux-ids = <
0610 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
0611 >;
0612 fsl,pull-up = <MXS_PULL_DISABLE>;
0613 };
0614
0615 mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
0616 reg = <0>;
0617 fsl,pinmux-ids = <
0618 MX28_PAD_SSP0_DATA7__SSP2_SCK
0619 >;
0620 fsl,drive-strength = <MXS_DRIVE_12mA>;
0621 fsl,pull-up = <MXS_PULL_DISABLE>;
0622 };
0623
0624 mmc2_sck_cfg_b: mmc2-sck-cfg@1 {
0625 reg = <1>;
0626 fsl,pinmux-ids = <
0627 MX28_PAD_SSP2_SCK__SSP2_SCK
0628 >;
0629 fsl,drive-strength = <MXS_DRIVE_12mA>;
0630 fsl,pull-up = <MXS_PULL_DISABLE>;
0631 };
0632
0633 i2c0_pins_a: i2c0@0 {
0634 reg = <0>;
0635 fsl,pinmux-ids = <
0636 MX28_PAD_I2C0_SCL__I2C0_SCL
0637 MX28_PAD_I2C0_SDA__I2C0_SDA
0638 >;
0639 fsl,drive-strength = <MXS_DRIVE_8mA>;
0640 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0641 fsl,pull-up = <MXS_PULL_ENABLE>;
0642 };
0643
0644 i2c0_pins_b: i2c0@1 {
0645 reg = <1>;
0646 fsl,pinmux-ids = <
0647 MX28_PAD_AUART0_RX__I2C0_SCL
0648 MX28_PAD_AUART0_TX__I2C0_SDA
0649 >;
0650 fsl,drive-strength = <MXS_DRIVE_8mA>;
0651 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0652 fsl,pull-up = <MXS_PULL_ENABLE>;
0653 };
0654
0655 i2c1_pins_a: i2c1@0 {
0656 reg = <0>;
0657 fsl,pinmux-ids = <
0658 MX28_PAD_PWM0__I2C1_SCL
0659 MX28_PAD_PWM1__I2C1_SDA
0660 >;
0661 fsl,drive-strength = <MXS_DRIVE_8mA>;
0662 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0663 fsl,pull-up = <MXS_PULL_ENABLE>;
0664 };
0665
0666 i2c1_pins_b: i2c1@1 {
0667 reg = <1>;
0668 fsl,pinmux-ids = <
0669 MX28_PAD_AUART2_CTS__I2C1_SCL
0670 MX28_PAD_AUART2_RTS__I2C1_SDA
0671 >;
0672 fsl,drive-strength = <MXS_DRIVE_8mA>;
0673 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0674 fsl,pull-up = <MXS_PULL_ENABLE>;
0675 };
0676
0677 saif0_pins_a: saif0@0 {
0678 reg = <0>;
0679 fsl,pinmux-ids = <
0680 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
0681 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
0682 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
0683 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
0684 >;
0685 fsl,drive-strength = <MXS_DRIVE_12mA>;
0686 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0687 fsl,pull-up = <MXS_PULL_ENABLE>;
0688 };
0689
0690 saif0_pins_b: saif0@1 {
0691 reg = <1>;
0692 fsl,pinmux-ids = <
0693 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
0694 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
0695 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
0696 >;
0697 fsl,drive-strength = <MXS_DRIVE_12mA>;
0698 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0699 fsl,pull-up = <MXS_PULL_ENABLE>;
0700 };
0701
0702 saif1_pins_a: saif1@0 {
0703 reg = <0>;
0704 fsl,pinmux-ids = <
0705 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
0706 >;
0707 fsl,drive-strength = <MXS_DRIVE_12mA>;
0708 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0709 fsl,pull-up = <MXS_PULL_ENABLE>;
0710 };
0711
0712 pwm0_pins_a: pwm0@0 {
0713 reg = <0>;
0714 fsl,pinmux-ids = <
0715 MX28_PAD_PWM0__PWM_0
0716 >;
0717 fsl,drive-strength = <MXS_DRIVE_4mA>;
0718 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0719 fsl,pull-up = <MXS_PULL_DISABLE>;
0720 };
0721
0722 pwm2_pins_a: pwm2@0 {
0723 reg = <0>;
0724 fsl,pinmux-ids = <
0725 MX28_PAD_PWM2__PWM_2
0726 >;
0727 fsl,drive-strength = <MXS_DRIVE_4mA>;
0728 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0729 fsl,pull-up = <MXS_PULL_DISABLE>;
0730 };
0731
0732 pwm3_pins_a: pwm3@0 {
0733 reg = <0>;
0734 fsl,pinmux-ids = <
0735 MX28_PAD_PWM3__PWM_3
0736 >;
0737 fsl,drive-strength = <MXS_DRIVE_4mA>;
0738 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0739 fsl,pull-up = <MXS_PULL_DISABLE>;
0740 };
0741
0742 pwm3_pins_b: pwm3@1 {
0743 reg = <1>;
0744 fsl,pinmux-ids = <
0745 MX28_PAD_SAIF0_MCLK__PWM_3
0746 >;
0747 fsl,drive-strength = <MXS_DRIVE_4mA>;
0748 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0749 fsl,pull-up = <MXS_PULL_DISABLE>;
0750 };
0751
0752 pwm4_pins_a: pwm4@0 {
0753 reg = <0>;
0754 fsl,pinmux-ids = <
0755 MX28_PAD_PWM4__PWM_4
0756 >;
0757 fsl,drive-strength = <MXS_DRIVE_4mA>;
0758 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0759 fsl,pull-up = <MXS_PULL_DISABLE>;
0760 };
0761
0762 lcdif_24bit_pins_a: lcdif-24bit@0 {
0763 reg = <0>;
0764 fsl,pinmux-ids = <
0765 MX28_PAD_LCD_D00__LCD_D0
0766 MX28_PAD_LCD_D01__LCD_D1
0767 MX28_PAD_LCD_D02__LCD_D2
0768 MX28_PAD_LCD_D03__LCD_D3
0769 MX28_PAD_LCD_D04__LCD_D4
0770 MX28_PAD_LCD_D05__LCD_D5
0771 MX28_PAD_LCD_D06__LCD_D6
0772 MX28_PAD_LCD_D07__LCD_D7
0773 MX28_PAD_LCD_D08__LCD_D8
0774 MX28_PAD_LCD_D09__LCD_D9
0775 MX28_PAD_LCD_D10__LCD_D10
0776 MX28_PAD_LCD_D11__LCD_D11
0777 MX28_PAD_LCD_D12__LCD_D12
0778 MX28_PAD_LCD_D13__LCD_D13
0779 MX28_PAD_LCD_D14__LCD_D14
0780 MX28_PAD_LCD_D15__LCD_D15
0781 MX28_PAD_LCD_D16__LCD_D16
0782 MX28_PAD_LCD_D17__LCD_D17
0783 MX28_PAD_LCD_D18__LCD_D18
0784 MX28_PAD_LCD_D19__LCD_D19
0785 MX28_PAD_LCD_D20__LCD_D20
0786 MX28_PAD_LCD_D21__LCD_D21
0787 MX28_PAD_LCD_D22__LCD_D22
0788 MX28_PAD_LCD_D23__LCD_D23
0789 >;
0790 fsl,drive-strength = <MXS_DRIVE_4mA>;
0791 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0792 fsl,pull-up = <MXS_PULL_DISABLE>;
0793 };
0794
0795 lcdif_18bit_pins_a: lcdif-18bit@0 {
0796 reg = <0>;
0797 fsl,pinmux-ids = <
0798 MX28_PAD_LCD_D00__LCD_D0
0799 MX28_PAD_LCD_D01__LCD_D1
0800 MX28_PAD_LCD_D02__LCD_D2
0801 MX28_PAD_LCD_D03__LCD_D3
0802 MX28_PAD_LCD_D04__LCD_D4
0803 MX28_PAD_LCD_D05__LCD_D5
0804 MX28_PAD_LCD_D06__LCD_D6
0805 MX28_PAD_LCD_D07__LCD_D7
0806 MX28_PAD_LCD_D08__LCD_D8
0807 MX28_PAD_LCD_D09__LCD_D9
0808 MX28_PAD_LCD_D10__LCD_D10
0809 MX28_PAD_LCD_D11__LCD_D11
0810 MX28_PAD_LCD_D12__LCD_D12
0811 MX28_PAD_LCD_D13__LCD_D13
0812 MX28_PAD_LCD_D14__LCD_D14
0813 MX28_PAD_LCD_D15__LCD_D15
0814 MX28_PAD_LCD_D16__LCD_D16
0815 MX28_PAD_LCD_D17__LCD_D17
0816 >;
0817 fsl,drive-strength = <MXS_DRIVE_4mA>;
0818 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0819 fsl,pull-up = <MXS_PULL_DISABLE>;
0820 };
0821
0822 lcdif_16bit_pins_a: lcdif-16bit@0 {
0823 reg = <0>;
0824 fsl,pinmux-ids = <
0825 MX28_PAD_LCD_D00__LCD_D0
0826 MX28_PAD_LCD_D01__LCD_D1
0827 MX28_PAD_LCD_D02__LCD_D2
0828 MX28_PAD_LCD_D03__LCD_D3
0829 MX28_PAD_LCD_D04__LCD_D4
0830 MX28_PAD_LCD_D05__LCD_D5
0831 MX28_PAD_LCD_D06__LCD_D6
0832 MX28_PAD_LCD_D07__LCD_D7
0833 MX28_PAD_LCD_D08__LCD_D8
0834 MX28_PAD_LCD_D09__LCD_D9
0835 MX28_PAD_LCD_D10__LCD_D10
0836 MX28_PAD_LCD_D11__LCD_D11
0837 MX28_PAD_LCD_D12__LCD_D12
0838 MX28_PAD_LCD_D13__LCD_D13
0839 MX28_PAD_LCD_D14__LCD_D14
0840 MX28_PAD_LCD_D15__LCD_D15
0841 >;
0842 fsl,drive-strength = <MXS_DRIVE_4mA>;
0843 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0844 fsl,pull-up = <MXS_PULL_DISABLE>;
0845 };
0846
0847 lcdif_sync_pins_a: lcdif-sync@0 {
0848 reg = <0>;
0849 fsl,pinmux-ids = <
0850 MX28_PAD_LCD_RS__LCD_DOTCLK
0851 MX28_PAD_LCD_CS__LCD_ENABLE
0852 MX28_PAD_LCD_RD_E__LCD_VSYNC
0853 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
0854 >;
0855 fsl,drive-strength = <MXS_DRIVE_4mA>;
0856 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0857 fsl,pull-up = <MXS_PULL_DISABLE>;
0858 };
0859
0860 can0_pins_a: can0@0 {
0861 reg = <0>;
0862 fsl,pinmux-ids = <
0863 MX28_PAD_GPMI_RDY2__CAN0_TX
0864 MX28_PAD_GPMI_RDY3__CAN0_RX
0865 >;
0866 fsl,drive-strength = <MXS_DRIVE_4mA>;
0867 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0868 fsl,pull-up = <MXS_PULL_DISABLE>;
0869 };
0870
0871 can1_pins_a: can1@0 {
0872 reg = <0>;
0873 fsl,pinmux-ids = <
0874 MX28_PAD_GPMI_CE2N__CAN1_TX
0875 MX28_PAD_GPMI_CE3N__CAN1_RX
0876 >;
0877 fsl,drive-strength = <MXS_DRIVE_4mA>;
0878 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0879 fsl,pull-up = <MXS_PULL_DISABLE>;
0880 };
0881
0882 spi2_pins_a: spi2@0 {
0883 reg = <0>;
0884 fsl,pinmux-ids = <
0885 MX28_PAD_SSP2_SCK__SSP2_SCK
0886 MX28_PAD_SSP2_MOSI__SSP2_CMD
0887 MX28_PAD_SSP2_MISO__SSP2_D0
0888 MX28_PAD_SSP2_SS0__SSP2_D3
0889 >;
0890 fsl,drive-strength = <MXS_DRIVE_8mA>;
0891 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0892 fsl,pull-up = <MXS_PULL_ENABLE>;
0893 };
0894
0895 spi3_pins_a: spi3@0 {
0896 reg = <0>;
0897 fsl,pinmux-ids = <
0898 MX28_PAD_AUART2_RX__SSP3_D4
0899 MX28_PAD_AUART2_TX__SSP3_D5
0900 MX28_PAD_SSP3_SCK__SSP3_SCK
0901 MX28_PAD_SSP3_MOSI__SSP3_CMD
0902 MX28_PAD_SSP3_MISO__SSP3_D0
0903 MX28_PAD_SSP3_SS0__SSP3_D3
0904 >;
0905 fsl,drive-strength = <MXS_DRIVE_8mA>;
0906 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0907 fsl,pull-up = <MXS_PULL_DISABLE>;
0908 };
0909
0910 spi3_pins_b: spi3@1 {
0911 reg = <1>;
0912 fsl,pinmux-ids = <
0913 MX28_PAD_SSP3_SCK__SSP3_SCK
0914 MX28_PAD_SSP3_MOSI__SSP3_CMD
0915 MX28_PAD_SSP3_MISO__SSP3_D0
0916 MX28_PAD_SSP3_SS0__SSP3_D3
0917 >;
0918 fsl,drive-strength = <MXS_DRIVE_8mA>;
0919 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0920 fsl,pull-up = <MXS_PULL_ENABLE>;
0921 };
0922
0923 usb0_pins_a: usb0@0 {
0924 reg = <0>;
0925 fsl,pinmux-ids = <
0926 MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
0927 >;
0928 fsl,drive-strength = <MXS_DRIVE_12mA>;
0929 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0930 fsl,pull-up = <MXS_PULL_DISABLE>;
0931 };
0932
0933 usb0_pins_b: usb0@1 {
0934 reg = <1>;
0935 fsl,pinmux-ids = <
0936 MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
0937 >;
0938 fsl,drive-strength = <MXS_DRIVE_12mA>;
0939 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0940 fsl,pull-up = <MXS_PULL_DISABLE>;
0941 };
0942
0943 usb1_pins_a: usb1@0 {
0944 reg = <0>;
0945 fsl,pinmux-ids = <
0946 MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
0947 >;
0948 fsl,drive-strength = <MXS_DRIVE_12mA>;
0949 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0950 fsl,pull-up = <MXS_PULL_DISABLE>;
0951 };
0952
0953 usb1_pins_b: usb1@1 {
0954 reg = <1>;
0955 fsl,pinmux-ids = <
0956 MX28_PAD_PWM2__USB1_OVERCURRENT
0957 >;
0958 fsl,drive-strength = <MXS_DRIVE_12mA>;
0959 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0960 fsl,pull-up = <MXS_PULL_DISABLE>;
0961 };
0962
0963 usb0_id_pins_a: usb0id@0 {
0964 reg = <0>;
0965 fsl,pinmux-ids = <
0966 MX28_PAD_AUART1_RTS__USB0_ID
0967 >;
0968 fsl,drive-strength = <MXS_DRIVE_12mA>;
0969 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0970 fsl,pull-up = <MXS_PULL_ENABLE>;
0971 };
0972
0973 usb0_id_pins_b: usb0id1@0 {
0974 reg = <0>;
0975 fsl,pinmux-ids = <
0976 MX28_PAD_PWM2__USB0_ID
0977 >;
0978 fsl,drive-strength = <MXS_DRIVE_12mA>;
0979 fsl,voltage = <MXS_VOLTAGE_HIGH>;
0980 fsl,pull-up = <MXS_PULL_ENABLE>;
0981 };
0982
0983 };
0984
0985 digctl: digctl@8001c000 {
0986 compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
0987 reg = <0x8001c000 0x2000>;
0988 interrupts = <89>;
0989 status = "disabled";
0990 };
0991
0992 etm: etm@80022000 {
0993 reg = <0x80022000 0x2000>;
0994 status = "disabled";
0995 };
0996
0997 dma_apbx: dma-apbx@80024000 {
0998 compatible = "fsl,imx28-dma-apbx";
0999 reg = <0x80024000 0x2000>;
1000 interrupts = <78 79 66 0
1001 80 81 68 69
1002 70 71 72 73
1003 74 75 76 77>;
1004 interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
1005 "saif0", "saif1", "i2c0", "i2c1",
1006 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
1007 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
1008 #dma-cells = <1>;
1009 dma-channels = <16>;
1010 clocks = <&clks 26>;
1011 };
1012
1013 dcp: crypto@80028000 {
1014 compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
1015 reg = <0x80028000 0x2000>;
1016 interrupts = <52 53 54>;
1017 status = "okay";
1018 };
1019
1020 pxp: pxp@8002a000 {
1021 reg = <0x8002a000 0x2000>;
1022 interrupts = <39>;
1023 status = "disabled";
1024 };
1025
1026 ocotp: efuse@8002c000 {
1027 compatible = "fsl,imx28-ocotp", "fsl,ocotp";
1028 #address-cells = <1>;
1029 #size-cells = <1>;
1030 reg = <0x8002c000 0x2000>;
1031 clocks = <&clks 25>;
1032 };
1033
1034 axi-ahb@8002e000 {
1035 reg = <0x8002e000 0x2000>;
1036 status = "disabled";
1037 };
1038
1039 lcdif: lcdif@80030000 {
1040 compatible = "fsl,imx28-lcdif";
1041 reg = <0x80030000 0x2000>;
1042 interrupts = <38>;
1043 clocks = <&clks 55>;
1044 dmas = <&dma_apbh 13>;
1045 dma-names = "rx";
1046 status = "disabled";
1047 };
1048
1049 can0: can@80032000 {
1050 compatible = "fsl,imx28-flexcan";
1051 reg = <0x80032000 0x2000>;
1052 interrupts = <8>;
1053 clocks = <&clks 58>, <&clks 58>;
1054 clock-names = "ipg", "per";
1055 status = "disabled";
1056 };
1057
1058 can1: can@80034000 {
1059 compatible = "fsl,imx28-flexcan";
1060 reg = <0x80034000 0x2000>;
1061 interrupts = <9>;
1062 clocks = <&clks 59>, <&clks 59>;
1063 clock-names = "ipg", "per";
1064 status = "disabled";
1065 };
1066
1067 simdbg: simdbg@8003c000 {
1068 reg = <0x8003c000 0x200>;
1069 status = "disabled";
1070 };
1071
1072 simgpmisel: simgpmisel@8003c200 {
1073 reg = <0x8003c200 0x100>;
1074 status = "disabled";
1075 };
1076
1077 simsspsel: simsspsel@8003c300 {
1078 reg = <0x8003c300 0x100>;
1079 status = "disabled";
1080 };
1081
1082 simmemsel: simmemsel@8003c400 {
1083 reg = <0x8003c400 0x100>;
1084 status = "disabled";
1085 };
1086
1087 gpiomon: gpiomon@8003c500 {
1088 reg = <0x8003c500 0x100>;
1089 status = "disabled";
1090 };
1091
1092 simenet: simenet@8003c700 {
1093 reg = <0x8003c700 0x100>;
1094 status = "disabled";
1095 };
1096
1097 armjtag: armjtag@8003c800 {
1098 reg = <0x8003c800 0x100>;
1099 status = "disabled";
1100 };
1101 };
1102
1103 apbx@80040000 {
1104 compatible = "simple-bus";
1105 #address-cells = <1>;
1106 #size-cells = <1>;
1107 reg = <0x80040000 0x40000>;
1108 ranges;
1109
1110 clks: clkctrl@80040000 {
1111 compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
1112 reg = <0x80040000 0x2000>;
1113 #clock-cells = <1>;
1114 };
1115
1116 saif0: saif@80042000 {
1117 #sound-dai-cells = <0>;
1118 compatible = "fsl,imx28-saif";
1119 reg = <0x80042000 0x2000>;
1120 interrupts = <59>;
1121 #clock-cells = <0>;
1122 clocks = <&clks 53>;
1123 dmas = <&dma_apbx 4>;
1124 dma-names = "rx-tx";
1125 status = "disabled";
1126 };
1127
1128 power: power@80044000 {
1129 reg = <0x80044000 0x2000>;
1130 status = "disabled";
1131 };
1132
1133 saif1: saif@80046000 {
1134 #sound-dai-cells = <0>;
1135 compatible = "fsl,imx28-saif";
1136 reg = <0x80046000 0x2000>;
1137 interrupts = <58>;
1138 clocks = <&clks 54>;
1139 dmas = <&dma_apbx 5>;
1140 dma-names = "rx-tx";
1141 status = "disabled";
1142 };
1143
1144 lradc: lradc@80050000 {
1145 compatible = "fsl,imx28-lradc";
1146 reg = <0x80050000 0x2000>;
1147 interrupts = <10 14 15 16 17 18 19
1148 20 21 22 23 24 25>;
1149 status = "disabled";
1150 clocks = <&clks 41>;
1151 #io-channel-cells = <1>;
1152 };
1153
1154 spdif: spdif@80054000 {
1155 reg = <0x80054000 0x2000>;
1156 interrupts = <45>;
1157 dmas = <&dma_apbx 2>;
1158 dma-names = "tx";
1159 status = "disabled";
1160 };
1161
1162 mxs_rtc: rtc@80056000 {
1163 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
1164 reg = <0x80056000 0x2000>;
1165 interrupts = <29>;
1166 };
1167
1168 i2c0: i2c@80058000 {
1169 #address-cells = <1>;
1170 #size-cells = <0>;
1171 compatible = "fsl,imx28-i2c";
1172 reg = <0x80058000 0x2000>;
1173 interrupts = <111>;
1174 clock-frequency = <100000>;
1175 dmas = <&dma_apbx 6>;
1176 dma-names = "rx-tx";
1177 status = "disabled";
1178 };
1179
1180 i2c1: i2c@8005a000 {
1181 #address-cells = <1>;
1182 #size-cells = <0>;
1183 compatible = "fsl,imx28-i2c";
1184 reg = <0x8005a000 0x2000>;
1185 interrupts = <110>;
1186 clock-frequency = <100000>;
1187 dmas = <&dma_apbx 7>;
1188 dma-names = "rx-tx";
1189 status = "disabled";
1190 };
1191
1192 pwm: pwm@80064000 {
1193 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
1194 reg = <0x80064000 0x2000>;
1195 clocks = <&clks 44>;
1196 #pwm-cells = <2>;
1197 fsl,pwm-number = <8>;
1198 status = "disabled";
1199 };
1200
1201 timer: timrot@80068000 {
1202 compatible = "fsl,imx28-timrot", "fsl,timrot";
1203 reg = <0x80068000 0x2000>;
1204 interrupts = <48 49 50 51>;
1205 clocks = <&clks 26>;
1206 };
1207
1208 auart0: serial@8006a000 {
1209 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1210 reg = <0x8006a000 0x2000>;
1211 interrupts = <112>;
1212 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
1213 dma-names = "rx", "tx";
1214 clocks = <&clks 45>;
1215 status = "disabled";
1216 };
1217
1218 auart1: serial@8006c000 {
1219 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1220 reg = <0x8006c000 0x2000>;
1221 interrupts = <113>;
1222 dmas = <&dma_apbx 10>, <&dma_apbx 11>;
1223 dma-names = "rx", "tx";
1224 clocks = <&clks 45>;
1225 status = "disabled";
1226 };
1227
1228 auart2: serial@8006e000 {
1229 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1230 reg = <0x8006e000 0x2000>;
1231 interrupts = <114>;
1232 dmas = <&dma_apbx 12>, <&dma_apbx 13>;
1233 dma-names = "rx", "tx";
1234 clocks = <&clks 45>;
1235 status = "disabled";
1236 };
1237
1238 auart3: serial@80070000 {
1239 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1240 reg = <0x80070000 0x2000>;
1241 interrupts = <115>;
1242 dmas = <&dma_apbx 14>, <&dma_apbx 15>;
1243 dma-names = "rx", "tx";
1244 clocks = <&clks 45>;
1245 status = "disabled";
1246 };
1247
1248 auart4: serial@80072000 {
1249 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1250 reg = <0x80072000 0x2000>;
1251 interrupts = <116>;
1252 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1253 dma-names = "rx", "tx";
1254 clocks = <&clks 45>;
1255 status = "disabled";
1256 };
1257
1258 duart: serial@80074000 {
1259 compatible = "arm,pl011", "arm,primecell";
1260 reg = <0x80074000 0x1000>;
1261 interrupts = <47>;
1262 clocks = <&clks 45>, <&clks 26>;
1263 clock-names = "uart", "apb_pclk";
1264 status = "disabled";
1265 };
1266
1267 usbphy0: usbphy@8007c000 {
1268 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1269 reg = <0x8007c000 0x2000>;
1270 clocks = <&clks 62>;
1271 status = "disabled";
1272 };
1273
1274 usbphy1: usbphy@8007e000 {
1275 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1276 reg = <0x8007e000 0x2000>;
1277 clocks = <&clks 63>;
1278 status = "disabled";
1279 };
1280 };
1281 };
1282
1283 ahb@80080000 {
1284 compatible = "simple-bus";
1285 #address-cells = <1>;
1286 #size-cells = <1>;
1287 reg = <0x80080000 0x80000>;
1288 ranges;
1289
1290 usb0: usb@80080000 {
1291 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1292 reg = <0x80080000 0x10000>;
1293 interrupts = <93>;
1294 clocks = <&clks 60>;
1295 fsl,usbphy = <&usbphy0>;
1296 status = "disabled";
1297 };
1298
1299 usb1: usb@80090000 {
1300 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1301 reg = <0x80090000 0x10000>;
1302 interrupts = <92>;
1303 clocks = <&clks 61>;
1304 fsl,usbphy = <&usbphy1>;
1305 dr_mode = "host";
1306 status = "disabled";
1307 };
1308
1309 dflpt: dflpt@800c0000 {
1310 reg = <0x800c0000 0x10000>;
1311 status = "disabled";
1312 };
1313
1314 mac0: ethernet@800f0000 {
1315 compatible = "fsl,imx28-fec";
1316 reg = <0x800f0000 0x4000>;
1317 interrupts = <101>;
1318 clocks = <&clks 57>, <&clks 57>, <&clks 64>;
1319 clock-names = "ipg", "ahb", "enet_out";
1320 status = "disabled";
1321 };
1322
1323 mac1: ethernet@800f4000 {
1324 compatible = "fsl,imx28-fec";
1325 reg = <0x800f4000 0x4000>;
1326 interrupts = <102>;
1327 clocks = <&clks 57>, <&clks 57>;
1328 clock-names = "ipg", "ahb";
1329 status = "disabled";
1330 };
1331
1332 eth_switch: switch@800f8000 {
1333 reg = <0x800f8000 0x8000>;
1334 status = "disabled";
1335 };
1336 };
1337
1338 iio-hwmon {
1339 compatible = "iio-hwmon";
1340 io-channels = <&lradc 8>;
1341 };
1342 };
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