0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright 2012 Sascha Hauer, Pengutronix
0004 */
0005
0006 /dts-v1/;
0007 #include "imx27.dtsi"
0008
0009 / {
0010 model = "Phytec pcm038";
0011 compatible = "phytec,imx27-pcm038", "fsl,imx27";
0012
0013 memory@a0000000 {
0014 device_type = "memory";
0015 reg = <0xa0000000 0x08000000>;
0016 };
0017
0018 regulators {
0019 compatible = "simple-bus";
0020 #address-cells = <1>;
0021 #size-cells = <0>;
0022
0023 reg_3v3: regulator@0 {
0024 compatible = "regulator-fixed";
0025 reg = <0>;
0026 regulator-name = "3V3";
0027 regulator-min-microvolt = <3300000>;
0028 regulator-max-microvolt = <3300000>;
0029 };
0030
0031 reg_5v0: regulator@1 {
0032 compatible = "regulator-fixed";
0033 reg = <1>;
0034 regulator-name = "5V0";
0035 regulator-min-microvolt = <5000000>;
0036 regulator-max-microvolt = <5000000>;
0037 };
0038 };
0039
0040 usbphy {
0041 compatible = "simple-bus";
0042 #address-cells = <1>;
0043 #size-cells = <0>;
0044
0045 usbphy0: usbphy@0 {
0046 compatible = "usb-nop-xceiv";
0047 reg = <0>;
0048 vcc-supply = <&sw3_reg>;
0049 clocks = <&clks IMX27_CLK_DUMMY>;
0050 clock-names = "main_clk";
0051 #phy-cells = <0>;
0052 };
0053 };
0054 };
0055
0056 &audmux {
0057 status = "okay";
0058
0059 /* SSI0 <=> PINS_4 (MC13783 Audio) */
0060 ssi0 {
0061 fsl,audmux-port = <0>;
0062 fsl,port-config = <0xcb205000>;
0063 };
0064
0065 pins4 {
0066 fsl,audmux-port = <2>;
0067 fsl,port-config = <0x00001000>;
0068 };
0069 };
0070
0071 &cspi1 {
0072 pinctrl-names = "default";
0073 pinctrl-0 = <&pinctrl_cspi1>;
0074 cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
0075 status = "okay";
0076
0077 pmic: mc13783@0 {
0078 compatible = "fsl,mc13783";
0079 pinctrl-names = "default";
0080 pinctrl-0 = <&pinctrl_pmic>;
0081 reg = <0>;
0082 spi-cs-high;
0083 spi-max-frequency = <20000000>;
0084 interrupt-parent = <&gpio2>;
0085 interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
0086 fsl,mc13xxx-uses-adc;
0087 fsl,mc13xxx-uses-rtc;
0088
0089 pmicleds: leds {
0090 #address-cells = <1>;
0091 #size-cells = <0>;
0092 led-control = <0x001 0x000 0x000 0x000 0x000 0x000>;
0093 };
0094
0095 regulators {
0096 /* SW1A and SW1B joined operation */
0097 sw1_reg: sw1a {
0098 regulator-min-microvolt = <1200000>;
0099 regulator-max-microvolt = <1520000>;
0100 regulator-always-on;
0101 regulator-boot-on;
0102 };
0103
0104 /* SW2A and SW2B joined operation */
0105 sw2_reg: sw2a {
0106 regulator-min-microvolt = <1800000>;
0107 regulator-max-microvolt = <1800000>;
0108 regulator-always-on;
0109 regulator-boot-on;
0110 };
0111
0112 sw3_reg: sw3 {
0113 regulator-min-microvolt = <5000000>;
0114 regulator-max-microvolt = <5000000>;
0115 regulator-always-on;
0116 regulator-boot-on;
0117 };
0118
0119 vaudio_reg: vaudio {
0120 regulator-always-on;
0121 regulator-boot-on;
0122 };
0123
0124 violo_reg: violo {
0125 regulator-min-microvolt = <1800000>;
0126 regulator-max-microvolt = <1800000>;
0127 regulator-always-on;
0128 regulator-boot-on;
0129 };
0130
0131 viohi_reg: viohi {
0132 regulator-always-on;
0133 regulator-boot-on;
0134 };
0135
0136 vgen_reg: vgen {
0137 regulator-min-microvolt = <1500000>;
0138 regulator-max-microvolt = <1500000>;
0139 regulator-always-on;
0140 regulator-boot-on;
0141 };
0142
0143 vcam_reg: vcam {
0144 regulator-min-microvolt = <2800000>;
0145 regulator-max-microvolt = <2800000>;
0146 };
0147
0148 vrf1_reg: vrf1 {
0149 regulator-min-microvolt = <2775000>;
0150 regulator-max-microvolt = <2775000>;
0151 regulator-always-on;
0152 regulator-boot-on;
0153 };
0154
0155 vrf2_reg: vrf2 {
0156 regulator-min-microvolt = <2775000>;
0157 regulator-max-microvolt = <2775000>;
0158 regulator-always-on;
0159 regulator-boot-on;
0160 };
0161
0162 vmmc1_reg: vmmc1 {
0163 regulator-min-microvolt = <1600000>;
0164 regulator-max-microvolt = <3000000>;
0165 };
0166
0167 gpo1_reg: gpo1 { };
0168
0169 pwgt1spi_reg: pwgt1spi {
0170 regulator-always-on;
0171 };
0172 };
0173 };
0174 };
0175
0176 &fec {
0177 phy-mode = "mii";
0178 phy-reset-gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
0179 phy-supply = <®_3v3>;
0180 pinctrl-names = "default";
0181 pinctrl-0 = <&pinctrl_fec1>;
0182 status = "okay";
0183 };
0184
0185 &i2c2 {
0186 clock-frequency = <400000>;
0187 pinctrl-names = "default";
0188 pinctrl-0 = <&pinctrl_i2c2>;
0189 status = "okay";
0190
0191 at24@52 {
0192 compatible = "atmel,24c32";
0193 pagesize = <32>;
0194 reg = <0x52>;
0195 };
0196
0197 pcf8563@51 {
0198 compatible = "nxp,pcf8563";
0199 reg = <0x51>;
0200 };
0201
0202 lm75@4a {
0203 compatible = "national,lm75";
0204 reg = <0x4a>;
0205 };
0206 };
0207
0208 &iomuxc {
0209 imx27_phycore_som {
0210 pinctrl_cspi1: cspi1grp {
0211 fsl,pins = <
0212 MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
0213 MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0
0214 MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0
0215 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* SPI1 CS0 */
0216 >;
0217 };
0218
0219 pinctrl_fec1: fec1grp {
0220 fsl,pins = <
0221 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
0222 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
0223 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
0224 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
0225 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
0226 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
0227 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
0228 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
0229 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
0230 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
0231 MX27_PAD_ATA_DATA8__FEC_CRS 0x0
0232 MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
0233 MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
0234 MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
0235 MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
0236 MX27_PAD_ATA_DATA13__FEC_COL 0x0
0237 MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
0238 MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
0239 MX27_PAD_SSI3_TXDAT__GPIO3_30 0x0 /* FEC RST */
0240 >;
0241 };
0242
0243 pinctrl_i2c2: i2c2grp {
0244 fsl,pins = <
0245 MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
0246 MX27_PAD_I2C2_SCL__I2C2_SCL 0x0
0247 >;
0248 };
0249
0250 pinctrl_nfc: nfcgrp {
0251 fsl,pins = <
0252 MX27_PAD_NFRB__NFRB 0x0
0253 MX27_PAD_NFCLE__NFCLE 0x0
0254 MX27_PAD_NFWP_B__NFWP_B 0x0
0255 MX27_PAD_NFCE_B__NFCE_B 0x0
0256 MX27_PAD_NFALE__NFALE 0x0
0257 MX27_PAD_NFRE_B__NFRE_B 0x0
0258 MX27_PAD_NFWE_B__NFWE_B 0x0
0259 >;
0260 };
0261
0262 pinctrl_pmic: pmicgrp {
0263 fsl,pins = <
0264 MX27_PAD_USB_PWR__GPIO2_23 0x0 /* PMIC IRQ */
0265 >;
0266 };
0267
0268 pinctrl_ssi1: ssi1grp {
0269 fsl,pins = <
0270 MX27_PAD_SSI1_FS__SSI1_FS 0x0
0271 MX27_PAD_SSI1_RXDAT__SSI1_RXDAT 0x0
0272 MX27_PAD_SSI1_TXDAT__SSI1_TXDAT 0x0
0273 MX27_PAD_SSI1_CLK__SSI1_CLK 0x0
0274 >;
0275 };
0276
0277 pinctrl_usbotg: usbotggrp {
0278 fsl,pins = <
0279 MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
0280 MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
0281 MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
0282 MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
0283 MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
0284 MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
0285 MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
0286 MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
0287 MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
0288 MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
0289 MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
0290 MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
0291 >;
0292 };
0293 };
0294 };
0295
0296 &nfc {
0297 pinctrl-names = "default";
0298 pinctrl-0 = <&pinctrl_nfc>;
0299 nand-bus-width = <8>;
0300 nand-ecc-mode = "hw";
0301 nand-on-flash-bbt;
0302 status = "okay";
0303 };
0304
0305 &ssi1 {
0306 pinctrl-names = "default";
0307 pinctrl-0 = <&pinctrl_ssi1>;
0308 status = "okay";
0309 };
0310
0311 &usbotg {
0312 pinctrl-names = "default";
0313 pinctrl-0 = <&pinctrl_usbotg>;
0314 dr_mode = "otg";
0315 phy_type = "ulpi";
0316 fsl,usbphy = <&usbphy0>;
0317 vbus-supply = <&sw3_reg>;
0318 disable-over-current;
0319 status = "okay";
0320 };
0321
0322 &weim {
0323 status = "okay";
0324
0325 nor: nor@0,0 {
0326 compatible = "cfi-flash";
0327 reg = <0 0x00000000 0x02000000>;
0328 bank-width = <2>;
0329 linux,mtd-name = "physmap-flash.0";
0330 fsl,weim-cs-timing = <0x22c2cf00 0x75000d01 0x00000900>;
0331 #address-cells = <1>;
0332 #size-cells = <1>;
0333 };
0334
0335 sram: sram@1,0 {
0336 compatible = "mtd-ram";
0337 reg = <1 0x00000000 0x00800000>;
0338 bank-width = <2>;
0339 linux,mtd-name = "mtd-ram.0";
0340 fsl,weim-cs-timing = <0x0000d843 0x22252521 0x22220a00>;
0341 #address-cells = <1>;
0342 #size-cells = <1>;
0343 };
0344 };
