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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
0004  */
0005 
0006 /dts-v1/;
0007 #include "imx27.dtsi"
0008 
0009 / {
0010         model = "Eukrea CPUIMX27";
0011         compatible = "eukrea,cpuimx27", "fsl,imx27";
0012 
0013         memory@a0000000 {
0014                 device_type = "memory";
0015                 reg = <0xa0000000 0x04000000>;
0016         };
0017 
0018         clk14745600: clk-uart {
0019                 compatible = "fixed-clock";
0020                 #clock-cells = <0>;
0021                 clock-frequency = <14745600>;
0022         };
0023 };
0024 
0025 &fec {
0026         pinctrl-names = "default";
0027         pinctrl-0 = <&pinctrl_fec>;
0028         status = "okay";
0029 };
0030 
0031 &i2c1 {
0032         pinctrl-names = "default";
0033         pinctrl-0 = <&pinctrl_i2c1>;
0034         status = "okay";
0035 
0036         pcf8563@51 {
0037                 compatible = "nxp,pcf8563";
0038                 reg = <0x51>;
0039         };
0040 };
0041 
0042 &nfc {
0043         pinctrl-names = "default";
0044         pinctrl-0 = <&pinctrl_nfc>;
0045         nand-bus-width = <8>;
0046         nand-ecc-mode = "hw";
0047         nand-on-flash-bbt;
0048         status = "okay";
0049 };
0050 
0051 &owire {
0052         pinctrl-names = "default";
0053         pinctrl-0 = <&pinctrl_owire>;
0054         status = "okay";
0055 };
0056 
0057 &sdhci2 {
0058         pinctrl-names = "default";
0059         pinctrl-0 = <&pinctrl_sdhc2>;
0060         bus-width = <4>;
0061         non-removable;
0062         status = "okay";
0063 };
0064 
0065 &uart4 {
0066         pinctrl-names = "default";
0067         pinctrl-0 = <&pinctrl_uart4>;
0068         uart-has-rtscts;
0069         status = "okay";
0070 };
0071 
0072 &usbh2 {
0073         pinctrl-names = "default";
0074         pinctrl-0 = <&pinctrl_usbh2>;
0075         dr_mode = "host";
0076         phy_type = "ulpi";
0077         disable-over-current;
0078         status = "okay";
0079 };
0080 
0081 &usbotg {
0082         pinctrl-names = "default";
0083         pinctrl-0 = <&pinctrl_usbotg>;
0084         dr_mode = "otg";
0085         phy_type = "ulpi";
0086         disable-over-current;
0087         status = "okay";
0088 };
0089 
0090 &weim {
0091         status = "okay";
0092 
0093         nor: nor@0,0 {
0094                 #address-cells = <1>;
0095                 #size-cells = <1>;
0096                 compatible = "cfi-flash";
0097                 reg = <0 0x00000000 0x04000000>;
0098                 bank-width = <2>;
0099                 linux,mtd-name = "physmap-flash.0";
0100                 fsl,weim-cs-timing = <0x00008f03 0xa0330d01 0x002208c0>;
0101         };
0102 
0103         uart8250@3,200000 {
0104                 pinctrl-names = "default";
0105                 pinctrl-0 = <&pinctrl_uart8250_1>;
0106                 compatible = "ns8250";
0107                 clocks = <&clk14745600>;
0108                 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
0109                 interrupts = <&gpio2 23 IRQ_TYPE_LEVEL_LOW>;
0110                 reg = <3 0x200000 0x1000>;
0111                 reg-shift = <1>;
0112                 reg-io-width = <1>;
0113                 no-loopback-test;
0114         };
0115 
0116         uart8250@3,400000 {
0117                 pinctrl-names = "default";
0118                 pinctrl-0 = <&pinctrl_uart8250_2>;
0119                 compatible = "ns8250";
0120                 clocks = <&clk14745600>;
0121                 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
0122                 interrupts = <&gpio2 22 IRQ_TYPE_LEVEL_LOW>;
0123                 reg = <3 0x400000 0x1000>;
0124                 reg-shift = <1>;
0125                 reg-io-width = <1>;
0126                 no-loopback-test;
0127         };
0128 
0129         uart8250@3,800000 {
0130                 pinctrl-names = "default";
0131                 pinctrl-0 = <&pinctrl_uart8250_3>;
0132                 compatible = "ns8250";
0133                 clocks = <&clk14745600>;
0134                 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
0135                 interrupts = <&gpio2 27 IRQ_TYPE_LEVEL_LOW>;
0136                 reg = <3 0x800000 0x1000>;
0137                 reg-shift = <1>;
0138                 reg-io-width = <1>;
0139                 no-loopback-test;
0140         };
0141 
0142         uart8250@3,1000000 {
0143                 pinctrl-names = "default";
0144                 pinctrl-0 = <&pinctrl_uart8250_4>;
0145                 compatible = "ns8250";
0146                 clocks = <&clk14745600>;
0147                 fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
0148                 interrupts = <&gpio2 30 IRQ_TYPE_LEVEL_LOW>;
0149                 reg = <3 0x1000000 0x1000>;
0150                 reg-shift = <1>;
0151                 reg-io-width = <1>;
0152                 no-loopback-test;
0153         };
0154 };
0155 
0156 &iomuxc {
0157         imx27-eukrea-cpuimx27 {
0158                 pinctrl_fec: fecgrp {
0159                         fsl,pins = <
0160                                 MX27_PAD_SD3_CMD__FEC_TXD0              0x0
0161                                 MX27_PAD_SD3_CLK__FEC_TXD1              0x0
0162                                 MX27_PAD_ATA_DATA0__FEC_TXD2            0x0
0163                                 MX27_PAD_ATA_DATA1__FEC_TXD3            0x0
0164                                 MX27_PAD_ATA_DATA2__FEC_RX_ER           0x0
0165                                 MX27_PAD_ATA_DATA3__FEC_RXD1            0x0
0166                                 MX27_PAD_ATA_DATA4__FEC_RXD2            0x0
0167                                 MX27_PAD_ATA_DATA5__FEC_RXD3            0x0
0168                                 MX27_PAD_ATA_DATA6__FEC_MDIO            0x0
0169                                 MX27_PAD_ATA_DATA7__FEC_MDC             0x0
0170                                 MX27_PAD_ATA_DATA8__FEC_CRS             0x0
0171                                 MX27_PAD_ATA_DATA9__FEC_TX_CLK          0x0
0172                                 MX27_PAD_ATA_DATA10__FEC_RXD0           0x0
0173                                 MX27_PAD_ATA_DATA11__FEC_RX_DV          0x0
0174                                 MX27_PAD_ATA_DATA12__FEC_RX_CLK         0x0
0175                                 MX27_PAD_ATA_DATA13__FEC_COL            0x0
0176                                 MX27_PAD_ATA_DATA14__FEC_TX_ER          0x0
0177                                 MX27_PAD_ATA_DATA15__FEC_TX_EN          0x0
0178                         >;
0179                 };
0180 
0181                 pinctrl_i2c1: i2c1grp {
0182                         fsl,pins = <
0183                                 MX27_PAD_I2C_DATA__I2C_DATA             0x0
0184                                 MX27_PAD_I2C_CLK__I2C_CLK               0x0
0185                         >;
0186                 };
0187 
0188                 pinctrl_nfc: nfcgrp {
0189                         fsl,pins = <
0190                                 MX27_PAD_NFRB__NFRB                     0x0
0191                                 MX27_PAD_NFCLE__NFCLE                   0x0
0192                                 MX27_PAD_NFWP_B__NFWP_B                 0x0
0193                                 MX27_PAD_NFCE_B__NFCE_B                 0x0
0194                                 MX27_PAD_NFALE__NFALE                   0x0
0195                                 MX27_PAD_NFRE_B__NFRE_B                 0x0
0196                                 MX27_PAD_NFWE_B__NFWE_B                 0x0
0197                         >;
0198                 };
0199 
0200                 pinctrl_owire: owiregrp {
0201                         fsl,pins = <
0202                                 MX27_PAD_RTCK__OWIRE                    0x0
0203                         >;
0204                 };
0205 
0206                 pinctrl_sdhc2: sdhc2grp {
0207                         fsl,pins = <
0208                                 MX27_PAD_SD2_CLK__SD2_CLK               0x0
0209                                 MX27_PAD_SD2_CMD__SD2_CMD               0x0
0210                                 MX27_PAD_SD2_D0__SD2_D0                 0x0
0211                                 MX27_PAD_SD2_D1__SD2_D1                 0x0
0212                                 MX27_PAD_SD2_D2__SD2_D2                 0x0
0213                                 MX27_PAD_SD2_D3__SD2_D3                 0x0
0214                         >;
0215                 };
0216 
0217                 pinctrl_uart4: uart4grp {
0218                         fsl,pins = <
0219                                 MX27_PAD_USBH1_TXDM__UART4_TXD          0x0
0220                                 MX27_PAD_USBH1_RXDP__UART4_RXD          0x0
0221                                 MX27_PAD_USBH1_TXDP__UART4_CTS          0x0
0222                                 MX27_PAD_USBH1_FS__UART4_RTS            0x0
0223                         >;
0224                 };
0225 
0226                 pinctrl_uart8250_1: uart82501grp {
0227                         fsl,pins = <
0228                                 MX27_PAD_USB_PWR__GPIO2_23              0x0
0229                         >;
0230                 };
0231 
0232                 pinctrl_uart8250_2: uart82502grp {
0233                         fsl,pins = <
0234                                 MX27_PAD_USBH1_SUSP__GPIO2_22           0x0
0235                         >;
0236                 };
0237 
0238                 pinctrl_uart8250_3: uart82503grp {
0239                         fsl,pins = <
0240                                 MX27_PAD_USBH1_OE_B__GPIO2_27           0x0
0241                         >;
0242                 };
0243 
0244                 pinctrl_uart8250_4: uart82504grp {
0245                         fsl,pins = <
0246                                 MX27_PAD_USBH1_RXDM__GPIO2_30           0x0
0247                         >;
0248                 };
0249 
0250                 pinctrl_usbh2: usbh2grp {
0251                         fsl,pins = <
0252                                 MX27_PAD_USBH2_CLK__USBH2_CLK           0x0
0253                                 MX27_PAD_USBH2_DIR__USBH2_DIR           0x0
0254                                 MX27_PAD_USBH2_NXT__USBH2_NXT           0x0
0255                                 MX27_PAD_USBH2_STP__USBH2_STP           0x0
0256                                 MX27_PAD_CSPI2_SCLK__USBH2_DATA0        0x0
0257                                 MX27_PAD_CSPI2_MOSI__USBH2_DATA1        0x0
0258                                 MX27_PAD_CSPI2_MISO__USBH2_DATA2        0x0
0259                                 MX27_PAD_CSPI2_SS1__USBH2_DATA3         0x0
0260                                 MX27_PAD_CSPI2_SS2__USBH2_DATA4         0x0
0261                                 MX27_PAD_CSPI1_SS2__USBH2_DATA5         0x0
0262                                 MX27_PAD_CSPI2_SS0__USBH2_DATA6         0x0
0263                                 MX27_PAD_USBH2_DATA7__USBH2_DATA7       0x0
0264                         >;
0265                 };
0266 
0267                 pinctrl_usbotg: usbotggrp {
0268                         fsl,pins = <
0269                                 MX27_PAD_USBOTG_CLK__USBOTG_CLK         0x0
0270                                 MX27_PAD_USBOTG_DIR__USBOTG_DIR         0x0
0271                                 MX27_PAD_USBOTG_NXT__USBOTG_NXT         0x0
0272                                 MX27_PAD_USBOTG_STP__USBOTG_STP         0x0
0273                                 MX27_PAD_USBOTG_DATA0__USBOTG_DATA0     0x0
0274                                 MX27_PAD_USBOTG_DATA1__USBOTG_DATA1     0x0
0275                                 MX27_PAD_USBOTG_DATA2__USBOTG_DATA2     0x0
0276                                 MX27_PAD_USBOTG_DATA3__USBOTG_DATA3     0x0
0277                                 MX27_PAD_USBOTG_DATA4__USBOTG_DATA4     0x0
0278                                 MX27_PAD_USBOTG_DATA5__USBOTG_DATA5     0x0
0279                                 MX27_PAD_USBOTG_DATA6__USBOTG_DATA6     0x0
0280                                 MX27_PAD_USBOTG_DATA7__USBOTG_DATA7     0x0
0281                         >;
0282                 };
0283         };
0284 };