0001 // SPDX-License-Identifier: GPL-2.0+
0002 //
0003 // Copyright 2013 Freescale Semiconductor, Inc.
0004
0005 /dts-v1/;
0006 #include <dt-bindings/gpio/gpio.h>
0007 #include <dt-bindings/input/input.h>
0008 #include "imx25.dtsi"
0009
0010 / {
0011 model = "Freescale i.MX25 Product Development Kit";
0012 compatible = "fsl,imx25-pdk", "fsl,imx25";
0013
0014 memory@80000000 {
0015 device_type = "memory";
0016 reg = <0x80000000 0x4000000>;
0017 };
0018
0019 regulators {
0020 compatible = "simple-bus";
0021 #address-cells = <1>;
0022 #size-cells = <0>;
0023
0024 reg_fec_3v3: regulator@0 {
0025 compatible = "regulator-fixed";
0026 reg = <0>;
0027 regulator-name = "fec-3v3";
0028 regulator-min-microvolt = <3300000>;
0029 regulator-max-microvolt = <3300000>;
0030 gpio = <&gpio2 3 0>;
0031 enable-active-high;
0032 };
0033
0034 reg_2p5v: regulator@1 {
0035 compatible = "regulator-fixed";
0036 reg = <1>;
0037 regulator-name = "2P5V";
0038 regulator-min-microvolt = <2500000>;
0039 regulator-max-microvolt = <2500000>;
0040 };
0041
0042 reg_3p3v: regulator@2 {
0043 compatible = "regulator-fixed";
0044 reg = <2>;
0045 regulator-name = "3P3V";
0046 regulator-min-microvolt = <3300000>;
0047 regulator-max-microvolt = <3300000>;
0048 };
0049
0050 reg_can_3v3: regulator@3 {
0051 compatible = "regulator-fixed";
0052 reg = <3>;
0053 regulator-name = "can-3v3";
0054 regulator-min-microvolt = <3300000>;
0055 regulator-max-microvolt = <3300000>;
0056 gpio = <&gpio4 6 0>;
0057 };
0058 };
0059
0060 sound {
0061 compatible = "fsl,imx25-pdk-sgtl5000",
0062 "fsl,imx-audio-sgtl5000";
0063 model = "imx25-pdk-sgtl5000";
0064 ssi-controller = <&ssi1>;
0065 audio-codec = <&codec>;
0066 audio-routing =
0067 "MIC_IN", "Mic Jack",
0068 "Mic Jack", "Mic Bias",
0069 "Headphone Jack", "HP_OUT";
0070 mux-int-port = <1>;
0071 mux-ext-port = <4>;
0072 };
0073
0074 wvga: display {
0075 model = "CLAA057VC01CW";
0076 bits-per-pixel = <16>;
0077 fsl,pcr = <0xfa208b80>;
0078 bus-width = <18>;
0079 display-timings {
0080 native-mode = <&wvga_timings>;
0081 wvga_timings: 640x480 {
0082 hactive = <640>;
0083 vactive = <480>;
0084 hback-porch = <45>;
0085 hfront-porch = <114>;
0086 hsync-len = <1>;
0087 vback-porch = <33>;
0088 vfront-porch = <11>;
0089 vsync-len = <1>;
0090 clock-frequency = <25200000>;
0091 };
0092 };
0093 };
0094 };
0095
0096 &audmux {
0097 pinctrl-names = "default";
0098 pinctrl-0 = <&pinctrl_audmux>;
0099 status = "okay";
0100 };
0101
0102 &can1 {
0103 pinctrl-names = "default";
0104 pinctrl-0 = <&pinctrl_can1>;
0105 xceiver-supply = <®_can_3v3>;
0106 status = "okay";
0107 };
0108
0109 &esdhc1 {
0110 pinctrl-names = "default";
0111 pinctrl-0 = <&pinctrl_esdhc1>;
0112 cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
0113 wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
0114 status = "okay";
0115 };
0116
0117 &fec {
0118 phy-mode = "rmii";
0119 pinctrl-names = "default";
0120 pinctrl-0 = <&pinctrl_fec>;
0121 phy-supply = <®_fec_3v3>;
0122 phy-reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
0123 status = "okay";
0124 };
0125
0126 &i2c1 {
0127 clock-frequency = <100000>;
0128 pinctrl-names = "default";
0129 pinctrl-0 = <&pinctrl_i2c1>;
0130 status = "okay";
0131
0132 codec: sgtl5000@a {
0133 compatible = "fsl,sgtl5000";
0134 reg = <0x0a>;
0135 clocks = <&clks 129>;
0136 VDDA-supply = <®_2p5v>;
0137 VDDIO-supply = <®_3p3v>;
0138 };
0139 };
0140
0141 &iomuxc {
0142 imx25-pdk {
0143 pinctrl_audmux: audmuxgrp {
0144 fsl,pins = <
0145 MX25_PAD_RW__AUD4_TXFS 0xe0
0146 MX25_PAD_OE__AUD4_TXC 0xe0
0147 MX25_PAD_EB0__AUD4_TXD 0xe0
0148 MX25_PAD_EB1__AUD4_RXD 0xe0
0149 >;
0150 };
0151
0152 pinctrl_can1: can1grp {
0153 fsl,pins = <
0154 MX25_PAD_GPIO_A__CAN1_TX 0x0
0155 MX25_PAD_GPIO_B__CAN1_RX 0x0
0156 MX25_PAD_D14__GPIO_4_6 0x80000000
0157 >;
0158 };
0159
0160 pinctrl_esdhc1: esdhc1grp {
0161 fsl,pins = <
0162 MX25_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
0163 MX25_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
0164 MX25_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
0165 MX25_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
0166 MX25_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
0167 MX25_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
0168 MX25_PAD_A14__GPIO_2_0 0x80000000
0169 MX25_PAD_A15__GPIO_2_1 0x80000000
0170 >;
0171 };
0172
0173 pinctrl_fec: fecgrp {
0174 fsl,pins = <
0175 MX25_PAD_FEC_MDC__FEC_MDC 0x80000000
0176 MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0
0177 MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
0178 MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
0179 MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
0180 MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
0181 MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000
0182 MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
0183 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0
0184 MX25_PAD_A17__GPIO_2_3 0x80000000
0185 MX25_PAD_D12__GPIO_4_8 0x80000000
0186 >;
0187 };
0188
0189 pinctrl_i2c1: i2c1grp {
0190 fsl,pins = <
0191 MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000
0192 MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000
0193 >;
0194 };
0195
0196 pinctrl_kpp: kppgrp {
0197 fsl,pins = <
0198 MX25_PAD_KPP_ROW0__KPP_ROW0 0x80000000
0199 MX25_PAD_KPP_ROW1__KPP_ROW1 0x80000000
0200 MX25_PAD_KPP_ROW2__KPP_ROW2 0x80000000
0201 MX25_PAD_KPP_ROW3__KPP_ROW3 0x80000000
0202 MX25_PAD_KPP_COL0__KPP_COL0 0x80000000
0203 MX25_PAD_KPP_COL1__KPP_COL1 0x80000000
0204 MX25_PAD_KPP_COL2__KPP_COL2 0x80000000
0205 MX25_PAD_KPP_COL3__KPP_COL3 0x80000000
0206 >;
0207 };
0208
0209 pinctrl_lcd: lcdgrp {
0210 fsl,pins = <
0211 MX25_PAD_LD0__LD0 0xe0
0212 MX25_PAD_LD1__LD1 0xe0
0213 MX25_PAD_LD2__LD2 0xe0
0214 MX25_PAD_LD3__LD3 0xe0
0215 MX25_PAD_LD4__LD4 0xe0
0216 MX25_PAD_LD5__LD5 0xe0
0217 MX25_PAD_LD6__LD6 0xe0
0218 MX25_PAD_LD7__LD7 0xe0
0219 MX25_PAD_LD8__LD8 0xe0
0220 MX25_PAD_LD9__LD9 0xe0
0221 MX25_PAD_LD10__LD10 0xe0
0222 MX25_PAD_LD11__LD11 0xe0
0223 MX25_PAD_LD12__LD12 0xe0
0224 MX25_PAD_LD13__LD13 0xe0
0225 MX25_PAD_LD14__LD14 0xe0
0226 MX25_PAD_LD15__LD15 0xe0
0227 MX25_PAD_GPIO_E__LD16 0xe0
0228 MX25_PAD_GPIO_F__LD17 0xe0
0229 MX25_PAD_HSYNC__HSYNC 0xe0
0230 MX25_PAD_VSYNC__VSYNC 0xe0
0231 MX25_PAD_LSCLK__LSCLK 0xe0
0232 MX25_PAD_OE_ACD__OE_ACD 0xe0
0233 MX25_PAD_CONTRAST__CONTRAST 0xe0
0234 >;
0235 };
0236
0237 pinctrl_uart1: uart1grp {
0238 fsl,pins = <
0239 MX25_PAD_UART1_RTS__UART1_RTS 0xe0
0240 MX25_PAD_UART1_CTS__UART1_CTS 0xe0
0241 MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
0242 MX25_PAD_UART1_RXD__UART1_RXD 0xc0
0243 >;
0244 };
0245 };
0246 };
0247
0248 &lcdc {
0249 display = <&wvga>;
0250 fsl,lpccr = <0x00a903ff>;
0251 fsl,lscr1 = <0x00120300>;
0252 fsl,dmacr = <0x00020010>;
0253 pinctrl-names = "default";
0254 pinctrl-0 = <&pinctrl_lcd>;
0255 status = "okay";
0256 };
0257
0258 &nfc {
0259 nand-on-flash-bbt;
0260 status = "okay";
0261 };
0262
0263 &kpp {
0264 pinctrl-names = "default";
0265 pinctrl-0 = <&pinctrl_kpp>;
0266 linux,keymap = <
0267 MATRIX_KEY(0x0, 0x0, KEY_UP)
0268 MATRIX_KEY(0x0, 0x1, KEY_DOWN)
0269 MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN)
0270 MATRIX_KEY(0x0, 0x3, KEY_HOME)
0271 MATRIX_KEY(0x1, 0x0, KEY_RIGHT)
0272 MATRIX_KEY(0x1, 0x1, KEY_LEFT)
0273 MATRIX_KEY(0x1, 0x2, KEY_ENTER)
0274 MATRIX_KEY(0x1, 0x3, KEY_VOLUMEUP)
0275 MATRIX_KEY(0x2, 0x0, KEY_F6)
0276 MATRIX_KEY(0x2, 0x1, KEY_F8)
0277 MATRIX_KEY(0x2, 0x2, KEY_F9)
0278 MATRIX_KEY(0x2, 0x3, KEY_F10)
0279 MATRIX_KEY(0x3, 0x0, KEY_F1)
0280 MATRIX_KEY(0x3, 0x1, KEY_F2)
0281 MATRIX_KEY(0x3, 0x2, KEY_F3)
0282 MATRIX_KEY(0x3, 0x2, KEY_POWER)
0283 >;
0284 status = "okay";
0285 };
0286
0287 &ssi1 {
0288 status = "okay";
0289 };
0290
0291 &tsc {
0292 status = "okay";
0293 };
0294
0295 &tscadc {
0296 status = "okay";
0297 };
0298
0299 &uart1 {
0300 pinctrl-names = "default";
0301 pinctrl-0 = <&pinctrl_uart1>;
0302 uart-has-rtscts;
0303 status = "okay";
0304 };
0305
0306 &usbhost1 {
0307 status = "okay";
0308 };
0309
0310 &usbotg {
0311 external-vbus-divider;
0312 status = "okay";
0313 };
