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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright (C) 2012-2013 Linaro Ltd.
0004 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
0005 */
0006
0007 /dts-v1/;
0008
0009 #include "hi3620.dtsi"
0010
0011 / {
0012 model = "Hisilicon Hi4511 Development Board";
0013 compatible = "hisilicon,hi3620-hi4511";
0014
0015 chosen {
0016 bootargs = "root=/dev/ram0";
0017 stdout-path = "serial0:115200n8";
0018 };
0019
0020 memory@40000000 {
0021 device_type = "memory";
0022 reg = <0x40000000 0x20000000>;
0023 };
0024
0025 amba-bus {
0026 dual_timer0: dual_timer@800000 {
0027 status = "ok";
0028 };
0029
0030 uart0: serial@b00000 { /* console */
0031 pinctrl-names = "default", "sleep";
0032 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
0033 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
0034 status = "ok";
0035 };
0036
0037 uart1: serial@b01000 { /* modem */
0038 pinctrl-names = "default", "sleep";
0039 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
0040 pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
0041 status = "ok";
0042 };
0043
0044 uart2: serial@b02000 { /* audience */
0045 pinctrl-names = "default", "sleep";
0046 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
0047 pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
0048 status = "ok";
0049 };
0050
0051 uart3: serial@b03000 {
0052 pinctrl-names = "default", "sleep";
0053 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
0054 pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
0055 status = "ok";
0056 };
0057
0058 uart4: serial@b04000 {
0059 pinctrl-names = "default", "sleep";
0060 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
0061 pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
0062 status = "ok";
0063 };
0064
0065 pmx0: pinmux@803000 {
0066 pinctrl-names = "default";
0067 pinctrl-0 = <&board_pmx_pins>;
0068
0069 board_pmx_pins: board_pmx_pins {
0070 pinctrl-single,pins = <
0071 0x008 0x0 /* GPIO -- eFUSE_DOUT */
0072 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */
0073 >;
0074 };
0075 uart0_pmx_func: uart0_pmx_func {
0076 pinctrl-single,pins = <
0077 0x0f0 0x0
0078 0x0f4 0x0 /* UART0_RX & UART0_TX */
0079 >;
0080 };
0081 uart0_pmx_idle: uart0_pmx_idle {
0082 pinctrl-single,pins = <
0083 /*0x0f0 0x1*/ /* UART0_CTS & UART0_RTS */
0084 0x0f4 0x1 /* UART0_RX & UART0_TX */
0085 >;
0086 };
0087 uart1_pmx_func: uart1_pmx_func {
0088 pinctrl-single,pins = <
0089 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */
0090 0x0fc 0x0 /* UART1_RX & UART1_TX (IOMG62) */
0091 >;
0092 };
0093 uart1_pmx_idle: uart1_pmx_idle {
0094 pinctrl-single,pins = <
0095 0x0f8 0x1 /* GPIO (IOMG61) */
0096 0x0fc 0x1 /* GPIO (IOMG62) */
0097 >;
0098 };
0099 uart2_pmx_func: uart2_pmx_func {
0100 pinctrl-single,pins = <
0101 0x104 0x2 /* UART2_RXD (IOMG96) */
0102 0x108 0x2 /* UART2_TXD (IOMG64) */
0103 >;
0104 };
0105 uart2_pmx_idle: uart2_pmx_idle {
0106 pinctrl-single,pins = <
0107 0x104 0x1 /* GPIO (IOMG96) */
0108 0x108 0x1 /* GPIO (IOMG64) */
0109 >;
0110 };
0111 uart3_pmx_func: uart3_pmx_func {
0112 pinctrl-single,pins = <
0113 0x160 0x2 /* UART3_CTS & UART3_RTS (IOMG85) */
0114 0x164 0x2 /* UART3_RXD & UART3_TXD (IOMG86) */
0115 >;
0116 };
0117 uart3_pmx_idle: uart3_pmx_idle {
0118 pinctrl-single,pins = <
0119 0x160 0x1 /* GPIO (IOMG85) */
0120 0x164 0x1 /* GPIO (IOMG86) */
0121 >;
0122 };
0123 uart4_pmx_func: uart4_pmx_func {
0124 pinctrl-single,pins = <
0125 0x168 0x0 /* UART4_CTS & UART4_RTS (IOMG87) */
0126 0x16c 0x0 /* UART4_RXD (IOMG88) */
0127 0x170 0x0 /* UART4_TXD (IOMG93) */
0128 >;
0129 };
0130 uart4_pmx_idle: uart4_pmx_idle {
0131 pinctrl-single,pins = <
0132 0x168 0x1 /* GPIO (IOMG87) */
0133 0x16c 0x1 /* GPIO (IOMG88) */
0134 0x170 0x1 /* GPIO (IOMG93) */
0135 >;
0136 };
0137 i2c0_pmx_func: i2c0_pmx_func {
0138 pinctrl-single,pins = <
0139 0x0b4 0x0 /* I2C0_SCL & I2C0_SDA (IOMG45) */
0140 >;
0141 };
0142 i2c0_pmx_idle: i2c0_pmx_idle {
0143 pinctrl-single,pins = <
0144 0x0b4 0x1 /* GPIO (IOMG45) */
0145 >;
0146 };
0147 i2c1_pmx_func: i2c1_pmx_func {
0148 pinctrl-single,pins = <
0149 0x0b8 0x0 /* I2C1_SCL & I2C1_SDA (IOMG46) */
0150 >;
0151 };
0152 i2c1_pmx_idle: i2c1_pmx_idle {
0153 pinctrl-single,pins = <
0154 0x0b8 0x1 /* GPIO (IOMG46) */
0155 >;
0156 };
0157 i2c2_pmx_func: i2c2_pmx_func {
0158 pinctrl-single,pins = <
0159 0x068 0x0 /* I2C2_SCL (IOMG26) */
0160 0x06c 0x0 /* I2C2_SDA (IOMG27) */
0161 >;
0162 };
0163 i2c2_pmx_idle: i2c2_pmx_idle {
0164 pinctrl-single,pins = <
0165 0x068 0x1 /* GPIO (IOMG26) */
0166 0x06c 0x1 /* GPIO (IOMG27) */
0167 >;
0168 };
0169 i2c3_pmx_func: i2c3_pmx_func {
0170 pinctrl-single,pins = <
0171 0x050 0x2 /* I2C3_SCL (IOMG20) */
0172 0x054 0x2 /* I2C3_SDA (IOMG21) */
0173 >;
0174 };
0175 i2c3_pmx_idle: i2c3_pmx_idle {
0176 pinctrl-single,pins = <
0177 0x050 0x1 /* GPIO (IOMG20) */
0178 0x054 0x1 /* GPIO (IOMG21) */
0179 >;
0180 };
0181 spi0_pmx_func: spi0_pmx_func {
0182 pinctrl-single,pins = <
0183 0x0d4 0x0 /* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */
0184 0x0d8 0x0 /* SPI0_CS0 (IOMG54) */
0185 0x0dc 0x0 /* SPI0_CS1 (IOMG55) */
0186 0x0e0 0x0 /* SPI0_CS2 (IOMG56) */
0187 0x0e4 0x0 /* SPI0_CS3 (IOMG57) */
0188 >;
0189 };
0190 spi0_pmx_idle: spi0_pmx_idle {
0191 pinctrl-single,pins = <
0192 0x0d4 0x1 /* GPIO (IOMG53) */
0193 0x0d8 0x1 /* GPIO (IOMG54) */
0194 0x0dc 0x1 /* GPIO (IOMG55) */
0195 0x0e0 0x1 /* GPIO (IOMG56) */
0196 0x0e4 0x1 /* GPIO (IOMG57) */
0197 >;
0198 };
0199 spi1_pmx_func: spi1_pmx_func {
0200 pinctrl-single,pins = <
0201 0x184 0x0 /* SPI1_CLK/SPI1_DI (IOMG98) */
0202 0x0e8 0x0 /* SPI1_DO (IOMG58) */
0203 0x0ec 0x0 /* SPI1_CS (IOMG95) */
0204 >;
0205 };
0206 spi1_pmx_idle: spi1_pmx_idle {
0207 pinctrl-single,pins = <
0208 0x184 0x1 /* GPIO (IOMG98) */
0209 0x0e8 0x1 /* GPIO (IOMG58) */
0210 0x0ec 0x1 /* GPIO (IOMG95) */
0211 >;
0212 };
0213 kpc_pmx_func: kpc_pmx_func {
0214 pinctrl-single,pins = <
0215 0x12c 0x0 /* KEY_IN0 (IOMG73) */
0216 0x130 0x0 /* KEY_IN1 (IOMG74) */
0217 0x134 0x0 /* KEY_IN2 (IOMG75) */
0218 0x10c 0x0 /* KEY_OUT0 (IOMG65) */
0219 0x110 0x0 /* KEY_OUT1 (IOMG66) */
0220 0x114 0x0 /* KEY_OUT2 (IOMG67) */
0221 >;
0222 };
0223 kpc_pmx_idle: kpc_pmx_idle {
0224 pinctrl-single,pins = <
0225 0x12c 0x1 /* GPIO (IOMG73) */
0226 0x130 0x1 /* GPIO (IOMG74) */
0227 0x134 0x1 /* GPIO (IOMG75) */
0228 0x10c 0x1 /* GPIO (IOMG65) */
0229 0x110 0x1 /* GPIO (IOMG66) */
0230 0x114 0x1 /* GPIO (IOMG67) */
0231 >;
0232 };
0233 gpio_key_func: gpio_key_func {
0234 pinctrl-single,pins = <
0235 0x10c 0x1 /* KEY_OUT0/GPIO (IOMG65) */
0236 0x130 0x1 /* KEY_IN1/GPIO (IOMG74) */
0237 >;
0238 };
0239 emmc_pmx_func: emmc_pmx_func {
0240 pinctrl-single,pins = <
0241 0x030 0x2 /* eMMC_CMD/eMMC_CLK (IOMG12) */
0242 0x018 0x0 /* NAND_CS3_N (IOMG6) */
0243 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
0244 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
0245 0x02c 0x2 /* eMMC_DATA[0:7] (IOMG10) */
0246 >;
0247 };
0248 emmc_pmx_idle: emmc_pmx_idle {
0249 pinctrl-single,pins = <
0250 0x030 0x0 /* GPIO (IOMG12) */
0251 0x018 0x1 /* GPIO (IOMG6) */
0252 0x024 0x1 /* GPIO (IOMG8) */
0253 0x028 0x1 /* GPIO (IOMG9) */
0254 0x02c 0x1 /* GPIO (IOMG10) */
0255 >;
0256 };
0257 sd_pmx_func: sd_pmx_func {
0258 pinctrl-single,pins = <
0259 0x0bc 0x0 /* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */
0260 0x0c0 0x0 /* SD_DATA3 (IOMG48) */
0261 >;
0262 };
0263 sd_pmx_idle: sd_pmx_idle {
0264 pinctrl-single,pins = <
0265 0x0bc 0x1 /* GPIO (IOMG47) */
0266 0x0c0 0x1 /* GPIO (IOMG48) */
0267 >;
0268 };
0269 nand_pmx_func: nand_pmx_func {
0270 pinctrl-single,pins = <
0271 0x00c 0x0 /* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */
0272 0x010 0x0 /* NAND_CS1_N (IOMG4) */
0273 0x014 0x0 /* NAND_CS2_N (IOMG5) */
0274 0x018 0x0 /* NAND_CS3_N (IOMG6) */
0275 0x01c 0x0 /* NAND_BUSY0_N (IOMG94) */
0276 0x020 0x0 /* NAND_BUSY1_N (IOMG7) */
0277 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
0278 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
0279 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */
0280 >;
0281 };
0282 nand_pmx_idle: nand_pmx_idle {
0283 pinctrl-single,pins = <
0284 0x00c 0x1 /* GPIO (IOMG3) */
0285 0x010 0x1 /* GPIO (IOMG4) */
0286 0x014 0x1 /* GPIO (IOMG5) */
0287 0x018 0x1 /* GPIO (IOMG6) */
0288 0x01c 0x1 /* GPIO (IOMG94) */
0289 0x020 0x1 /* GPIO (IOMG7) */
0290 0x024 0x1 /* GPIO (IOMG8) */
0291 0x028 0x1 /* GPIO (IOMG9) */
0292 0x02c 0x1 /* GPIO (IOMG10) */
0293 >;
0294 };
0295 sdio_pmx_func: sdio_pmx_func {
0296 pinctrl-single,pins = <
0297 0x0c4 0x0 /* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */
0298 >;
0299 };
0300 sdio_pmx_idle: sdio_pmx_idle {
0301 pinctrl-single,pins = <
0302 0x0c4 0x1 /* GPIO (IOMG49) */
0303 >;
0304 };
0305 audio_out_pmx_func: audio_out_pmx_func {
0306 pinctrl-single,pins = <
0307 0x0f0 0x1 /* GPIO (IOMG59), audio spk & earphone */
0308 >;
0309 };
0310 };
0311
0312 pmx1: pinmux@803800 {
0313 pinctrl-names = "default";
0314 pinctrl-0 = < &board_pu_pins &board_pd_pins &board_pd_ps_pins
0315 &board_np_pins &board_ps_pins &kpc_cfg_func
0316 &audio_out_cfg_func>;
0317 board_pu_pins: board_pu_pins {
0318 pinctrl-single,pins = <
0319 0x014 0 /* GPIO_158 (IOCFG2) */
0320 0x018 0 /* GPIO_159 (IOCFG3) */
0321 0x01c 0 /* BOOT_MODE0 (IOCFG4) */
0322 0x020 0 /* BOOT_MODE1 (IOCFG5) */
0323 >;
0324 pinctrl-single,bias-pulldown = <0 2 0 2>;
0325 pinctrl-single,bias-pullup = <1 1 0 1>;
0326 };
0327 board_pd_pins: board_pd_pins {
0328 pinctrl-single,pins = <
0329 0x038 0 /* eFUSE_DOUT (IOCFG11) */
0330 0x150 0 /* ISP_GPIO8 (IOCFG93) */
0331 0x154 0 /* ISP_GPIO9 (IOCFG94) */
0332 >;
0333 pinctrl-single,bias-pulldown = <2 2 0 2>;
0334 pinctrl-single,bias-pullup = <0 1 0 1>;
0335 };
0336 board_pd_ps_pins: board_pd_ps_pins {
0337 pinctrl-single,pins = <
0338 0x2d8 0 /* CLK_OUT0 (IOCFG190) */
0339 0x004 0 /* PMU_SPI_DATA (IOCFG192) */
0340 >;
0341 pinctrl-single,bias-pulldown = <2 2 0 2>;
0342 pinctrl-single,bias-pullup = <0 1 0 1>;
0343 pinctrl-single,drive-strength = <0x30 0xf0>;
0344 };
0345 board_np_pins: board_np_pins {
0346 pinctrl-single,pins = <
0347 0x24c 0 /* KEYPAD_OUT7 (IOCFG155) */
0348 >;
0349 pinctrl-single,bias-pulldown = <0 2 0 2>;
0350 pinctrl-single,bias-pullup = <0 1 0 1>;
0351 };
0352 board_ps_pins: board_ps_pins {
0353 pinctrl-single,pins = <
0354 0x000 0 /* PMU_SPI_CLK (IOCFG191) */
0355 0x008 0 /* PMU_SPI_CS_N (IOCFG193) */
0356 >;
0357 pinctrl-single,drive-strength = <0x30 0xf0>;
0358 };
0359 uart0_cfg_func: uart0_cfg_func {
0360 pinctrl-single,pins = <
0361 0x208 0 /* UART0_RXD (IOCFG138) */
0362 0x20c 0 /* UART0_TXD (IOCFG139) */
0363 >;
0364 pinctrl-single,bias-pulldown = <0 2 0 2>;
0365 pinctrl-single,bias-pullup = <0 1 0 1>;
0366 };
0367 uart0_cfg_idle: uart0_cfg_idle {
0368 pinctrl-single,pins = <
0369 0x208 0 /* UART0_RXD (IOCFG138) */
0370 0x20c 0 /* UART0_TXD (IOCFG139) */
0371 >;
0372 pinctrl-single,bias-pulldown = <2 2 0 2>;
0373 pinctrl-single,bias-pullup = <0 1 0 1>;
0374 };
0375 uart1_cfg_func: uart1_cfg_func {
0376 pinctrl-single,pins = <
0377 0x210 0 /* UART1_CTS (IOCFG140) */
0378 0x214 0 /* UART1_RTS (IOCFG141) */
0379 0x218 0 /* UART1_RXD (IOCFG142) */
0380 0x21c 0 /* UART1_TXD (IOCFG143) */
0381 >;
0382 pinctrl-single,bias-pulldown = <0 2 0 2>;
0383 pinctrl-single,bias-pullup = <0 1 0 1>;
0384 };
0385 uart1_cfg_idle: uart1_cfg_idle {
0386 pinctrl-single,pins = <
0387 0x210 0 /* UART1_CTS (IOCFG140) */
0388 0x214 0 /* UART1_RTS (IOCFG141) */
0389 0x218 0 /* UART1_RXD (IOCFG142) */
0390 0x21c 0 /* UART1_TXD (IOCFG143) */
0391 >;
0392 pinctrl-single,bias-pulldown = <2 2 0 2>;
0393 pinctrl-single,bias-pullup = <0 1 0 1>;
0394 };
0395 uart2_cfg_func: uart2_cfg_func {
0396 pinctrl-single,pins = <
0397 0x220 0 /* UART2_CTS (IOCFG144) */
0398 0x224 0 /* UART2_RTS (IOCFG145) */
0399 0x228 0 /* UART2_RXD (IOCFG146) */
0400 0x22c 0 /* UART2_TXD (IOCFG147) */
0401 >;
0402 pinctrl-single,bias-pulldown = <0 2 0 2>;
0403 pinctrl-single,bias-pullup = <0 1 0 1>;
0404 };
0405 uart2_cfg_idle: uart2_cfg_idle {
0406 pinctrl-single,pins = <
0407 0x220 0 /* GPIO (IOCFG144) */
0408 0x224 0 /* GPIO (IOCFG145) */
0409 0x228 0 /* GPIO (IOCFG146) */
0410 0x22c 0 /* GPIO (IOCFG147) */
0411 >;
0412 pinctrl-single,bias-pulldown = <2 2 0 2>;
0413 pinctrl-single,bias-pullup = <0 1 0 1>;
0414 };
0415 uart3_cfg_func: uart3_cfg_func {
0416 pinctrl-single,pins = <
0417 0x294 0 /* UART3_CTS (IOCFG173) */
0418 0x298 0 /* UART3_RTS (IOCFG174) */
0419 0x29c 0 /* UART3_RXD (IOCFG175) */
0420 0x2a0 0 /* UART3_TXD (IOCFG176) */
0421 >;
0422 pinctrl-single,bias-pulldown = <0 2 0 2>;
0423 pinctrl-single,bias-pullup = <0 1 0 1>;
0424 };
0425 uart3_cfg_idle: uart3_cfg_idle {
0426 pinctrl-single,pins = <
0427 0x294 0 /* UART3_CTS (IOCFG173) */
0428 0x298 0 /* UART3_RTS (IOCFG174) */
0429 0x29c 0 /* UART3_RXD (IOCFG175) */
0430 0x2a0 0 /* UART3_TXD (IOCFG176) */
0431 >;
0432 pinctrl-single,bias-pulldown = <2 2 0 2>;
0433 pinctrl-single,bias-pullup = <0 1 0 1>;
0434 };
0435 uart4_cfg_func: uart4_cfg_func {
0436 pinctrl-single,pins = <
0437 0x2a4 0 /* UART4_CTS (IOCFG177) */
0438 0x2a8 0 /* UART4_RTS (IOCFG178) */
0439 0x2ac 0 /* UART4_RXD (IOCFG179) */
0440 0x2b0 0 /* UART4_TXD (IOCFG180) */
0441 >;
0442 pinctrl-single,bias-pulldown = <0 2 0 2>;
0443 pinctrl-single,bias-pullup = <0 1 0 1>;
0444 };
0445 i2c0_cfg_func: i2c0_cfg_func {
0446 pinctrl-single,pins = <
0447 0x17c 0 /* I2C0_SCL (IOCFG103) */
0448 0x180 0 /* I2C0_SDA (IOCFG104) */
0449 >;
0450 pinctrl-single,bias-pulldown = <0 2 0 2>;
0451 pinctrl-single,bias-pullup = <0 1 0 1>;
0452 pinctrl-single,drive-strength = <0x30 0xf0>;
0453 };
0454 i2c1_cfg_func: i2c1_cfg_func {
0455 pinctrl-single,pins = <
0456 0x184 0 /* I2C1_SCL (IOCFG105) */
0457 0x188 0 /* I2C1_SDA (IOCFG106) */
0458 >;
0459 pinctrl-single,bias-pulldown = <0 2 0 2>;
0460 pinctrl-single,bias-pullup = <0 1 0 1>;
0461 pinctrl-single,drive-strength = <0x30 0xf0>;
0462 };
0463 i2c2_cfg_func: i2c2_cfg_func {
0464 pinctrl-single,pins = <
0465 0x118 0 /* I2C2_SCL (IOCFG79) */
0466 0x11c 0 /* I2C2_SDA (IOCFG80) */
0467 >;
0468 pinctrl-single,bias-pulldown = <0 2 0 2>;
0469 pinctrl-single,bias-pullup = <0 1 0 1>;
0470 pinctrl-single,drive-strength = <0x30 0xf0>;
0471 };
0472 i2c3_cfg_func: i2c3_cfg_func {
0473 pinctrl-single,pins = <
0474 0x100 0 /* I2C3_SCL (IOCFG73) */
0475 0x104 0 /* I2C3_SDA (IOCFG74) */
0476 >;
0477 pinctrl-single,bias-pulldown = <0 2 0 2>;
0478 pinctrl-single,bias-pullup = <0 1 0 1>;
0479 pinctrl-single,drive-strength = <0x30 0xf0>;
0480 };
0481 spi0_cfg_func1: spi0_cfg_func1 {
0482 pinctrl-single,pins = <
0483 0x1d4 0 /* SPI0_CLK (IOCFG125) */
0484 0x1d8 0 /* SPI0_DI (IOCFG126) */
0485 0x1dc 0 /* SPI0_DO (IOCFG127) */
0486 >;
0487 pinctrl-single,bias-pulldown = <2 2 0 2>;
0488 pinctrl-single,bias-pullup = <0 1 0 1>;
0489 pinctrl-single,drive-strength = <0x30 0xf0>;
0490 };
0491 spi0_cfg_func2: spi0_cfg_func2 {
0492 pinctrl-single,pins = <
0493 0x1e0 0 /* SPI0_CS0 (IOCFG128) */
0494 0x1e4 0 /* SPI0_CS1 (IOCFG129) */
0495 0x1e8 0 /* SPI0_CS2 (IOCFG130 */
0496 0x1ec 0 /* SPI0_CS3 (IOCFG131) */
0497 >;
0498 pinctrl-single,bias-pulldown = <0 2 0 2>;
0499 pinctrl-single,bias-pullup = <1 1 0 1>;
0500 pinctrl-single,drive-strength = <0x30 0xf0>;
0501 };
0502 spi1_cfg_func1: spi1_cfg_func1 {
0503 pinctrl-single,pins = <
0504 0x1f0 0 /* SPI1_CLK (IOCFG132) */
0505 0x1f4 0 /* SPI1_DI (IOCFG133) */
0506 0x1f8 0 /* SPI1_DO (IOCFG134) */
0507 >;
0508 pinctrl-single,bias-pulldown = <2 2 0 2>;
0509 pinctrl-single,bias-pullup = <0 1 0 1>;
0510 pinctrl-single,drive-strength = <0x30 0xf0>;
0511 };
0512 spi1_cfg_func2: spi1_cfg_func2 {
0513 pinctrl-single,pins = <
0514 0x1fc 0 /* SPI1_CS (IOCFG135) */
0515 >;
0516 pinctrl-single,bias-pulldown = <0 2 0 2>;
0517 pinctrl-single,bias-pullup = <1 1 0 1>;
0518 pinctrl-single,drive-strength = <0x30 0xf0>;
0519 };
0520 kpc_cfg_func: kpc_cfg_func {
0521 pinctrl-single,pins = <
0522 0x250 0 /* KEY_IN0 (IOCFG156) */
0523 0x254 0 /* KEY_IN1 (IOCFG157) */
0524 0x258 0 /* KEY_IN2 (IOCFG158) */
0525 0x230 0 /* KEY_OUT0 (IOCFG148) */
0526 0x234 0 /* KEY_OUT1 (IOCFG149) */
0527 0x238 0 /* KEY_OUT2 (IOCFG150) */
0528 >;
0529 pinctrl-single,bias-pulldown = <2 2 0 2>;
0530 pinctrl-single,bias-pullup = <0 1 0 1>;
0531 };
0532 emmc_cfg_func: emmc_cfg_func {
0533 pinctrl-single,pins = <
0534 0x0ac 0 /* eMMC_CMD (IOCFG40) */
0535 0x0b0 0 /* eMMC_CLK (IOCFG41) */
0536 0x058 0 /* NAND_CS3_N (IOCFG19) */
0537 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
0538 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
0539 0x08c 0 /* NAND_DATA8 (IOCFG32) */
0540 0x090 0 /* NAND_DATA9 (IOCFG33) */
0541 0x094 0 /* NAND_DATA10 (IOCFG34) */
0542 0x098 0 /* NAND_DATA11 (IOCFG35) */
0543 0x09c 0 /* NAND_DATA12 (IOCFG36) */
0544 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
0545 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
0546 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
0547 >;
0548 pinctrl-single,bias-pulldown = <0 2 0 2>;
0549 pinctrl-single,bias-pullup = <1 1 0 1>;
0550 pinctrl-single,drive-strength = <0x30 0xf0>;
0551 };
0552 sd_cfg_func1: sd_cfg_func1 {
0553 pinctrl-single,pins = <
0554 0x18c 0 /* SD_CLK (IOCFG107) */
0555 0x190 0 /* SD_CMD (IOCFG108) */
0556 >;
0557 pinctrl-single,bias-pulldown = <2 2 0 2>;
0558 pinctrl-single,bias-pullup = <0 1 0 1>;
0559 pinctrl-single,drive-strength = <0x30 0xf0>;
0560 };
0561 sd_cfg_func2: sd_cfg_func2 {
0562 pinctrl-single,pins = <
0563 0x194 0 /* SD_DATA0 (IOCFG109) */
0564 0x198 0 /* SD_DATA1 (IOCFG110) */
0565 0x19c 0 /* SD_DATA2 (IOCFG111) */
0566 0x1a0 0 /* SD_DATA3 (IOCFG112) */
0567 >;
0568 pinctrl-single,bias-pulldown = <2 2 0 2>;
0569 pinctrl-single,bias-pullup = <0 1 0 1>;
0570 pinctrl-single,drive-strength = <0x70 0xf0>;
0571 };
0572 nand_cfg_func1: nand_cfg_func1 {
0573 pinctrl-single,pins = <
0574 0x03c 0 /* NAND_ALE (IOCFG12) */
0575 0x040 0 /* NAND_CLE (IOCFG13) */
0576 0x06c 0 /* NAND_DATA0 (IOCFG24) */
0577 0x070 0 /* NAND_DATA1 (IOCFG25) */
0578 0x074 0 /* NAND_DATA2 (IOCFG26) */
0579 0x078 0 /* NAND_DATA3 (IOCFG27) */
0580 0x07c 0 /* NAND_DATA4 (IOCFG28) */
0581 0x080 0 /* NAND_DATA5 (IOCFG29) */
0582 0x084 0 /* NAND_DATA6 (IOCFG30) */
0583 0x088 0 /* NAND_DATA7 (IOCFG31) */
0584 0x08c 0 /* NAND_DATA8 (IOCFG32) */
0585 0x090 0 /* NAND_DATA9 (IOCFG33) */
0586 0x094 0 /* NAND_DATA10 (IOCFG34) */
0587 0x098 0 /* NAND_DATA11 (IOCFG35) */
0588 0x09c 0 /* NAND_DATA12 (IOCFG36) */
0589 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
0590 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
0591 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
0592 >;
0593 pinctrl-single,bias-pulldown = <2 2 0 2>;
0594 pinctrl-single,bias-pullup = <0 1 0 1>;
0595 pinctrl-single,drive-strength = <0x30 0xf0>;
0596 };
0597 nand_cfg_func2: nand_cfg_func2 {
0598 pinctrl-single,pins = <
0599 0x044 0 /* NAND_RE_N (IOCFG14) */
0600 0x048 0 /* NAND_WE_N (IOCFG15) */
0601 0x04c 0 /* NAND_CS0_N (IOCFG16) */
0602 0x050 0 /* NAND_CS1_N (IOCFG17) */
0603 0x054 0 /* NAND_CS2_N (IOCFG18) */
0604 0x058 0 /* NAND_CS3_N (IOCFG19) */
0605 0x05c 0 /* NAND_BUSY0_N (IOCFG20) */
0606 0x060 0 /* NAND_BUSY1_N (IOCFG21) */
0607 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
0608 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
0609 >;
0610 pinctrl-single,bias-pulldown = <0 2 0 2>;
0611 pinctrl-single,bias-pullup = <1 1 0 1>;
0612 pinctrl-single,drive-strength = <0x30 0xf0>;
0613 };
0614 sdio_cfg_func: sdio_cfg_func {
0615 pinctrl-single,pins = <
0616 0x1a4 0 /* SDIO0_CLK (IOCG113) */
0617 0x1a8 0 /* SDIO0_CMD (IOCG114) */
0618 0x1ac 0 /* SDIO0_DATA0 (IOCG115) */
0619 0x1b0 0 /* SDIO0_DATA1 (IOCG116) */
0620 0x1b4 0 /* SDIO0_DATA2 (IOCG117) */
0621 0x1b8 0 /* SDIO0_DATA3 (IOCG118) */
0622 >;
0623 pinctrl-single,bias-pulldown = <2 2 0 2>;
0624 pinctrl-single,bias-pullup = <0 1 0 1>;
0625 pinctrl-single,drive-strength = <0x30 0xf0>;
0626 };
0627 audio_out_cfg_func: audio_out_cfg_func {
0628 pinctrl-single,pins = <
0629 0x200 0 /* GPIO (IOCFG136) */
0630 0x204 0 /* GPIO (IOCFG137) */
0631 >;
0632 pinctrl-single,bias-pulldown = <2 2 0 2>;
0633 pinctrl-single,bias-pullup = <0 1 0 1>;
0634 };
0635 };
0636 };
0637
0638 gpio-keys {
0639 compatible = "gpio-keys";
0640
0641 call {
0642 label = "call";
0643 gpios = <&gpio17 2 0>;
0644 linux,code = <169>; /* KEY_PHONE */
0645 };
0646 };
0647 };
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