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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Samsung's Exynos5 SoC series common device tree source
0004  *
0005  * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
0006  *              http://www.samsung.com
0007  *
0008  * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
0009  * SoCs from Exynos5 series can include this file and provide values for SoCs
0010  * specfic bindings.
0011  */
0012 
0013 #include <dt-bindings/interrupt-controller/arm-gic.h>
0014 #include <dt-bindings/interrupt-controller/irq.h>
0015 
0016 / {
0017         interrupt-parent = <&gic>;
0018         #address-cells = <1>;
0019         #size-cells = <1>;
0020 
0021         aliases {
0022                 i2c0 = &i2c_0;
0023                 i2c1 = &i2c_1;
0024                 i2c2 = &i2c_2;
0025                 i2c3 = &i2c_3;
0026                 serial0 = &serial_0;
0027                 serial1 = &serial_1;
0028                 serial2 = &serial_2;
0029                 serial3 = &serial_3;
0030         };
0031 
0032         soc: soc {
0033                 compatible = "simple-bus";
0034                 #address-cells = <1>;
0035                 #size-cells = <1>;
0036                 ranges;
0037 
0038                 chipid: chipid@10000000 {
0039                         compatible = "samsung,exynos4210-chipid";
0040                         reg = <0x10000000 0x100>;
0041                 };
0042 
0043                 sromc: memory-controller@12250000 {
0044                         compatible = "samsung,exynos4210-srom";
0045                         reg = <0x12250000 0x14>;
0046                 };
0047 
0048                 combiner: interrupt-controller@10440000 {
0049                         compatible = "samsung,exynos4210-combiner";
0050                         #interrupt-cells = <2>;
0051                         interrupt-controller;
0052                         samsung,combiner-nr = <32>;
0053                         reg = <0x10440000 0x1000>;
0054                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
0055                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
0056                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
0057                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
0058                                      <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
0059                                      <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
0060                                      <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
0061                                      <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
0062                                      <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
0063                                      <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
0064                                      <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
0065                                      <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
0066                                      <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
0067                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
0068                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
0069                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
0070                                      <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
0071                                      <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
0072                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
0073                                      <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
0074                                      <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
0075                                      <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
0076                                      <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
0077                                      <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
0078                                      <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
0079                                      <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
0080                                      <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
0081                                      <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
0082                                      <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
0083                                      <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
0084                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
0085                                      <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
0086                 };
0087 
0088                 gic: interrupt-controller@10481000 {
0089                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
0090                         #interrupt-cells = <3>;
0091                         interrupt-controller;
0092                         reg = <0x10481000 0x1000>,
0093                                 <0x10482000 0x2000>,
0094                                 <0x10484000 0x2000>,
0095                                 <0x10486000 0x2000>;
0096                         interrupts = <GIC_PPI 9
0097                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
0098                 };
0099 
0100                 sysreg_system_controller: syscon@10050000 {
0101                         compatible = "samsung,exynos5-sysreg", "syscon";
0102                         reg = <0x10050000 0x5000>;
0103                 };
0104 
0105                 serial_0: serial@12c00000 {
0106                         compatible = "samsung,exynos4210-uart";
0107                         reg = <0x12C00000 0x100>;
0108                         interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
0109                 };
0110 
0111                 serial_1: serial@12c10000 {
0112                         compatible = "samsung,exynos4210-uart";
0113                         reg = <0x12C10000 0x100>;
0114                         interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
0115                 };
0116 
0117                 serial_2: serial@12c20000 {
0118                         compatible = "samsung,exynos4210-uart";
0119                         reg = <0x12C20000 0x100>;
0120                         interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
0121                 };
0122 
0123                 serial_3: serial@12c30000 {
0124                         compatible = "samsung,exynos4210-uart";
0125                         reg = <0x12C30000 0x100>;
0126                         interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
0127                 };
0128 
0129                 i2c_0: i2c@12c60000 {
0130                         compatible = "samsung,s3c2440-i2c";
0131                         reg = <0x12C60000 0x100>;
0132                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
0133                         #address-cells = <1>;
0134                         #size-cells = <0>;
0135                         samsung,sysreg-phandle = <&sysreg_system_controller>;
0136                         status = "disabled";
0137                 };
0138 
0139                 i2c_1: i2c@12c70000 {
0140                         compatible = "samsung,s3c2440-i2c";
0141                         reg = <0x12C70000 0x100>;
0142                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
0143                         #address-cells = <1>;
0144                         #size-cells = <0>;
0145                         samsung,sysreg-phandle = <&sysreg_system_controller>;
0146                         status = "disabled";
0147                 };
0148 
0149                 i2c_2: i2c@12c80000 {
0150                         compatible = "samsung,s3c2440-i2c";
0151                         reg = <0x12C80000 0x100>;
0152                         interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
0153                         #address-cells = <1>;
0154                         #size-cells = <0>;
0155                         samsung,sysreg-phandle = <&sysreg_system_controller>;
0156                         status = "disabled";
0157                 };
0158 
0159                 i2c_3: i2c@12c90000 {
0160                         compatible = "samsung,s3c2440-i2c";
0161                         reg = <0x12C90000 0x100>;
0162                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
0163                         #address-cells = <1>;
0164                         #size-cells = <0>;
0165                         samsung,sysreg-phandle = <&sysreg_system_controller>;
0166                         status = "disabled";
0167                 };
0168 
0169                 pwm: pwm@12dd0000 {
0170                         compatible = "samsung,exynos4210-pwm";
0171                         reg = <0x12DD0000 0x100>;
0172                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
0173                                      <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
0174                                      <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
0175                                      <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
0176                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
0177                         samsung,pwm-outputs = <0>, <1>, <2>, <3>;
0178                         #pwm-cells = <3>;
0179                 };
0180 
0181                 rtc: rtc@101e0000 {
0182                         compatible = "samsung,s3c6410-rtc";
0183                         reg = <0x101E0000 0x100>;
0184                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
0185                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
0186                         status = "disabled";
0187                 };
0188 
0189                 fimd: fimd@14400000 {
0190                         compatible = "samsung,exynos5250-fimd";
0191                         interrupt-parent = <&combiner>;
0192                         reg = <0x14400000 0x40000>;
0193                         interrupt-names = "fifo", "vsync", "lcd_sys";
0194                         interrupts = <18 4>, <18 5>, <18 6>;
0195                         samsung,sysreg = <&sysreg_system_controller>;
0196                         status = "disabled";
0197                 };
0198 
0199                 dp: dp-controller@145b0000 {
0200                         compatible = "samsung,exynos5-dp";
0201                         reg = <0x145B0000 0x1000>;
0202                         interrupts = <10 3>;
0203                         interrupt-parent = <&combiner>;
0204                         status = "disabled";
0205                 };
0206 
0207                 sss: sss@10830000 {
0208                         compatible = "samsung,exynos4210-secss";
0209                         reg = <0x10830000 0x300>;
0210                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
0211                 };
0212 
0213                 prng: rng@10830400 {
0214                         compatible = "samsung,exynos5250-prng";
0215                         reg = <0x10830400 0x200>;
0216                 };
0217 
0218                 trng: rng@10830600 {
0219                         compatible = "samsung,exynos5250-trng";
0220                         reg = <0x10830600 0x100>;
0221                 };
0222 
0223                 g2d: g2d@10850000 {
0224                         compatible = "samsung,exynos5250-g2d";
0225                         reg = <0x10850000 0x1000>;
0226                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
0227                         status = "disabled";
0228                 };
0229         };
0230 };