boot/dts/exynos-pinctrl.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Samsung Exynos DTS pinctrl constants
0004  *
0005  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
0006  *      http://www.samsung.com
0007  * Copyright (c) 2022 Linaro Ltd
0008  * Author: Krzysztof Kozlowski <krzk@kernel.org>
0009  */
0010
0011 #ifndef __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__
0012 #define __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__
0013
0014 #define EXYNOS_PIN_PULL_NONE        0
0015 #define EXYNOS_PIN_PULL_DOWN        1
0016 #define EXYNOS_PIN_PULL_UP      3
0017
0018 /* Pin function in power down mode */
0019 #define EXYNOS_PIN_PDN_OUT0     0
0020 #define EXYNOS_PIN_PDN_OUT1     1
0021 #define EXYNOS_PIN_PDN_INPUT        2
0022 #define EXYNOS_PIN_PDN_PREV     3
0023
0024 /* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */
0025 #define EXYNOS4_PIN_DRV_LV1     0
0026 #define EXYNOS4_PIN_DRV_LV2     2
0027 #define EXYNOS4_PIN_DRV_LV3     1
0028 #define EXYNOS4_PIN_DRV_LV4     3
0029
0030 /* Drive strengths for Exynos5260 */
0031 #define EXYNOS5260_PIN_DRV_LV1      0
0032 #define EXYNOS5260_PIN_DRV_LV2      1
0033 #define EXYNOS5260_PIN_DRV_LV4      2
0034 #define EXYNOS5260_PIN_DRV_LV6      3
0035
0036 /*
0037  * Drive strengths for Exynos5410, Exynos542x, Exynos5800 and Exynos850 (except
0038  * GPIO_HSI block)
0039  */
0040 #define EXYNOS5420_PIN_DRV_LV1      0
0041 #define EXYNOS5420_PIN_DRV_LV2      1
0042 #define EXYNOS5420_PIN_DRV_LV3      2
0043 #define EXYNOS5420_PIN_DRV_LV4      3
0044
0045 #define EXYNOS_PIN_FUNC_INPUT       0
0046 #define EXYNOS_PIN_FUNC_OUTPUT      1
0047 #define EXYNOS_PIN_FUNC_2       2
0048 #define EXYNOS_PIN_FUNC_3       3
0049 #define EXYNOS_PIN_FUNC_4       4
0050 #define EXYNOS_PIN_FUNC_5       5
0051 #define EXYNOS_PIN_FUNC_6       6
0052 #define EXYNOS_PIN_FUNC_EINT        0xf
0053 #define EXYNOS_PIN_FUNC_F       EXYNOS_PIN_FUNC_EINT
0054
0055 #endif /* __DTS_ARM_SAMSUNG_EXYNOS_PINCTRL_H__ */