0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * Copyright 2011-2012 Calxeda, Inc.
0004 */
0005
0006 /dts-v1/;
0007
0008 /* First 4KB has pen for secondary cores. */
0009 /memreserve/ 0x00000000 0x0001000;
0010
0011 / {
0012 model = "Calxeda ECX-2000";
0013 compatible = "calxeda,ecx-2000";
0014 #address-cells = <2>;
0015 #size-cells = <2>;
0016
0017 cpus {
0018 #address-cells = <1>;
0019 #size-cells = <0>;
0020
0021 cpu@0 {
0022 compatible = "arm,cortex-a15";
0023 device_type = "cpu";
0024 reg = <0>;
0025 clocks = <&a9pll>;
0026 clock-names = "cpu";
0027 };
0028
0029 cpu@1 {
0030 compatible = "arm,cortex-a15";
0031 device_type = "cpu";
0032 reg = <1>;
0033 clocks = <&a9pll>;
0034 clock-names = "cpu";
0035 };
0036
0037 cpu@2 {
0038 compatible = "arm,cortex-a15";
0039 device_type = "cpu";
0040 reg = <2>;
0041 clocks = <&a9pll>;
0042 clock-names = "cpu";
0043 };
0044
0045 cpu@3 {
0046 compatible = "arm,cortex-a15";
0047 device_type = "cpu";
0048 reg = <3>;
0049 clocks = <&a9pll>;
0050 clock-names = "cpu";
0051 };
0052 };
0053
0054 memory@0 {
0055 name = "memory";
0056 device_type = "memory";
0057 reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
0058 };
0059
0060 memory@200000000 {
0061 name = "memory";
0062 device_type = "memory";
0063 reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
0064 };
0065
0066 soc {
0067 ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
0068
0069 timer {
0070 compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
0071 <1 14 0xf08>,
0072 <1 11 0xf08>,
0073 <1 10 0xf08>;
0074 };
0075
0076 memory-controller@fff00000 {
0077 compatible = "calxeda,ecx-2000-ddr-ctrl";
0078 reg = <0xfff00000 0x1000>;
0079 interrupts = <0 91 4>;
0080 };
0081
0082 intc: interrupt-controller@fff11000 {
0083 compatible = "arm,cortex-a15-gic";
0084 #interrupt-cells = <3>;
0085 #address-cells = <0>;
0086 interrupt-controller;
0087 interrupts = <1 9 0xf04>;
0088 reg = <0xfff11000 0x1000>,
0089 <0xfff12000 0x2000>,
0090 <0xfff14000 0x2000>,
0091 <0xfff16000 0x2000>;
0092 };
0093
0094 pmu {
0095 compatible = "arm,cortex-a9-pmu";
0096 interrupts = <0 76 4>, <0 75 4>, <0 74 4>, <0 73 4>;
0097 };
0098 };
0099 };
0100
0101 /include/ "ecx-common.dtsi"
