0001 // SPDX-License-Identifier: GPL-2.0-only
0002
0003 #include <dt-bindings/bus/ti-sysc.h>
0004 #include <dt-bindings/clock/dm816.h>
0005 #include <dt-bindings/gpio/gpio.h>
0006 #include <dt-bindings/pinctrl/omap.h>
0007
0008 / {
0009 compatible = "ti,dm816";
0010 interrupt-parent = <&intc>;
0011 #address-cells = <1>;
0012 #size-cells = <1>;
0013 chosen { };
0014
0015 aliases {
0016 i2c0 = &i2c1;
0017 i2c1 = &i2c2;
0018 serial0 = &uart1;
0019 serial1 = &uart2;
0020 serial2 = &uart3;
0021 ethernet0 = ð0;
0022 ethernet1 = ð1;
0023 };
0024
0025 cpus {
0026 #address-cells = <1>;
0027 #size-cells = <0>;
0028 cpu@0 {
0029 compatible = "arm,cortex-a8";
0030 device_type = "cpu";
0031 reg = <0>;
0032 };
0033 };
0034
0035 pmu {
0036 compatible = "arm,cortex-a8-pmu";
0037 interrupts = <3>;
0038 };
0039
0040 /*
0041 * The soc node represents the soc top level view. It is used for IPs
0042 * that are not memory mapped in the MPU view or for the MPU itself.
0043 */
0044 soc {
0045 compatible = "ti,omap-infra";
0046 mpu {
0047 compatible = "ti,omap3-mpu";
0048 ti,hwmods = "mpu";
0049 };
0050 };
0051
0052 /*
0053 * XXX: Use a flat representation of the dm816x interconnect.
0054 * The real dm816x interconnect network is quite complex. Since
0055 * it will not bring real advantage to represent that in DT
0056 * for the moment, just use a fake OCP bus entry to represent
0057 * the whole bus hierarchy.
0058 */
0059 ocp {
0060 compatible = "simple-bus";
0061 reg = <0x44000000 0x10000>;
0062 interrupts = <9 10>;
0063 #address-cells = <1>;
0064 #size-cells = <1>;
0065 ranges;
0066
0067 prcm: prcm@48180000 {
0068 compatible = "ti,dm816-prcm", "simple-bus";
0069 reg = <0x48180000 0x4000>;
0070 #address-cells = <1>;
0071 #size-cells = <1>;
0072 ranges = <0 0x48180000 0x4000>;
0073
0074 prcm_clocks: clocks {
0075 #address-cells = <1>;
0076 #size-cells = <0>;
0077 };
0078
0079 prcm_clockdomains: clockdomains {
0080 };
0081 };
0082
0083 scrm: scrm@48140000 {
0084 compatible = "ti,dm816-scrm", "simple-bus";
0085 reg = <0x48140000 0x21000>;
0086 #address-cells = <1>;
0087 #size-cells = <1>;
0088 #pinctrl-cells = <1>;
0089 ranges = <0 0x48140000 0x21000>;
0090
0091 dm816x_pinmux: pinmux@800 {
0092 compatible = "pinctrl-single";
0093 reg = <0x800 0x50a>;
0094 #address-cells = <1>;
0095 #size-cells = <0>;
0096 #pinctrl-cells = <1>;
0097 pinctrl-single,register-width = <16>;
0098 pinctrl-single,function-mask = <0xf>;
0099 };
0100
0101 /* Device Configuration Registers */
0102 scm_conf: syscon@600 {
0103 compatible = "syscon", "simple-bus";
0104 reg = <0x600 0x110>;
0105 #address-cells = <1>;
0106 #size-cells = <1>;
0107 ranges = <0 0x600 0x110>;
0108
0109 usb_phy0: usb-phy@20 {
0110 compatible = "ti,dm8168-usb-phy";
0111 reg = <0x20 0x8>;
0112 reg-names = "phy";
0113 clocks = <&main_fapll 6>;
0114 clock-names = "refclk";
0115 #phy-cells = <0>;
0116 syscon = <&scm_conf>;
0117 };
0118
0119 usb_phy1: usb-phy@28 {
0120 compatible = "ti,dm8168-usb-phy";
0121 reg = <0x28 0x8>;
0122 reg-names = "phy";
0123 clocks = <&main_fapll 6>;
0124 clock-names = "refclk";
0125 #phy-cells = <0>;
0126 syscon = <&scm_conf>;
0127 };
0128 };
0129
0130 scrm_clocks: clocks {
0131 #address-cells = <1>;
0132 #size-cells = <0>;
0133 };
0134
0135 scrm_clockdomains: clockdomains {
0136 };
0137 };
0138
0139 target-module@49000000 {
0140 compatible = "ti,sysc-omap4", "ti,sysc";
0141 reg = <0x49000000 0x4>;
0142 reg-names = "rev";
0143 clocks = <&alwon_clkctrl DM816_TPCC_CLKCTRL 0>;
0144 clock-names = "fck";
0145 #address-cells = <1>;
0146 #size-cells = <1>;
0147 ranges = <0x0 0x49000000 0x10000>;
0148
0149 edma: dma@0 {
0150 compatible = "ti,edma3-tpcc";
0151 reg = <0 0x10000>;
0152 reg-names = "edma3_cc";
0153 interrupts = <12 13 14>;
0154 interrupt-names = "edma3_ccint", "edma3_mperr",
0155 "edma3_ccerrint";
0156 dma-requests = <64>;
0157 #dma-cells = <2>;
0158
0159 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
0160 <&edma_tptc2 3>, <&edma_tptc3 0>;
0161
0162 ti,edma-memcpy-channels = <20 21>;
0163 };
0164 };
0165
0166 target-module@49800000 {
0167 compatible = "ti,sysc-omap4", "ti,sysc";
0168 reg = <0x49800000 0x4>,
0169 <0x49800010 0x4>;
0170 reg-names = "rev", "sysc";
0171 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0172 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0173 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0174 <SYSC_IDLE_SMART>;
0175 clocks = <&alwon_clkctrl DM816_TPTC0_CLKCTRL 0>;
0176 clock-names = "fck";
0177 #address-cells = <1>;
0178 #size-cells = <1>;
0179 ranges = <0x0 0x49800000 0x100000>;
0180
0181 edma_tptc0: dma@0 {
0182 compatible = "ti,edma3-tptc";
0183 reg = <0 0x100000>;
0184 interrupts = <112>;
0185 interrupt-names = "edma3_tcerrint";
0186 };
0187 };
0188
0189 target-module@49900000 {
0190 compatible = "ti,sysc-omap4", "ti,sysc";
0191 reg = <0x49900000 0x4>,
0192 <0x49900010 0x4>;
0193 reg-names = "rev", "sysc";
0194 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0195 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0196 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0197 <SYSC_IDLE_SMART>;
0198 clocks = <&alwon_clkctrl DM816_TPTC1_CLKCTRL 0>;
0199 clock-names = "fck";
0200 #address-cells = <1>;
0201 #size-cells = <1>;
0202 ranges = <0x0 0x49900000 0x100000>;
0203
0204 edma_tptc1: dma@0 {
0205 compatible = "ti,edma3-tptc";
0206 reg = <0 0x100000>;
0207 interrupts = <113>;
0208 interrupt-names = "edma3_tcerrint";
0209 };
0210 };
0211
0212 target-module@49a00000 {
0213 compatible = "ti,sysc-omap4", "ti,sysc";
0214 reg = <0x49a00000 0x4>,
0215 <0x49a00010 0x4>;
0216 reg-names = "rev", "sysc";
0217 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0218 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0219 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0220 <SYSC_IDLE_SMART>;
0221 clocks = <&alwon_clkctrl DM816_TPTC2_CLKCTRL 0>;
0222 clock-names = "fck";
0223 #address-cells = <1>;
0224 #size-cells = <1>;
0225 ranges = <0x0 0x49a00000 0x100000>;
0226
0227 edma_tptc2: dma@0 {
0228 compatible = "ti,edma3-tptc";
0229 reg = <0 0x100000>;
0230 interrupts = <114>;
0231 interrupt-names = "edma3_tcerrint";
0232 };
0233 };
0234
0235 target-module@49b00000 {
0236 compatible = "ti,sysc-omap4", "ti,sysc";
0237 reg = <0x49b00000 0x4>,
0238 <0x49b00010 0x4>;
0239 reg-names = "rev", "sysc";
0240 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0241 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0242 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0243 <SYSC_IDLE_SMART>;
0244 clocks = <&alwon_clkctrl DM816_TPTC3_CLKCTRL 0>;
0245 clock-names = "fck";
0246 #address-cells = <1>;
0247 #size-cells = <1>;
0248 ranges = <0x0 0x49b00000 0x100000>;
0249
0250 edma_tptc3: dma@0 {
0251 compatible = "ti,edma3-tptc";
0252 reg = <0 0x100000>;
0253 interrupts = <115>;
0254 interrupt-names = "edma3_tcerrint";
0255 };
0256 };
0257
0258 elm: elm@48080000 {
0259 compatible = "ti,am3352-elm";
0260 ti,hwmods = "elm";
0261 reg = <0x48080000 0x2000>;
0262 interrupts = <4>;
0263 };
0264
0265 gpio1: gpio@48032000 {
0266 compatible = "ti,omap4-gpio";
0267 ti,hwmods = "gpio1";
0268 ti,gpio-always-on;
0269 reg = <0x48032000 0x1000>;
0270 interrupts = <96>;
0271 gpio-controller;
0272 #gpio-cells = <2>;
0273 interrupt-controller;
0274 #interrupt-cells = <2>;
0275 };
0276
0277 gpio2: gpio@4804c000 {
0278 compatible = "ti,omap4-gpio";
0279 ti,hwmods = "gpio2";
0280 ti,gpio-always-on;
0281 reg = <0x4804c000 0x1000>;
0282 interrupts = <98>;
0283 gpio-controller;
0284 #gpio-cells = <2>;
0285 interrupt-controller;
0286 #interrupt-cells = <2>;
0287 };
0288
0289 gpmc: gpmc@50000000 {
0290 compatible = "ti,am3352-gpmc";
0291 ti,hwmods = "gpmc";
0292 reg = <0x50000000 0x2000>;
0293 #address-cells = <2>;
0294 #size-cells = <1>;
0295 interrupts = <100>;
0296 dmas = <&edma 52 0>;
0297 dma-names = "rxtx";
0298 gpmc,num-cs = <6>;
0299 gpmc,num-waitpins = <2>;
0300 interrupt-controller;
0301 #interrupt-cells = <2>;
0302 gpio-controller;
0303 #gpio-cells = <2>;
0304 };
0305
0306 i2c1: i2c@48028000 {
0307 compatible = "ti,omap4-i2c";
0308 ti,hwmods = "i2c1";
0309 reg = <0x48028000 0x1000>;
0310 #address-cells = <1>;
0311 #size-cells = <0>;
0312 interrupts = <70>;
0313 };
0314
0315 i2c2: i2c@4802a000 {
0316 compatible = "ti,omap4-i2c";
0317 ti,hwmods = "i2c2";
0318 reg = <0x4802a000 0x1000>;
0319 #address-cells = <1>;
0320 #size-cells = <0>;
0321 interrupts = <71>;
0322 };
0323
0324 intc: interrupt-controller@48200000 {
0325 compatible = "ti,dm816-intc";
0326 interrupt-controller;
0327 #interrupt-cells = <1>;
0328 reg = <0x48200000 0x1000>;
0329 };
0330
0331 rtc: rtc@480c0000 {
0332 compatible = "ti,am3352-rtc", "ti,da830-rtc";
0333 reg = <0x480c0000 0x1000>;
0334 interrupts = <75 76>;
0335 ti,hwmods = "rtc";
0336 };
0337
0338 mailbox: mailbox@480c8000 {
0339 compatible = "ti,omap4-mailbox";
0340 reg = <0x480c8000 0x2000>;
0341 interrupts = <77>;
0342 ti,hwmods = "mailbox";
0343 #mbox-cells = <1>;
0344 ti,mbox-num-users = <4>;
0345 ti,mbox-num-fifos = <12>;
0346 mbox_dsp: mbox-dsp {
0347 ti,mbox-tx = <3 0 0>;
0348 ti,mbox-rx = <0 0 0>;
0349 };
0350 };
0351
0352 spinbox: spinbox@480ca000 {
0353 compatible = "ti,omap4-hwspinlock";
0354 reg = <0x480ca000 0x2000>;
0355 ti,hwmods = "spinbox";
0356 #hwlock-cells = <1>;
0357 };
0358
0359 mdio: mdio@4a100800 {
0360 compatible = "ti,davinci_mdio";
0361 #address-cells = <1>;
0362 #size-cells = <0>;
0363 reg = <0x4a100800 0x100>;
0364 ti,hwmods = "davinci_mdio";
0365 bus_freq = <1000000>;
0366 phy0: ethernet-phy@0 {
0367 reg = <1>;
0368 };
0369 phy1: ethernet-phy@1 {
0370 reg = <2>;
0371 };
0372 };
0373
0374 eth0: ethernet@4a100000 {
0375 compatible = "ti,dm816-emac";
0376 ti,hwmods = "emac0";
0377 reg = <0x4a100000 0x800
0378 0x4a100900 0x3700>;
0379 clocks = <&sysclk24_ck>;
0380 syscon = <&scm_conf>;
0381 ti,davinci-ctrl-reg-offset = <0>;
0382 ti,davinci-ctrl-mod-reg-offset = <0x900>;
0383 ti,davinci-ctrl-ram-offset = <0x2000>;
0384 ti,davinci-ctrl-ram-size = <0x2000>;
0385 interrupts = <40 41 42 43>;
0386 phy-handle = <&phy0>;
0387 };
0388
0389 eth1: ethernet@4a120000 {
0390 compatible = "ti,dm816-emac";
0391 ti,hwmods = "emac1";
0392 reg = <0x4a120000 0x4000>;
0393 clocks = <&sysclk24_ck>;
0394 syscon = <&scm_conf>;
0395 ti,davinci-ctrl-reg-offset = <0>;
0396 ti,davinci-ctrl-mod-reg-offset = <0x900>;
0397 ti,davinci-ctrl-ram-offset = <0x2000>;
0398 ti,davinci-ctrl-ram-size = <0x2000>;
0399 interrupts = <44 45 46 47>;
0400 phy-handle = <&phy1>;
0401 };
0402
0403 sata: sata@4a140000 {
0404 compatible = "ti,dm816-ahci";
0405 reg = <0x4a140000 0x10000>;
0406 interrupts = <16>;
0407 ti,hwmods = "sata";
0408 };
0409
0410 mcspi1: spi@48030000 {
0411 compatible = "ti,omap4-mcspi";
0412 reg = <0x48030000 0x1000>;
0413 #address-cells = <1>;
0414 #size-cells = <0>;
0415 interrupts = <65>;
0416 ti,spi-num-cs = <4>;
0417 ti,hwmods = "mcspi1";
0418 dmas = <&edma 16 0 &edma 17 0
0419 &edma 18 0 &edma 19 0
0420 &edma 20 0 &edma 21 0
0421 &edma 22 0 &edma 23 0>;
0422 dma-names = "tx0", "rx0", "tx1", "rx1",
0423 "tx2", "rx2", "tx3", "rx3";
0424 };
0425
0426 mmc1: mmc@48060000 {
0427 compatible = "ti,omap4-hsmmc";
0428 reg = <0x48060000 0x11000>;
0429 ti,hwmods = "mmc1";
0430 interrupts = <64>;
0431 dmas = <&edma 24 0 &edma 25 0>;
0432 dma-names = "tx", "rx";
0433 };
0434
0435 timer1_target: target-module@4802e000 {
0436 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0437 reg = <0x4802e000 0x4>,
0438 <0x4802e010 0x4>;
0439 reg-names = "rev", "sysc";
0440 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0441 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0442 <SYSC_IDLE_NO>,
0443 <SYSC_IDLE_SMART>,
0444 <SYSC_IDLE_SMART_WKUP>;
0445 clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
0446 clock-names = "fck";
0447 #address-cells = <1>;
0448 #size-cells = <1>;
0449 ranges = <0x0 0x4802e000 0x1000>;
0450
0451 timer1: timer@0 {
0452 compatible = "ti,dm816-timer";
0453 reg = <0 0x1000>;
0454 interrupts = <67>;
0455 ti,timer-alwon;
0456 clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
0457 clock-names = "fck";
0458 };
0459 };
0460
0461 timer2_target: target-module@48040000 {
0462 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0463 reg = <0x48040000 0x4>,
0464 <0x48040010 0x4>;
0465 reg-names = "rev", "sysc";
0466 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0467 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0468 <SYSC_IDLE_NO>,
0469 <SYSC_IDLE_SMART>,
0470 <SYSC_IDLE_SMART_WKUP>;
0471 clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
0472 clock-names = "fck";
0473 #address-cells = <1>;
0474 #size-cells = <1>;
0475 ranges = <0x0 0x48040000 0x1000>;
0476
0477 timer2: timer@0 {
0478 compatible = "ti,dm816-timer";
0479 reg = <0 0x1000>;
0480 interrupts = <68>;
0481 clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
0482 clock-names = "fck";
0483 };
0484 };
0485
0486 timer3: timer@48042000 {
0487 compatible = "ti,dm816-timer";
0488 reg = <0x48042000 0x2000>;
0489 interrupts = <69>;
0490 ti,hwmods = "timer3";
0491 };
0492
0493 timer4: timer@48044000 {
0494 compatible = "ti,dm816-timer";
0495 reg = <0x48044000 0x2000>;
0496 interrupts = <92>;
0497 ti,hwmods = "timer4";
0498 ti,timer-pwm;
0499 };
0500
0501 timer5: timer@48046000 {
0502 compatible = "ti,dm816-timer";
0503 reg = <0x48046000 0x2000>;
0504 interrupts = <93>;
0505 ti,hwmods = "timer5";
0506 ti,timer-pwm;
0507 };
0508
0509 timer6: timer@48048000 {
0510 compatible = "ti,dm816-timer";
0511 reg = <0x48048000 0x2000>;
0512 interrupts = <94>;
0513 ti,hwmods = "timer6";
0514 ti,timer-pwm;
0515 };
0516
0517 timer7: timer@4804a000 {
0518 compatible = "ti,dm816-timer";
0519 reg = <0x4804a000 0x2000>;
0520 interrupts = <95>;
0521 ti,hwmods = "timer7";
0522 ti,timer-pwm;
0523 };
0524
0525 uart1: uart@48020000 {
0526 compatible = "ti,am3352-uart", "ti,omap3-uart";
0527 ti,hwmods = "uart1";
0528 reg = <0x48020000 0x2000>;
0529 clock-frequency = <48000000>;
0530 interrupts = <72>;
0531 dmas = <&edma 26 0 &edma 27 0>;
0532 dma-names = "tx", "rx";
0533 };
0534
0535 uart2: uart@48022000 {
0536 compatible = "ti,am3352-uart", "ti,omap3-uart";
0537 ti,hwmods = "uart2";
0538 reg = <0x48022000 0x2000>;
0539 clock-frequency = <48000000>;
0540 interrupts = <73>;
0541 dmas = <&edma 28 0 &edma 29 0>;
0542 dma-names = "tx", "rx";
0543 };
0544
0545 uart3: uart@48024000 {
0546 compatible = "ti,am3352-uart", "ti,omap3-uart";
0547 ti,hwmods = "uart3";
0548 reg = <0x48024000 0x2000>;
0549 clock-frequency = <48000000>;
0550 interrupts = <74>;
0551 dmas = <&edma 30 0 &edma 31 0>;
0552 dma-names = "tx", "rx";
0553 };
0554
0555 /* NOTE: USB needs a transceiver driver for phys to work */
0556 usb: usb_otg_hs@47401000 {
0557 compatible = "ti,am33xx-usb";
0558 reg = <0x47401000 0x400000>;
0559 ranges;
0560 #address-cells = <1>;
0561 #size-cells = <1>;
0562 ti,hwmods = "usb_otg_hs";
0563
0564 usb0: usb@47401000 {
0565 compatible = "ti,musb-dm816";
0566 reg = <0x47401400 0x400
0567 0x47401000 0x200>;
0568 reg-names = "mc", "control";
0569 interrupts = <18>;
0570 interrupt-names = "mc";
0571 dr_mode = "host";
0572 interface-type = <0>;
0573 phys = <&usb_phy0>;
0574 phy-names = "usb2-phy";
0575 mentor,multipoint = <1>;
0576 mentor,num-eps = <16>;
0577 mentor,ram-bits = <12>;
0578 mentor,power = <500>;
0579
0580 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
0581 &cppi41dma 2 0 &cppi41dma 3 0
0582 &cppi41dma 4 0 &cppi41dma 5 0
0583 &cppi41dma 6 0 &cppi41dma 7 0
0584 &cppi41dma 8 0 &cppi41dma 9 0
0585 &cppi41dma 10 0 &cppi41dma 11 0
0586 &cppi41dma 12 0 &cppi41dma 13 0
0587 &cppi41dma 14 0 &cppi41dma 0 1
0588 &cppi41dma 1 1 &cppi41dma 2 1
0589 &cppi41dma 3 1 &cppi41dma 4 1
0590 &cppi41dma 5 1 &cppi41dma 6 1
0591 &cppi41dma 7 1 &cppi41dma 8 1
0592 &cppi41dma 9 1 &cppi41dma 10 1
0593 &cppi41dma 11 1 &cppi41dma 12 1
0594 &cppi41dma 13 1 &cppi41dma 14 1>;
0595 dma-names =
0596 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
0597 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
0598 "rx14", "rx15",
0599 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
0600 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
0601 "tx14", "tx15";
0602 };
0603
0604 usb1: usb@47401800 {
0605 compatible = "ti,musb-dm816";
0606 reg = <0x47401c00 0x400
0607 0x47401800 0x200>;
0608 reg-names = "mc", "control";
0609 interrupts = <19>;
0610 interrupt-names = "mc";
0611 dr_mode = "host";
0612 interface-type = <0>;
0613 phys = <&usb_phy1>;
0614 phy-names = "usb2-phy";
0615 mentor,multipoint = <1>;
0616 mentor,num-eps = <16>;
0617 mentor,ram-bits = <12>;
0618 mentor,power = <500>;
0619
0620 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
0621 &cppi41dma 17 0 &cppi41dma 18 0
0622 &cppi41dma 19 0 &cppi41dma 20 0
0623 &cppi41dma 21 0 &cppi41dma 22 0
0624 &cppi41dma 23 0 &cppi41dma 24 0
0625 &cppi41dma 25 0 &cppi41dma 26 0
0626 &cppi41dma 27 0 &cppi41dma 28 0
0627 &cppi41dma 29 0 &cppi41dma 15 1
0628 &cppi41dma 16 1 &cppi41dma 17 1
0629 &cppi41dma 18 1 &cppi41dma 19 1
0630 &cppi41dma 20 1 &cppi41dma 21 1
0631 &cppi41dma 22 1 &cppi41dma 23 1
0632 &cppi41dma 24 1 &cppi41dma 25 1
0633 &cppi41dma 26 1 &cppi41dma 27 1
0634 &cppi41dma 28 1 &cppi41dma 29 1>;
0635 dma-names =
0636 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
0637 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
0638 "rx14", "rx15",
0639 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
0640 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
0641 "tx14", "tx15";
0642 };
0643
0644 cppi41dma: dma-controller@47402000 {
0645 compatible = "ti,am3359-cppi41";
0646 reg = <0x47400000 0x1000
0647 0x47402000 0x1000
0648 0x47403000 0x1000
0649 0x47404000 0x4000>;
0650 reg-names = "glue", "controller", "scheduler", "queuemgr";
0651 interrupts = <17>;
0652 interrupt-names = "glue";
0653 #dma-cells = <2>;
0654 /* For backwards compatibility: */
0655 #dma-channels = <30>;
0656 dma-channels = <30>;
0657 #dma-requests = <256>;
0658 dma-requests = <256>;
0659 };
0660 };
0661
0662 wd_timer2: wd_timer@480c2000 {
0663 compatible = "ti,omap3-wdt";
0664 ti,hwmods = "wd_timer";
0665 reg = <0x480c2000 0x1000>;
0666 interrupts = <0>;
0667 };
0668 };
0669 };
0670
0671 #include "dm816x-clocks.dtsi"
0672
0673 /* Preferred always-on timer for clocksource */
0674 &timer1_target {
0675 ti,no-reset-on-init;
0676 ti,no-idle;
0677 timer@0 {
0678 assigned-clocks = <&timer1_fck>;
0679 assigned-clock-parents = <&sys_clkin_ck>;
0680 };
0681 };
0682
0683 /* Preferred timer for clockevent */
0684 &timer2_target {
0685 ti,no-reset-on-init;
0686 ti,no-idle;
0687 timer@0 {
0688 assigned-clocks = <&timer2_fck>;
0689 assigned-clock-parents = <&sys_clkin_ck>;
0690 };
0691 };
