OSCL-LXR |
|
|
|
|||
0001 // SPDX-License-Identifier: GPL-2.0-only
0002
0003 #include <dt-bindings/bus/ti-sysc.h>
0004 #include <dt-bindings/clock/dm814.h>
0005 #include <dt-bindings/gpio/gpio.h>
0006 #include <dt-bindings/pinctrl/dm814x.h>
0007
0008 / {
0009 compatible = "ti,dm814";
0010 interrupt-parent = <&intc>;
0011 #address-cells = <1>;
0012 #size-cells = <1>;
0013 chosen { };
0014
0015 aliases {
0016 i2c0 = &i2c1;
0017 i2c1 = &i2c2;
0018 serial0 = &uart1;
0019 serial1 = &uart2;
0020 serial2 = &uart3;
0021 ethernet0 = &cpsw_emac0;
0022 ethernet1 = &cpsw_emac1;
0023 usb0 = &usb0;
0024 usb1 = &usb1;
0025 phy0 = &usb0_phy;
0026 phy1 = &usb1_phy;
0027 };
0028
0029 cpus {
0030 #address-cells = <1>;
0031 #size-cells = <0>;
0032 cpu@0 {
0033 compatible = "arm,cortex-a8";
0034 device_type = "cpu";
0035 reg = <0>;
0036 };
0037 };
0038
0039 pmu {
0040 compatible = "arm,cortex-a8-pmu";
0041 interrupts = <3>;
0042 };
0043
0044 /*
0045 * The soc node represents the soc top level view. It is used for IPs
0046 * that are not memory mapped in the MPU view or for the MPU itself.
0047 */
0048 soc {
0049 compatible = "ti,omap-infra";
0050 mpu {
0051 compatible = "ti,omap3-mpu";
0052 ti,hwmods = "mpu";
0053 };
0054 };
0055
0056 ocp {
0057 compatible = "simple-bus";
0058 #address-cells = <1>;
0059 #size-cells = <1>;
0060 ranges;
0061 ti,hwmods = "l3_main";
0062
0063 usb: usb@47400000 {
0064 compatible = "ti,am33xx-usb";
0065 reg = <0x47400000 0x1000>;
0066 ranges;
0067 #address-cells = <1>;
0068 #size-cells = <1>;
0069 ti,hwmods = "usb_otg_hs";
0070
0071 usb0_phy: usb-phy@47401300 {
0072 compatible = "ti,am335x-usb-phy";
0073 reg = <0x47401300 0x100>;
0074 reg-names = "phy";
0075 ti,ctrl_mod = <&usb_ctrl_mod>;
0076 #phy-cells = <0>;
0077 };
0078
0079 usb0: usb@47401000 {
0080 compatible = "ti,musb-am33xx";
0081 reg = <0x47401400 0x400
0082 0x47401000 0x200>;
0083 reg-names = "mc", "control";
0084
0085 interrupts = <18>;
0086 interrupt-names = "mc";
0087 dr_mode = "otg";
0088 mentor,multipoint = <1>;
0089 mentor,num-eps = <16>;
0090 mentor,ram-bits = <12>;
0091 mentor,power = <500>;
0092 phys = <&usb0_phy>;
0093
0094 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
0095 &cppi41dma 2 0 &cppi41dma 3 0
0096 &cppi41dma 4 0 &cppi41dma 5 0
0097 &cppi41dma 6 0 &cppi41dma 7 0
0098 &cppi41dma 8 0 &cppi41dma 9 0
0099 &cppi41dma 10 0 &cppi41dma 11 0
0100 &cppi41dma 12 0 &cppi41dma 13 0
0101 &cppi41dma 14 0 &cppi41dma 0 1
0102 &cppi41dma 1 1 &cppi41dma 2 1
0103 &cppi41dma 3 1 &cppi41dma 4 1
0104 &cppi41dma 5 1 &cppi41dma 6 1
0105 &cppi41dma 7 1 &cppi41dma 8 1
0106 &cppi41dma 9 1 &cppi41dma 10 1
0107 &cppi41dma 11 1 &cppi41dma 12 1
0108 &cppi41dma 13 1 &cppi41dma 14 1>;
0109 dma-names =
0110 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
0111 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
0112 "rx14", "rx15",
0113 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
0114 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
0115 "tx14", "tx15";
0116 };
0117
0118 usb1: usb@47401800 {
0119 compatible = "ti,musb-am33xx";
0120 reg = <0x47401c00 0x400
0121 0x47401800 0x200>;
0122 reg-names = "mc", "control";
0123 interrupts = <19>;
0124 interrupt-names = "mc";
0125 dr_mode = "otg";
0126 mentor,multipoint = <1>;
0127 mentor,num-eps = <16>;
0128 mentor,ram-bits = <12>;
0129 mentor,power = <500>;
0130 phys = <&usb1_phy>;
0131
0132 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
0133 &cppi41dma 17 0 &cppi41dma 18 0
0134 &cppi41dma 19 0 &cppi41dma 20 0
0135 &cppi41dma 21 0 &cppi41dma 22 0
0136 &cppi41dma 23 0 &cppi41dma 24 0
0137 &cppi41dma 25 0 &cppi41dma 26 0
0138 &cppi41dma 27 0 &cppi41dma 28 0
0139 &cppi41dma 29 0 &cppi41dma 15 1
0140 &cppi41dma 16 1 &cppi41dma 17 1
0141 &cppi41dma 18 1 &cppi41dma 19 1
0142 &cppi41dma 20 1 &cppi41dma 21 1
0143 &cppi41dma 22 1 &cppi41dma 23 1
0144 &cppi41dma 24 1 &cppi41dma 25 1
0145 &cppi41dma 26 1 &cppi41dma 27 1
0146 &cppi41dma 28 1 &cppi41dma 29 1>;
0147 dma-names =
0148 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
0149 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
0150 "rx14", "rx15",
0151 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
0152 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
0153 "tx14", "tx15";
0154 };
0155
0156 cppi41dma: dma-controller@47402000 {
0157 compatible = "ti,am3359-cppi41";
0158 reg = <0x47400000 0x1000
0159 0x47402000 0x1000
0160 0x47403000 0x1000
0161 0x47404000 0x4000>;
0162 reg-names = "glue", "controller", "scheduler", "queuemgr";
0163 interrupts = <17>;
0164 interrupt-names = "glue";
0165 #dma-cells = <2>;
0166 /* For backwards compatibility: */
0167 #dma-channels = <30>;
0168 dma-channels = <30>;
0169 #dma-requests = <256>;
0170 dma-requests = <256>;
0171 };
0172 };
0173
0174 /*
0175 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
0176 * It shows the module target agent registers though, so the
0177 * actual device is typically 0x1000 before the target agent
0178 * except in cases where the module is larger than 0x1000.
0179 */
0180 l4ls: l4ls@48000000 {
0181 compatible = "ti,dm814-l4ls", "simple-bus";
0182 #address-cells = <1>;
0183 #size-cells = <1>;
0184 ranges = <0 0x48000000 0x2000000>;
0185
0186 i2c1: i2c@28000 {
0187 compatible = "ti,omap4-i2c";
0188 #address-cells = <1>;
0189 #size-cells = <0>;
0190 ti,hwmods = "i2c1";
0191 reg = <0x28000 0x1000>;
0192 interrupts = <70>;
0193 };
0194
0195 elm: elm@80000 {
0196 compatible = "ti,814-elm";
0197 ti,hwmods = "elm";
0198 reg = <0x80000 0x2000>;
0199 interrupts = <4>;
0200 };
0201
0202 gpio1: gpio@32000 {
0203 compatible = "ti,omap4-gpio";
0204 ti,hwmods = "gpio1";
0205 ti,gpio-always-on;
0206 reg = <0x32000 0x2000>;
0207 interrupts = <96>;
0208 gpio-controller;
0209 #gpio-cells = <2>;
0210 interrupt-controller;
0211 #interrupt-cells = <2>;
0212 };
0213
0214 gpio2: gpio@4c000 {
0215 compatible = "ti,omap4-gpio";
0216 ti,hwmods = "gpio2";
0217 ti,gpio-always-on;
0218 reg = <0x4c000 0x2000>;
0219 interrupts = <98>;
0220 gpio-controller;
0221 #gpio-cells = <2>;
0222 interrupt-controller;
0223 #interrupt-cells = <2>;
0224 };
0225
0226 gpio3: gpio@1ac000 {
0227 compatible = "ti,omap4-gpio";
0228 ti,hwmods = "gpio3";
0229 ti,gpio-always-on;
0230 reg = <0x1ac000 0x2000>;
0231 interrupts = <32>;
0232 gpio-controller;
0233 #gpio-cells = <2>;
0234 interrupt-controller;
0235 #interrupt-cells = <2>;
0236 };
0237
0238 gpio4: gpio@1ae000 {
0239 compatible = "ti,omap4-gpio";
0240 ti,hwmods = "gpio4";
0241 ti,gpio-always-on;
0242 reg = <0x1ae000 0x2000>;
0243 interrupts = <62>;
0244 gpio-controller;
0245 #gpio-cells = <2>;
0246 interrupt-controller;
0247 #interrupt-cells = <2>;
0248 };
0249
0250 i2c2: i2c@2a000 {
0251 compatible = "ti,omap4-i2c";
0252 #address-cells = <1>;
0253 #size-cells = <0>;
0254 ti,hwmods = "i2c2";
0255 reg = <0x2a000 0x1000>;
0256 interrupts = <71>;
0257 };
0258
0259 mcspi1: spi@30000 {
0260 compatible = "ti,omap4-mcspi";
0261 reg = <0x30000 0x1000>;
0262 #address-cells = <1>;
0263 #size-cells = <0>;
0264 interrupts = <65>;
0265 ti,spi-num-cs = <4>;
0266 ti,hwmods = "mcspi1";
0267 dmas = <&edma 16 0 &edma 17 0
0268 &edma 18 0 &edma 19 0
0269 &edma 20 0 &edma 21 0
0270 &edma 22 0 &edma 23 0>;
0271
0272 dma-names = "tx0", "rx0", "tx1", "rx1",
0273 "tx2", "rx2", "tx3", "rx3";
0274 };
0275
0276 mcspi2: spi@1a0000 {
0277 compatible = "ti,omap4-mcspi";
0278 reg = <0x1a0000 0x1000>;
0279 #address-cells = <1>;
0280 #size-cells = <0>;
0281 interrupts = <125>;
0282 ti,spi-num-cs = <4>;
0283 ti,hwmods = "mcspi2";
0284 dmas = <&edma 42 0 &edma 43 0
0285 &edma 44 0 &edma 45 0>;
0286 dma-names = "tx0", "rx0", "tx1", "rx1";
0287 };
0288
0289 /* Board must configure dmas with edma_xbar for EDMA */
0290 mcspi3: spi@1a2000 {
0291 compatible = "ti,omap4-mcspi";
0292 reg = <0x1a2000 0x1000>;
0293 #address-cells = <1>;
0294 #size-cells = <0>;
0295 interrupts = <126>;
0296 ti,spi-num-cs = <4>;
0297 ti,hwmods = "mcspi3";
0298 };
0299
0300 mcspi4: spi@1a4000 {
0301 compatible = "ti,omap4-mcspi";
0302 reg = <0x1a4000 0x1000>;
0303 #address-cells = <1>;
0304 #size-cells = <0>;
0305 interrupts = <127>;
0306 ti,spi-num-cs = <4>;
0307 ti,hwmods = "mcspi4";
0308 };
0309
0310 timer1_target: target-module@2e000 {
0311 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0312 reg = <0x2e000 0x4>,
0313 <0x2e010 0x4>;
0314 reg-names = "rev", "sysc";
0315 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0316 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0317 <SYSC_IDLE_NO>,
0318 <SYSC_IDLE_SMART>,
0319 <SYSC_IDLE_SMART_WKUP>;
0320 clocks = <&timer1_fck>;
0321 clock-names = "fck";
0322 #address-cells = <1>;
0323 #size-cells = <1>;
0324 ranges = <0x0 0x2e000 0x1000>;
0325
0326 timer1: timer@0 {
0327 compatible = "ti,am335x-timer-1ms";
0328 reg = <0x0 0x400>;
0329 interrupts = <67>;
0330 ti,timer-alwon;
0331 clocks = <&timer1_fck>;
0332 clock-names = "fck";
0333 };
0334 };
0335
0336 uart1: uart@20000 {
0337 compatible = "ti,am3352-uart", "ti,omap3-uart";
0338 ti,hwmods = "uart1";
0339 reg = <0x20000 0x2000>;
0340 clock-frequency = <48000000>;
0341 interrupts = <72>;
0342 dmas = <&edma 26 0 &edma 27 0>;
0343 dma-names = "tx", "rx";
0344 };
0345
0346 uart2: uart@22000 {
0347 compatible = "ti,am3352-uart", "ti,omap3-uart";
0348 ti,hwmods = "uart2";
0349 reg = <0x22000 0x2000>;
0350 clock-frequency = <48000000>;
0351 interrupts = <73>;
0352 dmas = <&edma 28 0 &edma 29 0>;
0353 dma-names = "tx", "rx";
0354 };
0355
0356 uart3: uart@24000 {
0357 compatible = "ti,am3352-uart", "ti,omap3-uart";
0358 ti,hwmods = "uart3";
0359 reg = <0x24000 0x2000>;
0360 clock-frequency = <48000000>;
0361 interrupts = <74>;
0362 dmas = <&edma 30 0 &edma 31 0>;
0363 dma-names = "tx", "rx";
0364 };
0365
0366 timer2_target: target-module@40000 {
0367 compatible = "ti,sysc-omap4-timer", "ti,sysc";
0368 reg = <0x40000 0x4>,
0369 <0x40010 0x4>;
0370 reg-names = "rev", "sysc";
0371 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0372 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0373 <SYSC_IDLE_NO>,
0374 <SYSC_IDLE_SMART>,
0375 <SYSC_IDLE_SMART_WKUP>;
0376 clocks = <&timer2_fck>;
0377 clock-names = "fck";
0378 #address-cells = <1>;
0379 #size-cells = <1>;
0380 ranges = <0x0 0x40000 0x1000>;
0381
0382 timer2: timer@0 {
0383 compatible = "ti,dm814-timer";
0384 reg = <0 0x1000>;
0385 interrupts = <68>;
0386 clocks = <&timer2_fck>;
0387 clock-names = "fck";
0388 };
0389 };
0390
0391 timer3: timer@42000 {
0392 compatible = "ti,dm814-timer";
0393 reg = <0x42000 0x2000>;
0394 interrupts = <69>;
0395 ti,hwmods = "timer3";
0396 };
0397
0398 mmc1: mmc@60000 {
0399 compatible = "ti,omap4-hsmmc";
0400 ti,hwmods = "mmc1";
0401 dmas = <&edma 24 0
0402 &edma 25 0>;
0403 dma-names = "tx", "rx";
0404 interrupts = <64>;
0405 interrupt-parent = <&intc>;
0406 reg = <0x60000 0x1000>;
0407 };
0408
0409 rtc: rtc@c0000 {
0410 compatible = "ti,am3352-rtc", "ti,da830-rtc";
0411 reg = <0xc0000 0x1000>;
0412 interrupts = <75 76>;
0413 ti,hwmods = "rtc";
0414 };
0415
0416 mmc2: mmc@1d8000 {
0417 compatible = "ti,omap4-hsmmc";
0418 ti,hwmods = "mmc2";
0419 dmas = <&edma 2 0
0420 &edma 3 0>;
0421 dma-names = "tx", "rx";
0422 interrupts = <28>;
0423 interrupt-parent = <&intc>;
0424 reg = <0x1d8000 0x1000>;
0425 };
0426
0427 control: control@140000 {
0428 compatible = "ti,dm814-scm", "simple-bus";
0429 reg = <0x140000 0x20000>;
0430 #address-cells = <1>;
0431 #size-cells = <1>;
0432 ranges = <0 0x140000 0x20000>;
0433
0434 scm_conf: scm_conf@0 {
0435 compatible = "syscon", "simple-bus";
0436 reg = <0x0 0x800>;
0437 #address-cells = <1>;
0438 #size-cells = <1>;
0439 ranges = <0 0 0x800>;
0440
0441 phy_gmii_sel: phy-gmii-sel {
0442 compatible = "ti,dm814-phy-gmii-sel";
0443 reg = <0x650 0x4>;
0444 #phy-cells = <1>;
0445 };
0446
0447 scm_clocks: clocks {
0448 #address-cells = <1>;
0449 #size-cells = <0>;
0450 };
0451
0452 scm_clockdomains: clockdomains {
0453 };
0454 };
0455
0456 usb_ctrl_mod: control@620 {
0457 compatible = "ti,am335x-usb-ctrl-module";
0458 reg = <0x620 0x10
0459 0x648 0x4>;
0460 reg-names = "phy_ctrl", "wakeup";
0461 };
0462
0463 edma_xbar: dma-router@f90 {
0464 compatible = "ti,am335x-edma-crossbar";
0465 reg = <0xf90 0x40>;
0466 #dma-cells = <3>;
0467 dma-requests = <32>;
0468 dma-masters = <&edma>;
0469 };
0470
0471 /*
0472 * Note that silicon revision 2.1 and older
0473 * require input enabled (bit 18 set) for all
0474 * 3.3V I/Os to avoid cumulative hardware damage.
0475 * For more info, see errata advisory 2.1.87.
0476 * We leave bit 18 out of function-mask and rely
0477 * on the bootloader for it.
0478 */
0479 pincntl: pinmux@800 {
0480 compatible = "pinctrl-single";
0481 reg = <0x800 0x438>;
0482 #address-cells = <1>;
0483 #size-cells = <0>;
0484 #pinctrl-cells = <1>;
0485 pinctrl-single,register-width = <32>;
0486 pinctrl-single,function-mask = <0x307ff>;
0487 };
0488
0489 usb1_phy: usb-phy@1b00 {
0490 compatible = "ti,am335x-usb-phy";
0491 reg = <0x1b00 0x100>;
0492 reg-names = "phy";
0493 ti,ctrl_mod = <&usb_ctrl_mod>;
0494 #phy-cells = <0>;
0495 };
0496 };
0497
0498 prcm: prcm@180000 {
0499 compatible = "ti,dm814-prcm", "simple-bus";
0500 reg = <0x180000 0x2000>;
0501 #address-cells = <1>;
0502 #size-cells = <1>;
0503 ranges = <0 0x180000 0x2000>;
0504
0505 prcm_clocks: clocks {
0506 #address-cells = <1>;
0507 #size-cells = <0>;
0508 };
0509
0510 prcm_clockdomains: clockdomains {
0511 };
0512 };
0513
0514 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
0515 pllss: pllss@1c5000 {
0516 compatible = "ti,dm814-pllss", "simple-bus";
0517 reg = <0x1c5000 0x1000>;
0518 #address-cells = <1>;
0519 #size-cells = <1>;
0520 ranges = <0 0x1c5000 0x1000>;
0521
0522 pllss_clocks: clocks {
0523 #address-cells = <1>;
0524 #size-cells = <0>;
0525 };
0526
0527 pllss_clockdomains: clockdomains {
0528 };
0529 };
0530
0531 wdt1: wdt@1c7000 {
0532 compatible = "ti,omap3-wdt";
0533 ti,hwmods = "wd_timer";
0534 reg = <0x1c7000 0x1000>;
0535 interrupts = <91>;
0536 };
0537 };
0538
0539 intc: interrupt-controller@48200000 {
0540 compatible = "ti,dm814-intc";
0541 interrupt-controller;
0542 #interrupt-cells = <1>;
0543 reg = <0x48200000 0x1000>;
0544 };
0545
0546 /* Board must configure evtmux with edma_xbar for EDMA */
0547 mmc3: mmc@47810000 {
0548 compatible = "ti,omap4-hsmmc";
0549 ti,hwmods = "mmc3";
0550 interrupts = <29>;
0551 interrupt-parent = <&intc>;
0552 reg = <0x47810000 0x1000>;
0553 };
0554
0555 target-module@49000000 {
0556 compatible = "ti,sysc-omap4", "ti,sysc";
0557 reg = <0x49000000 0x4>;
0558 reg-names = "rev";
0559 clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
0560 clock-names = "fck";
0561 #address-cells = <1>;
0562 #size-cells = <1>;
0563 ranges = <0x0 0x49000000 0x10000>;
0564
0565 edma: dma@0 {
0566 compatible = "ti,edma3-tpcc";
0567 reg = <0 0x10000>;
0568 reg-names = "edma3_cc";
0569 interrupts = <12 13 14>;
0570 interrupt-names = "edma3_ccint", "edma3_mperr",
0571 "edma3_ccerrint";
0572 dma-requests = <64>;
0573 #dma-cells = <2>;
0574
0575 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
0576 <&edma_tptc2 3>, <&edma_tptc3 0>;
0577
0578 ti,edma-memcpy-channels = <20 21>;
0579 };
0580 };
0581
0582 target-module@49800000 {
0583 compatible = "ti,sysc-omap4", "ti,sysc";
0584 reg = <0x49800000 0x4>,
0585 <0x49800010 0x4>;
0586 reg-names = "rev", "sysc";
0587 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0588 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0589 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0590 <SYSC_IDLE_SMART>;
0591 clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
0592 clock-names = "fck";
0593 #address-cells = <1>;
0594 #size-cells = <1>;
0595 ranges = <0x0 0x49800000 0x100000>;
0596
0597 edma_tptc0: dma@0 {
0598 compatible = "ti,edma3-tptc";
0599 reg = <0 0x100000>;
0600 interrupts = <112>;
0601 interrupt-names = "edma3_tcerrint";
0602 };
0603 };
0604
0605 target-module@49900000 {
0606 compatible = "ti,sysc-omap4", "ti,sysc";
0607 reg = <0x49900000 0x4>,
0608 <0x49900010 0x4>;
0609 reg-names = "rev", "sysc";
0610 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0611 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0612 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0613 <SYSC_IDLE_SMART>;
0614 clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
0615 clock-names = "fck";
0616 #address-cells = <1>;
0617 #size-cells = <1>;
0618 ranges = <0x0 0x49900000 0x100000>;
0619
0620 edma_tptc1: dma@0 {
0621 compatible = "ti,edma3-tptc";
0622 reg = <0 0x100000>;
0623 interrupts = <113>;
0624 interrupt-names = "edma3_tcerrint";
0625 };
0626 };
0627
0628 target-module@49a00000 {
0629 compatible = "ti,sysc-omap4", "ti,sysc";
0630 reg = <0x49a00000 0x4>,
0631 <0x49a00010 0x4>;
0632 reg-names = "rev", "sysc";
0633 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0634 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0635 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0636 <SYSC_IDLE_SMART>;
0637 clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
0638 clock-names = "fck";
0639 #address-cells = <1>;
0640 #size-cells = <1>;
0641 ranges = <0x0 0x49a00000 0x100000>;
0642
0643 edma_tptc2: dma@0 {
0644 compatible = "ti,edma3-tptc";
0645 reg = <0 0x100000>;
0646 interrupts = <114>;
0647 interrupt-names = "edma3_tcerrint";
0648 };
0649 };
0650
0651 target-module@49b00000 {
0652 compatible = "ti,sysc-omap4", "ti,sysc";
0653 reg = <0x49b00000 0x4>,
0654 <0x49b00010 0x4>;
0655 reg-names = "rev", "sysc";
0656 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
0657 ti,sysc-midle = <SYSC_IDLE_FORCE>;
0658 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0659 <SYSC_IDLE_SMART>;
0660 clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
0661 clock-names = "fck";
0662 #address-cells = <1>;
0663 #size-cells = <1>;
0664 ranges = <0x0 0x49b00000 0x100000>;
0665
0666 edma_tptc3: dma@0 {
0667 compatible = "ti,edma3-tptc";
0668 reg = <0 0x100000>;
0669 interrupts = <115>;
0670 interrupt-names = "edma3_tcerrint";
0671 };
0672 };
0673
0674 /* See TRM "Table 1-318. L4HS Instance Summary" */
0675 l4hs: l4hs@4a000000 {
0676 compatible = "ti,dm814-l4hs", "simple-bus";
0677 #address-cells = <1>;
0678 #size-cells = <1>;
0679 ranges = <0 0x4a000000 0x1b4040>;
0680
0681 target-module@100000 {
0682 compatible = "ti,sysc-omap4-simple", "ti,sysc";
0683 reg = <0x100900 0x4>,
0684 <0x100908 0x4>,
0685 <0x100904 0x4>;
0686 reg-names = "rev", "sysc", "syss";
0687 ti,sysc-mask = <0>;
0688 ti,sysc-midle = <SYSC_IDLE_FORCE>,
0689 <SYSC_IDLE_NO>;
0690 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
0691 <SYSC_IDLE_NO>;
0692 ti,syss-mask = <1>;
0693 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
0694 clock-names = "fck";
0695 #address-cells = <1>;
0696 #size-cells = <1>;
0697 ranges = <0 0x100000 0x8000>;
0698
0699 mac: ethernet@0 {
0700 compatible = "ti,cpsw";
0701 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
0702 clock-names = "fck", "cpts";
0703 cpdma_channels = <8>;
0704 ale_entries = <1024>;
0705 bd_ram_size = <0x2000>;
0706 mac_control = <0x20>;
0707 slaves = <2>;
0708 active_slave = <0>;
0709 cpts_clock_mult = <0x80000000>;
0710 cpts_clock_shift = <29>;
0711 reg = <0 0x800>,
0712 <0x900 0x100>;
0713 #address-cells = <1>;
0714 #size-cells = <1>;
0715 /*
0716 * c0_rx_thresh_pend
0717 * c0_rx_pend
0718 * c0_tx_pend
0719 * c0_misc_pend
0720 */
0721 interrupts = <40 41 42 43>;
0722 ranges = <0 0 0x8000>;
0723 syscon = <&scm_conf>;
0724
0725 davinci_mdio: mdio@800 {
0726 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
0727 clocks = <&cpsw_125mhz_gclk>;
0728 clock-names = "fck";
0729 #address-cells = <1>;
0730 #size-cells = <0>;
0731 bus_freq = <1000000>;
0732 reg = <0x800 0x100>;
0733 };
0734
0735 cpsw_emac0: slave@200 {
0736 /* Filled in by U-Boot */
0737 mac-address = [ 00 00 00 00 00 00 ];
0738 phys = <&phy_gmii_sel 1>;
0739 };
0740
0741 cpsw_emac1: slave@300 {
0742 /* Filled in by U-Boot */
0743 mac-address = [ 00 00 00 00 00 00 ];
0744 phys = <&phy_gmii_sel 2>;
0745 };
0746 };
0747 };
0748 };
0749
0750 gpmc: gpmc@50000000 {
0751 compatible = "ti,am3352-gpmc";
0752 ti,hwmods = "gpmc";
0753 ti,no-idle-on-init;
0754 reg = <0x50000000 0x2000>;
0755 interrupts = <100>;
0756 gpmc,num-cs = <7>;
0757 gpmc,num-waitpins = <2>;
0758 #address-cells = <2>;
0759 #size-cells = <1>;
0760 interrupt-controller;
0761 #interrupt-cells = <2>;
0762 gpio-controller;
0763 #gpio-cells = <2>;
0764 };
0765 };
0766 };
0767
0768 #include "dm814x-clocks.dtsi"
0769
0770 /* Preferred always-on timer for clocksource */
0771 &timer1_target {
0772 ti,no-reset-on-init;
0773 ti,no-idle;
0774 timer@0 {
0775 assigned-clocks = <&timer1_fck>;
0776 assigned-clock-parents = <&devosc_ck>;
0777 };
0778 };
0779
0780 /* Preferred timer for clockevent */
0781 &timer2_target {
0782 ti,no-reset-on-init;
0783 ti,no-idle;
0784 timer@0 {
0785 assigned-clocks = <&timer2_fck>;
0786 assigned-clock-parents = <&devosc_ck>;
0787 };
0788 };
| [ Source navigation ] | [ Diff markup ] | [ Identifier search ] | [ general search ] |
|
This page was automatically generated by the 2.1.0 LXR engine. The LXR team |
|