0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /*
0003 * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
0004 *
0005 * Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
0006 *
0007 * based on GPL'ed 2.6 kernel sources
0008 * (c) Marvell International Ltd.
0009 */
0010
0011 #include <dt-bindings/clock/berlin2.h>
0012 #include <dt-bindings/interrupt-controller/arm-gic.h>
0013
0014 / {
0015 model = "Marvell Armada 1500-mini (BG2CD) SoC";
0016 compatible = "marvell,berlin2cd", "marvell,berlin";
0017 #address-cells = <1>;
0018 #size-cells = <1>;
0019
0020 aliases {
0021 serial0 = &uart0;
0022 serial1 = &uart1;
0023 };
0024
0025 cpus {
0026 #address-cells = <1>;
0027 #size-cells = <0>;
0028
0029 cpu: cpu@0 {
0030 compatible = "arm,cortex-a9";
0031 device_type = "cpu";
0032 next-level-cache = <&l2>;
0033 reg = <0>;
0034
0035 clocks = <&chip_clk CLKID_CPU>;
0036 clock-latency = <100000>;
0037 operating-points = <
0038 /* kHz uV */
0039 800000 1200000
0040 600000 1200000
0041 >;
0042 };
0043 };
0044
0045 pmu {
0046 compatible = "arm,cortex-a9-pmu";
0047 interrupt-parent = <&gic>;
0048 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
0049 };
0050
0051 refclk: oscillator {
0052 compatible = "fixed-clock";
0053 #clock-cells = <0>;
0054 clock-frequency = <25000000>;
0055 };
0056
0057 soc@f7000000 {
0058 compatible = "simple-bus";
0059 #address-cells = <1>;
0060 #size-cells = <1>;
0061 interrupt-parent = <&gic>;
0062
0063 ranges = <0 0xf7000000 0x1000000>;
0064
0065 sdhci0: mmc@ab0000 {
0066 compatible = "mrvl,pxav3-mmc";
0067 reg = <0xab0000 0x200>;
0068 clocks = <&chip_clk CLKID_SDIO0XIN>, <&chip_clk CLKID_SDIO0>;
0069 clock-names = "io", "core";
0070 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
0071 status = "disabled";
0072 };
0073
0074 l2: cache-controller@ac0000 {
0075 compatible = "arm,pl310-cache";
0076 reg = <0xac0000 0x1000>;
0077 cache-unified;
0078 cache-level = <2>;
0079 };
0080
0081 snoop-control-unit@ad0000 {
0082 compatible = "arm,cortex-a9-scu";
0083 reg = <0xad0000 0x100>;
0084 };
0085
0086 gic: interrupt-controller@ad1000 {
0087 compatible = "arm,cortex-a9-gic";
0088 reg = <0xad1000 0x1000>, <0xad0100 0x0100>;
0089 interrupt-controller;
0090 #interrupt-cells = <3>;
0091 };
0092
0093 global-timer@ad0200 {
0094 compatible = "arm,cortex-a9-global-timer";
0095 reg = <0xad0200 0x20>;
0096 interrupts = <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
0097 clocks = <&chip_clk CLKID_TWD>;
0098 };
0099
0100 local-timer@ad0600 {
0101 compatible = "arm,cortex-a9-twd-timer";
0102 reg = <0xad0600 0x20>;
0103 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
0104 clocks = <&chip_clk CLKID_TWD>;
0105 };
0106
0107 local-wdt@ad0620 {
0108 compatible = "arm,cortex-a9-twd-wdt";
0109 reg = <0xad0620 0x20>;
0110 interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
0111 clocks = <&chip_clk CLKID_TWD>;
0112 };
0113
0114 usb_phy0: usb-phy@b74000 {
0115 compatible = "marvell,berlin2cd-usb-phy";
0116 reg = <0xb74000 0x128>;
0117 #phy-cells = <0>;
0118 resets = <&chip_rst 0x178 23>;
0119 status = "disabled";
0120 };
0121
0122 usb_phy1: usb-phy@b78000 {
0123 compatible = "marvell,berlin2cd-usb-phy";
0124 reg = <0xb78000 0x128>;
0125 #phy-cells = <0>;
0126 resets = <&chip_rst 0x178 24>;
0127 status = "disabled";
0128 };
0129
0130 eth1: ethernet@b90000 {
0131 compatible = "marvell,pxa168-eth";
0132 reg = <0xb90000 0x10000>;
0133 clocks = <&chip_clk CLKID_GETH1>;
0134 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
0135 /* set by bootloader */
0136 local-mac-address = [00 00 00 00 00 00];
0137 #address-cells = <1>;
0138 #size-cells = <0>;
0139 phy-connection-type = "mii";
0140 phy-handle = <ðphy1>;
0141 status = "disabled";
0142
0143 ethphy1: ethernet-phy@0 {
0144 reg = <0>;
0145 };
0146 };
0147
0148 eth0: ethernet@e50000 {
0149 compatible = "marvell,pxa168-eth";
0150 reg = <0xe50000 0x10000>;
0151 clocks = <&chip_clk CLKID_GETH0>;
0152 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0153 /* set by bootloader */
0154 local-mac-address = [00 00 00 00 00 00];
0155 #address-cells = <1>;
0156 #size-cells = <0>;
0157 phy-connection-type = "mii";
0158 phy-handle = <ðphy0>;
0159 status = "disabled";
0160
0161 ethphy0: ethernet-phy@0 {
0162 reg = <0>;
0163 };
0164 };
0165
0166 apb@e80000 {
0167 compatible = "simple-bus";
0168 #address-cells = <1>;
0169 #size-cells = <1>;
0170
0171 ranges = <0 0xe80000 0x10000>;
0172 interrupt-parent = <&aic>;
0173
0174 gpio0: gpio@400 {
0175 compatible = "snps,dw-apb-gpio";
0176 reg = <0x0400 0x400>;
0177 #address-cells = <1>;
0178 #size-cells = <0>;
0179
0180 porta: gpio-port@0 {
0181 compatible = "snps,dw-apb-gpio-port";
0182 gpio-controller;
0183 #gpio-cells = <2>;
0184 ngpios = <8>;
0185 reg = <0>;
0186 interrupt-controller;
0187 #interrupt-cells = <2>;
0188 interrupts = <0>;
0189 };
0190 };
0191
0192 gpio1: gpio@800 {
0193 compatible = "snps,dw-apb-gpio";
0194 reg = <0x0800 0x400>;
0195 #address-cells = <1>;
0196 #size-cells = <0>;
0197
0198 portb: gpio-port@1 {
0199 compatible = "snps,dw-apb-gpio-port";
0200 gpio-controller;
0201 #gpio-cells = <2>;
0202 ngpios = <8>;
0203 reg = <0>;
0204 interrupt-controller;
0205 #interrupt-cells = <2>;
0206 interrupts = <1>;
0207 };
0208 };
0209
0210 gpio2: gpio@c00 {
0211 compatible = "snps,dw-apb-gpio";
0212 reg = <0x0c00 0x400>;
0213 #address-cells = <1>;
0214 #size-cells = <0>;
0215
0216 portc: gpio-port@2 {
0217 compatible = "snps,dw-apb-gpio-port";
0218 gpio-controller;
0219 #gpio-cells = <2>;
0220 ngpios = <8>;
0221 reg = <0>;
0222 interrupt-controller;
0223 #interrupt-cells = <2>;
0224 interrupts = <2>;
0225 };
0226 };
0227
0228 gpio3: gpio@1000 {
0229 compatible = "snps,dw-apb-gpio";
0230 reg = <0x1000 0x400>;
0231 #address-cells = <1>;
0232 #size-cells = <0>;
0233
0234 portd: gpio-port@3 {
0235 compatible = "snps,dw-apb-gpio-port";
0236 gpio-controller;
0237 #gpio-cells = <2>;
0238 ngpios = <8>;
0239 reg = <0>;
0240 interrupt-controller;
0241 #interrupt-cells = <2>;
0242 interrupts = <3>;
0243 };
0244 };
0245
0246 i2c0: i2c@1400 {
0247 compatible = "snps,designware-i2c";
0248 #address-cells = <1>;
0249 #size-cells = <0>;
0250 reg = <0x1400 0x100>;
0251 interrupts = <16>;
0252 clocks = <&chip_clk CLKID_CFG>;
0253 status = "disabled";
0254 };
0255
0256 i2c1: i2c@1800 {
0257 compatible = "snps,designware-i2c";
0258 #address-cells = <1>;
0259 #size-cells = <0>;
0260 reg = <0x1800 0x100>;
0261 interrupts = <17>;
0262 clocks = <&chip_clk CLKID_CFG>;
0263 status = "disabled";
0264 };
0265
0266 spi0: spi@1c00 {
0267 compatible = "snps,dw-apb-ssi";
0268 #address-cells = <1>;
0269 #size-cells = <0>;
0270 reg = <0x1c00 0x100>;
0271 interrupts = <4>;
0272 clocks = <&chip_clk CLKID_CFG>;
0273 status = "disabled";
0274 };
0275
0276 wdt4: watchdog@2000 {
0277 compatible = "snps,dw-wdt";
0278 reg = <0x2000 0x100>;
0279 clocks = <&chip_clk CLKID_CFG>;
0280 interrupts = <5>;
0281 status = "disabled";
0282 };
0283
0284 wdt5: watchdog@2400 {
0285 compatible = "snps,dw-wdt";
0286 reg = <0x2400 0x100>;
0287 clocks = <&chip_clk CLKID_CFG>;
0288 interrupts = <6>;
0289 status = "disabled";
0290 };
0291
0292 wdt6: watchdog@2800 {
0293 compatible = "snps,dw-wdt";
0294 reg = <0x2800 0x100>;
0295 clocks = <&chip_clk CLKID_CFG>;
0296 interrupts = <7>;
0297 status = "disabled";
0298 };
0299
0300 timer0: timer@2c00 {
0301 compatible = "snps,dw-apb-timer";
0302 reg = <0x2c00 0x14>;
0303 interrupts = <8>;
0304 clocks = <&chip_clk CLKID_CFG>;
0305 clock-names = "timer";
0306 status = "okay";
0307 };
0308
0309 timer1: timer@2c14 {
0310 compatible = "snps,dw-apb-timer";
0311 reg = <0x2c14 0x14>;
0312 interrupts = <9>;
0313 clocks = <&chip_clk CLKID_CFG>;
0314 clock-names = "timer";
0315 status = "okay";
0316 };
0317
0318 timer2: timer@2c28 {
0319 compatible = "snps,dw-apb-timer";
0320 reg = <0x2c28 0x14>;
0321 interrupts = <10>;
0322 clocks = <&chip_clk CLKID_CFG>;
0323 clock-names = "timer";
0324 status = "disabled";
0325 };
0326
0327 timer3: timer@2c3c {
0328 compatible = "snps,dw-apb-timer";
0329 reg = <0x2c3c 0x14>;
0330 interrupts = <11>;
0331 clocks = <&chip_clk CLKID_CFG>;
0332 clock-names = "timer";
0333 status = "disabled";
0334 };
0335
0336 timer4: timer@2c50 {
0337 compatible = "snps,dw-apb-timer";
0338 reg = <0x2c50 0x14>;
0339 interrupts = <12>;
0340 clocks = <&chip_clk CLKID_CFG>;
0341 clock-names = "timer";
0342 status = "disabled";
0343 };
0344
0345 timer5: timer@2c64 {
0346 compatible = "snps,dw-apb-timer";
0347 reg = <0x2c64 0x14>;
0348 interrupts = <13>;
0349 clocks = <&chip_clk CLKID_CFG>;
0350 clock-names = "timer";
0351 status = "disabled";
0352 };
0353
0354 timer6: timer@2c78 {
0355 compatible = "snps,dw-apb-timer";
0356 reg = <0x2c78 0x14>;
0357 interrupts = <14>;
0358 clocks = <&chip_clk CLKID_CFG>;
0359 clock-names = "timer";
0360 status = "disabled";
0361 };
0362
0363 timer7: timer@2c8c {
0364 compatible = "snps,dw-apb-timer";
0365 reg = <0x2c8c 0x14>;
0366 interrupts = <15>;
0367 clocks = <&chip_clk CLKID_CFG>;
0368 clock-names = "timer";
0369 status = "disabled";
0370 };
0371
0372 aic: interrupt-controller@3000 {
0373 compatible = "snps,dw-apb-ictl";
0374 reg = <0x3000 0xc00>;
0375 interrupt-controller;
0376 #interrupt-cells = <1>;
0377 interrupt-parent = <&gic>;
0378 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
0379 };
0380 };
0381
0382 chip: chip-control@ea0000 {
0383 compatible = "simple-mfd", "syscon";
0384 reg = <0xea0000 0x400>;
0385
0386 chip_clk: clock {
0387 compatible = "marvell,berlin2-clk";
0388 #clock-cells = <1>;
0389 clocks = <&refclk>;
0390 clock-names = "refclk";
0391 };
0392
0393 soc_pinctrl: pin-controller {
0394 compatible = "marvell,berlin2cd-soc-pinctrl";
0395
0396 uart0_pmux: uart0-pmux {
0397 groups = "G6";
0398 function = "uart0";
0399 };
0400 };
0401
0402 chip_rst: reset {
0403 compatible = "marvell,berlin2-reset";
0404 #reset-cells = <2>;
0405 };
0406 };
0407
0408 usb0: usb@ed0000 {
0409 compatible = "chipidea,usb2";
0410 reg = <0xed0000 0x200>;
0411 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
0412 clocks = <&chip_clk CLKID_USB0>;
0413 phys = <&usb_phy0>;
0414 phy-names = "usb-phy";
0415 status = "disabled";
0416 };
0417
0418 usb1: usb@ee0000 {
0419 compatible = "chipidea,usb2";
0420 reg = <0xee0000 0x200>;
0421 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
0422 clocks = <&chip_clk CLKID_USB1>;
0423 phys = <&usb_phy1>;
0424 phy-names = "usb-phy";
0425 status = "disabled";
0426 };
0427
0428 pwm: pwm@f20000 {
0429 compatible = "marvell,berlin-pwm";
0430 reg = <0xf20000 0x40>;
0431 clocks = <&chip_clk CLKID_CFG>;
0432 #pwm-cells = <3>;
0433 };
0434
0435 apb@fc0000 {
0436 compatible = "simple-bus";
0437 #address-cells = <1>;
0438 #size-cells = <1>;
0439
0440 ranges = <0 0xfc0000 0x10000>;
0441 interrupt-parent = <&sic>;
0442
0443 wdt0: watchdog@1000 {
0444 compatible = "snps,dw-wdt";
0445 reg = <0x1000 0x100>;
0446 clocks = <&refclk>;
0447 interrupts = <0>;
0448 };
0449
0450 wdt1: watchdog@2000 {
0451 compatible = "snps,dw-wdt";
0452 reg = <0x2000 0x100>;
0453 clocks = <&refclk>;
0454 interrupts = <1>;
0455 status = "disabled";
0456 };
0457
0458 wdt2: watchdog@3000 {
0459 compatible = "snps,dw-wdt";
0460 reg = <0x3000 0x100>;
0461 clocks = <&refclk>;
0462 interrupts = <2>;
0463 status = "disabled";
0464 };
0465
0466 sm_gpio1: gpio@5000 {
0467 compatible = "snps,dw-apb-gpio";
0468 reg = <0x5000 0x400>;
0469 #address-cells = <1>;
0470 #size-cells = <0>;
0471
0472 portf: gpio-port@5 {
0473 compatible = "snps,dw-apb-gpio-port";
0474 gpio-controller;
0475 #gpio-cells = <2>;
0476 ngpios = <8>;
0477 reg = <0>;
0478 };
0479 };
0480
0481 spi1: spi@6000 {
0482 compatible = "snps,dw-apb-ssi";
0483 #address-cells = <1>;
0484 #size-cells = <0>;
0485 reg = <0x6000 0x100>;
0486 clocks = <&refclk>;
0487 interrupts = <5>;
0488 status = "disabled";
0489 };
0490
0491 i2c2: i2c@7000 {
0492 compatible = "snps,designware-i2c";
0493 #address-cells = <1>;
0494 #size-cells = <0>;
0495 reg = <0x7000 0x100>;
0496 interrupts = <6>;
0497 clocks = <&refclk>;
0498 status = "disabled";
0499 };
0500
0501 i2c3: i2c@8000 {
0502 compatible = "snps,designware-i2c";
0503 #address-cells = <1>;
0504 #size-cells = <0>;
0505 reg = <0x8000 0x100>;
0506 interrupts = <7>;
0507 clocks = <&refclk>;
0508 status = "disabled";
0509 };
0510
0511 sm_gpio0: gpio@c000 {
0512 compatible = "snps,dw-apb-gpio";
0513 reg = <0xc000 0x400>;
0514 #address-cells = <1>;
0515 #size-cells = <0>;
0516
0517 porte: gpio-port@4 {
0518 compatible = "snps,dw-apb-gpio-port";
0519 gpio-controller;
0520 #gpio-cells = <2>;
0521 ngpios = <8>;
0522 reg = <0>;
0523 };
0524 };
0525
0526 uart0: serial@9000 {
0527 compatible = "snps,dw-apb-uart";
0528 reg = <0x9000 0x100>;
0529 reg-shift = <2>;
0530 reg-io-width = <1>;
0531 interrupts = <8>;
0532 clocks = <&refclk>;
0533 pinctrl-0 = <&uart0_pmux>;
0534 pinctrl-names = "default";
0535 status = "disabled";
0536 };
0537
0538 uart1: serial@a000 {
0539 compatible = "snps,dw-apb-uart";
0540 reg = <0xa000 0x100>;
0541 reg-shift = <2>;
0542 reg-io-width = <1>;
0543 interrupts = <9>;
0544 clocks = <&refclk>;
0545 status = "disabled";
0546 };
0547
0548 uart2: serial@b000 {
0549 compatible = "snps,dw-apb-uart";
0550 reg = <0xb000 0x100>;
0551 reg-shift = <2>;
0552 reg-io-width = <1>;
0553 interrupts = <10>;
0554 clocks = <&refclk>;
0555 status = "disabled";
0556 };
0557
0558 sysctrl: system-controller@d000 {
0559 compatible = "simple-mfd", "syscon";
0560 reg = <0xd000 0x100>;
0561
0562 sys_pinctrl: pin-controller {
0563 compatible = "marvell,berlin2cd-system-pinctrl";
0564 };
0565
0566 adc: adc {
0567 compatible = "marvell,berlin2-adc";
0568 interrupts = <12>, <14>;
0569 interrupt-names = "adc", "tsen";
0570 };
0571 };
0572
0573 sic: interrupt-controller@e000 {
0574 compatible = "snps,dw-apb-ictl";
0575 reg = <0xe000 0x400>;
0576 interrupt-controller;
0577 #interrupt-cells = <1>;
0578 interrupt-parent = <&gic>;
0579 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
0580 };
0581 };
0582 };
0583 };
