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0001 /*
0002  * Broadcom BCM470X / BCM5301X ARM platform code.
0003  * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
0004  * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
0005  *
0006  * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
0007  *
0008  * Licensed under the GNU/GPL. See COPYING for details.
0009  */
0010 
0011 #include <dt-bindings/clock/bcm-nsp.h>
0012 #include <dt-bindings/gpio/gpio.h>
0013 #include <dt-bindings/input/input.h>
0014 #include <dt-bindings/interrupt-controller/irq.h>
0015 #include <dt-bindings/interrupt-controller/arm-gic.h>
0016 
0017 / {
0018         #address-cells = <1>;
0019         #size-cells = <1>;
0020         interrupt-parent = <&gic>;
0021 
0022         chipcommon-a-bus@18000000 {
0023                 compatible = "simple-bus";
0024                 ranges = <0x00000000 0x18000000 0x00001000>;
0025                 #address-cells = <1>;
0026                 #size-cells = <1>;
0027 
0028                 uart0: serial@300 {
0029                         compatible = "ns16550";
0030                         reg = <0x0300 0x100>;
0031                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0032                         clocks = <&iprocslow>;
0033                         status = "disabled";
0034                 };
0035 
0036                 uart1: serial@400 {
0037                         compatible = "ns16550";
0038                         reg = <0x0400 0x100>;
0039                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0040                         clocks = <&iprocslow>;
0041                         pinctrl-names = "default";
0042                         pinctrl-0 = <&pinmux_uart1>;
0043                         status = "disabled";
0044                 };
0045         };
0046 
0047         mpcore-bus@19000000 {
0048                 compatible = "simple-bus";
0049                 ranges = <0x00000000 0x19000000 0x00023000>;
0050                 #address-cells = <1>;
0051                 #size-cells = <1>;
0052 
0053                 a9pll: arm_clk@0 {
0054                         #clock-cells = <0>;
0055                         compatible = "brcm,nsp-armpll";
0056                         clocks = <&osc>;
0057                         reg = <0x00000 0x1000>;
0058                 };
0059 
0060                 scu@20000 {
0061                         compatible = "arm,cortex-a9-scu";
0062                         reg = <0x20000 0x100>;
0063                 };
0064 
0065                 timer@20200 {
0066                         compatible = "arm,cortex-a9-global-timer";
0067                         reg = <0x20200 0x100>;
0068                         interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
0069                         clocks = <&periph_clk>;
0070                 };
0071 
0072                 timer@20600 {
0073                         compatible = "arm,cortex-a9-twd-timer";
0074                         reg = <0x20600 0x20>;
0075                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
0076                                                   IRQ_TYPE_EDGE_RISING)>;
0077                         clocks = <&periph_clk>;
0078                 };
0079 
0080                 watchdog@20620 {
0081                         compatible = "arm,cortex-a9-twd-wdt";
0082                         reg = <0x20620 0x20>;
0083                         interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
0084                                                   IRQ_TYPE_EDGE_RISING)>;
0085                         clocks = <&periph_clk>;
0086                 };
0087 
0088                 gic: interrupt-controller@21000 {
0089                         compatible = "arm,cortex-a9-gic";
0090                         #interrupt-cells = <3>;
0091                         #address-cells = <0>;
0092                         interrupt-controller;
0093                         reg = <0x21000 0x1000>,
0094                               <0x20100 0x100>;
0095                 };
0096 
0097                 L2: cache-controller@22000 {
0098                         compatible = "arm,pl310-cache";
0099                         reg = <0x22000 0x1000>;
0100                         cache-unified;
0101                         arm,shared-override;
0102                         prefetch-data = <1>;
0103                         prefetch-instr = <1>;
0104                         cache-level = <2>;
0105                 };
0106         };
0107 
0108         pmu {
0109                 compatible = "arm,cortex-a9-pmu";
0110                 interrupts =
0111                         <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
0112                         <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0113         };
0114 
0115         clocks {
0116                 #address-cells = <1>;
0117                 #size-cells = <1>;
0118                 ranges;
0119 
0120                 osc: oscillator {
0121                         #clock-cells = <0>;
0122                         compatible = "fixed-clock";
0123                         clock-frequency = <25000000>;
0124                 };
0125 
0126                 iprocmed: iprocmed {
0127                         #clock-cells = <0>;
0128                         compatible = "fixed-factor-clock";
0129                         clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
0130                         clock-div = <2>;
0131                         clock-mult = <1>;
0132                 };
0133 
0134                 iprocslow: iprocslow {
0135                         #clock-cells = <0>;
0136                         compatible = "fixed-factor-clock";
0137                         clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
0138                         clock-div = <4>;
0139                         clock-mult = <1>;
0140                 };
0141 
0142                 periph_clk: periph_clk {
0143                         #clock-cells = <0>;
0144                         compatible = "fixed-factor-clock";
0145                         clocks = <&a9pll>;
0146                         clock-div = <2>;
0147                         clock-mult = <1>;
0148                 };
0149         };
0150 
0151         axi@18000000 {
0152                 compatible = "brcm,bus-axi";
0153                 reg = <0x18000000 0x1000>;
0154                 ranges = <0x00000000 0x18000000 0x00100000>;
0155                 #address-cells = <1>;
0156                 #size-cells = <1>;
0157 
0158                 #interrupt-cells = <1>;
0159                 interrupt-map-mask = <0x000fffff 0xffff>;
0160                 interrupt-map = 
0161                         /* ChipCommon */
0162                         <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
0163 
0164                         /* Switch Register Access Block */
0165                         <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
0166                         <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
0167                         <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
0168                         <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
0169                         <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
0170                         <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
0171                         <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
0172                         <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
0173                         <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
0174                         <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
0175                         <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
0176                         <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
0177                         <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
0178 
0179                         /* PCIe Controller 0 */
0180                         <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
0181                         <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
0182                         <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0183                         <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0184                         <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
0185                         <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
0186 
0187                         /* PCIe Controller 1 */
0188                         <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
0189                         <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
0190                         <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
0191                         <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
0192                         <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
0193                         <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
0194 
0195                         /* PCIe Controller 2 */
0196                         <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
0197                         <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
0198                         <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
0199                         <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
0200                         <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
0201                         <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
0202 
0203                         /* USB 2.0 Controller */
0204                         <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
0205 
0206                         /* USB 3.0 Controller */
0207                         <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
0208 
0209                         /* Ethernet Controller 0 */
0210                         <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
0211 
0212                         /* Ethernet Controller 1 */
0213                         <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
0214 
0215                         /* Ethernet Controller 2 */
0216                         <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
0217 
0218                         /* Ethernet Controller 3 */
0219                         <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
0220 
0221                         /* NAND Controller */
0222                         <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
0223                         <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
0224                         <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
0225                         <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
0226                         <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
0227                         <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
0228                         <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
0229                         <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
0230 
0231                 chipcommon: chipcommon@0 {
0232                         reg = <0x00000000 0x1000>;
0233 
0234                         gpio-controller;
0235                         #gpio-cells = <2>;
0236                         interrupt-controller;
0237                         #interrupt-cells = <2>;
0238                 };
0239 
0240                 pcie0: pcie@12000 {
0241                         reg = <0x00012000 0x1000>;
0242                 };
0243 
0244                 pcie1: pcie@13000 {
0245                         reg = <0x00013000 0x1000>;
0246                 };
0247 
0248                 pcie2: pcie@14000 {
0249                         reg = <0x00014000 0x1000>;
0250                 };
0251 
0252                 usb2: usb2@21000 {
0253                         reg = <0x00021000 0x1000>;
0254 
0255                         #address-cells = <1>;
0256                         #size-cells = <1>;
0257                         ranges;
0258 
0259                         interrupt-parent = <&gic>;
0260 
0261                         ehci: usb@21000 {
0262                                 #usb-cells = <0>;
0263 
0264                                 compatible = "generic-ehci";
0265                                 reg = <0x00021000 0x1000>;
0266                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
0267                                 phys = <&usb2_phy>;
0268 
0269                                 #address-cells = <1>;
0270                                 #size-cells = <0>;
0271 
0272                                 ehci_port1: port@1 {
0273                                         reg = <1>;
0274                                         #trigger-source-cells = <0>;
0275                                 };
0276 
0277                                 ehci_port2: port@2 {
0278                                         reg = <2>;
0279                                         #trigger-source-cells = <0>;
0280                                 };
0281                         };
0282 
0283                         ohci: usb@22000 {
0284                                 #usb-cells = <0>;
0285 
0286                                 compatible = "generic-ohci";
0287                                 reg = <0x00022000 0x1000>;
0288                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
0289 
0290                                 #address-cells = <1>;
0291                                 #size-cells = <0>;
0292 
0293                                 ohci_port1: port@1 {
0294                                         reg = <1>;
0295                                         #trigger-source-cells = <0>;
0296                                 };
0297 
0298                                 ohci_port2: port@2 {
0299                                         reg = <2>;
0300                                         #trigger-source-cells = <0>;
0301                                 };
0302                         };
0303                 };
0304 
0305                 usb3: usb3@23000 {
0306                         reg = <0x00023000 0x1000>;
0307 
0308                         #address-cells = <1>;
0309                         #size-cells = <1>;
0310                         ranges;
0311 
0312                         interrupt-parent = <&gic>;
0313 
0314                         xhci: usb@23000 {
0315                                 #usb-cells = <0>;
0316 
0317                                 compatible = "generic-xhci";
0318                                 reg = <0x00023000 0x1000>;
0319                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
0320                                 phys = <&usb3_phy>;
0321                                 phy-names = "usb";
0322 
0323                                 #address-cells = <1>;
0324                                 #size-cells = <0>;
0325 
0326                                 xhci_port1: port@1 {
0327                                         reg = <1>;
0328                                         #trigger-source-cells = <0>;
0329                                 };
0330                         };
0331                 };
0332 
0333                 gmac0: ethernet@24000 {
0334                         reg = <0x24000 0x800>;
0335                 };
0336 
0337                 gmac1: ethernet@25000 {
0338                         reg = <0x25000 0x800>;
0339                 };
0340 
0341                 gmac2: ethernet@26000 {
0342                         reg = <0x26000 0x800>;
0343                 };
0344 
0345                 gmac3: ethernet@27000 {
0346                         reg = <0x27000 0x800>;
0347                 };
0348         };
0349 
0350         pwm: pwm@18002000 {
0351                 compatible = "brcm,iproc-pwm";
0352                 reg = <0x18002000 0x28>;
0353                 clocks = <&osc>;
0354                 #pwm-cells = <3>;
0355                 status = "disabled";
0356         };
0357 
0358         mdio: mdio@18003000 {
0359                 compatible = "brcm,iproc-mdio";
0360                 reg = <0x18003000 0x8>;
0361                 #size-cells = <0>;
0362                 #address-cells = <1>;
0363         };
0364 
0365         mdio-mux@18003000 {
0366                 compatible = "mdio-mux-mmioreg", "mdio-mux";
0367                 mdio-parent-bus = <&mdio>;
0368                 #address-cells = <1>;
0369                 #size-cells = <0>;
0370                 reg = <0x18003000 0x4>;
0371                 mux-mask = <0x200>;
0372 
0373                 mdio@0 {
0374                         reg = <0x0>;
0375                         #address-cells = <1>;
0376                         #size-cells = <0>;
0377 
0378                         usb3_phy: usb3-phy@10 {
0379                                 compatible = "brcm,ns-ax-usb3-phy";
0380                                 reg = <0x10>;
0381                                 usb3-dmp-syscon = <&usb3_dmp>;
0382                                 #phy-cells = <0>;
0383                                 status = "disabled";
0384                         };
0385                 };
0386         };
0387 
0388         usb3_dmp: syscon@18105000 {
0389                 reg = <0x18105000 0x1000>;
0390         };
0391 
0392         uart2: serial@18008000 {
0393                 compatible = "ns16550a";
0394                 reg = <0x18008000 0x20>;
0395                 clocks = <&iprocslow>;
0396                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
0397                 reg-shift = <2>;
0398                 status = "disabled";
0399         };
0400 
0401         i2c0: i2c@18009000 {
0402                 compatible = "brcm,iproc-i2c";
0403                 reg = <0x18009000 0x50>;
0404                 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
0405                 #address-cells = <1>;
0406                 #size-cells = <0>;
0407                 clock-frequency = <100000>;
0408                 status = "disabled";
0409         };
0410 
0411         dmu-bus@1800c000 {
0412                 compatible = "simple-bus";
0413                 ranges = <0 0x1800c000 0x1000>;
0414                 #address-cells = <1>;
0415                 #size-cells = <1>;
0416 
0417                 cru-bus@100 {
0418                         compatible = "brcm,ns-cru", "simple-mfd";
0419                         reg = <0x100 0x1a4>;
0420                         ranges;
0421                         #address-cells = <1>;
0422                         #size-cells = <1>;
0423 
0424                         lcpll0: clock-controller@100 {
0425                                 #clock-cells = <1>;
0426                                 compatible = "brcm,nsp-lcpll0";
0427                                 reg = <0x100 0x14>;
0428                                 clocks = <&osc>;
0429                                 clock-output-names = "lcpll0", "pcie_phy",
0430                                                      "sdio", "ddr_phy";
0431                         };
0432 
0433                         genpll: clock-controller@140 {
0434                                 #clock-cells = <1>;
0435                                 compatible = "brcm,nsp-genpll";
0436                                 reg = <0x140 0x24>;
0437                                 clocks = <&osc>;
0438                                 clock-output-names = "genpll", "phy",
0439                                                      "ethernetclk",
0440                                                      "usbclk", "iprocfast",
0441                                                      "sata1", "sata2";
0442                         };
0443 
0444                         usb2_phy: phy@164 {
0445                                 compatible = "brcm,ns-usb2-phy";
0446                                 reg = <0x164 0x4>;
0447                                 brcm,syscon-clkset = <&cru_clkset>;
0448                                 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
0449                                 clock-names = "phy-ref-clk";
0450                                 #phy-cells = <0>;
0451                         };
0452 
0453                         cru_clkset: syscon@180 {
0454                                 compatible = "brcm,cru-clkset", "syscon";
0455                                 reg = <0x180 0x4>;
0456                         };
0457 
0458                         pinctrl: pinctrl@1c0 {
0459                                 compatible = "brcm,bcm4708-pinmux";
0460                                 reg = <0x1c0 0x24>;
0461                                 reg-names = "cru_gpio_control";
0462 
0463                                 spi-pins {
0464                                         groups = "spi_grp";
0465                                         function = "spi";
0466                                 };
0467 
0468                                 pinmux_i2c: i2c-pins {
0469                                         groups = "i2c_grp";
0470                                         function = "i2c";
0471                                 };
0472 
0473                                 pinmux_pwm: pwm-pins {
0474                                         groups = "pwm0_grp", "pwm1_grp",
0475                                                  "pwm2_grp", "pwm3_grp";
0476                                         function = "pwm";
0477                                 };
0478 
0479                                 pinmux_uart1: uart1-pins {
0480                                         groups = "uart1_grp";
0481                                         function = "uart1";
0482                                 };
0483                         };
0484 
0485                         thermal: thermal@2c0 {
0486                                 compatible = "brcm,ns-thermal";
0487                                 reg = <0x2c0 0x10>;
0488                                 #thermal-sensor-cells = <0>;
0489                         };
0490                 };
0491         };
0492 
0493         srab: ethernet-switch@18007000 {
0494                 compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
0495                 reg = <0x18007000 0x1000>;
0496 
0497                 status = "disabled";
0498 
0499                 /* ports are defined in board DTS */
0500                 ports {
0501                         #address-cells = <1>;
0502                         #size-cells = <0>;
0503                 };
0504         };
0505 
0506         rng: rng@18004000 {
0507                 compatible = "brcm,bcm5301x-rng";
0508                 reg = <0x18004000 0x14>;
0509         };
0510 
0511         nand_controller: nand-controller@18028000 {
0512                 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
0513                 reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
0514                 reg-names = "nand", "iproc-idm", "iproc-ext";
0515                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
0516 
0517                 #address-cells = <1>;
0518                 #size-cells = <0>;
0519 
0520                 brcm,nand-has-wp;
0521         };
0522 
0523         spi@18029200 {
0524                 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
0525                 reg = <0x18029200 0x184>,
0526                       <0x18029000 0x124>,
0527                       <0x1811b408 0x004>,
0528                       <0x180293a0 0x01c>;
0529                 reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
0530                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
0531                              <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
0532                              <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0533                              <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
0534                              <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
0535                              <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
0536                              <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
0537                 interrupt-names = "mspi_done",
0538                                   "mspi_halted",
0539                                   "spi_lr_fullness_reached",
0540                                   "spi_lr_session_aborted",
0541                                   "spi_lr_impatient",
0542                                   "spi_lr_session_done",
0543                                   "spi_lr_overread";
0544                 clocks = <&iprocmed>;
0545                 clock-names = "iprocmed";
0546                 num-cs = <2>;
0547                 #address-cells = <1>;
0548                 #size-cells = <0>;
0549 
0550                 spi_nor: flash@0 {
0551                         compatible = "jedec,spi-nor";
0552                         reg = <0>;
0553                         spi-max-frequency = <20000000>;
0554                         status = "disabled";
0555 
0556                         partitions {
0557                                 compatible = "brcm,bcm947xx-cfe-partitions";
0558                         };
0559                 };
0560         };
0561 
0562         thermal-zones {
0563                 cpu_thermal: cpu-thermal {
0564                         polling-delay-passive = <0>;
0565                         polling-delay = <1000>;
0566                         coefficients = <(-556) 418000>;
0567                         thermal-sensors = <&thermal>;
0568 
0569                         trips {
0570                                 cpu-crit {
0571                                         temperature = <125000>;
0572                                         hysteresis = <0>;
0573                                         type = "critical";
0574                                 };
0575                         };
0576 
0577                         cooling-maps {
0578                         };
0579                 };
0580         };
0581 };