0001 /*
0002 * BSD LICENSE
0003 *
0004 * Copyright(c) 2016 Broadcom. All rights reserved.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions
0008 * are met:
0009 *
0010 * * Redistributions of source code must retain the above copyright
0011 * notice, this list of conditions and the following disclaimer.
0012 * * Redistributions in binary form must reproduce the above copyright
0013 * notice, this list of conditions and the following disclaimer in
0014 * the documentation and/or other materials provided with the
0015 * distribution.
0016 * * Neither the name of Broadcom Corporation nor the names of its
0017 * contributors may be used to endorse or promote products derived
0018 * from this software without specific prior written permission.
0019 *
0020 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0021 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0022 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
0023 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0024 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0025 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
0026 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0027 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0028 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0029 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
0030 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0031 */
0032
0033 #include <dt-bindings/interrupt-controller/arm-gic.h>
0034 #include <dt-bindings/interrupt-controller/irq.h>
0035
0036 /* BCM23550 and BCM21664 have almost identical clocks */
0037 #include "dt-bindings/clock/bcm21664.h"
0038
0039 / {
0040 #address-cells = <1>;
0041 #size-cells = <1>;
0042 model = "BCM23550 SoC";
0043 compatible = "brcm,bcm23550";
0044 interrupt-parent = <&gic>;
0045
0046 cpus {
0047 #address-cells = <1>;
0048 #size-cells = <0>;
0049
0050 cpu0: cpu@0 {
0051 device_type = "cpu";
0052 compatible = "arm,cortex-a7";
0053 reg = <0>;
0054 clock-frequency = <1000000000>;
0055 };
0056
0057 cpu1: cpu@1 {
0058 device_type = "cpu";
0059 compatible = "arm,cortex-a7";
0060 enable-method = "brcm,bcm23550";
0061 secondary-boot-reg = <0x35004178>;
0062 reg = <1>;
0063 clock-frequency = <1000000000>;
0064 };
0065
0066 cpu2: cpu@2 {
0067 device_type = "cpu";
0068 compatible = "arm,cortex-a7";
0069 enable-method = "brcm,bcm23550";
0070 secondary-boot-reg = <0x35004178>;
0071 reg = <2>;
0072 clock-frequency = <1000000000>;
0073 };
0074
0075 cpu3: cpu@3 {
0076 device_type = "cpu";
0077 compatible = "arm,cortex-a7";
0078 enable-method = "brcm,bcm23550";
0079 secondary-boot-reg = <0x35004178>;
0080 reg = <3>;
0081 clock-frequency = <1000000000>;
0082 };
0083 };
0084
0085 /* Hub bus */
0086 hub@34000000 {
0087 compatible = "simple-bus";
0088 ranges = <0 0x34000000 0x102f83ac>;
0089 #address-cells = <1>;
0090 #size-cells = <1>;
0091
0092 smc@4e000 {
0093 compatible = "brcm,bcm23550-smc", "brcm,kona-smc";
0094 reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
0095 };
0096
0097 resetmgr: reset-controller@1001f00 {
0098 compatible = "brcm,bcm21664-resetmgr";
0099 reg = <0x01001f00 0x24>;
0100 };
0101
0102 gpio: gpio@1003000 {
0103 compatible = "brcm,bcm23550-gpio", "brcm,kona-gpio";
0104 reg = <0x01003000 0x524>;
0105 interrupts =
0106 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
0107 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
0108 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
0109 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
0110 #gpio-cells = <2>;
0111 #interrupt-cells = <2>;
0112 gpio-controller;
0113 interrupt-controller;
0114 };
0115
0116 timer@1006000 {
0117 compatible = "brcm,kona-timer";
0118 reg = <0x01006000 0x1c>;
0119 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0120 clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
0121 };
0122 };
0123
0124 /* Slaves bus */
0125 slaves@3e000000 {
0126 compatible = "simple-bus";
0127 ranges = <0 0x3e000000 0x0001c070>;
0128 #address-cells = <1>;
0129 #size-cells = <1>;
0130
0131 uartb: serial@0 {
0132 compatible = "snps,dw-apb-uart";
0133 status = "disabled";
0134 reg = <0x00000000 0x118>;
0135 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
0136 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
0137 reg-shift = <2>;
0138 reg-io-width = <4>;
0139 };
0140
0141 uartb2: serial@1000 {
0142 compatible = "snps,dw-apb-uart";
0143 status = "disabled";
0144 reg = <0x00001000 0x118>;
0145 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
0146 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
0147 reg-shift = <2>;
0148 reg-io-width = <4>;
0149 };
0150
0151 uartb3: serial@2000 {
0152 compatible = "snps,dw-apb-uart";
0153 status = "disabled";
0154 reg = <0x00002000 0x118>;
0155 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
0156 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
0157 reg-shift = <2>;
0158 reg-io-width = <4>;
0159 };
0160
0161 bsc1: i2c@16000 {
0162 compatible = "brcm,kona-i2c";
0163 reg = <0x00016000 0x70>;
0164 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
0165 #address-cells = <1>;
0166 #size-cells = <0>;
0167 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
0168 status = "disabled";
0169 };
0170
0171 bsc2: i2c@17000 {
0172 compatible = "brcm,kona-i2c";
0173 reg = <0x00017000 0x70>;
0174 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
0175 #address-cells = <1>;
0176 #size-cells = <0>;
0177 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
0178 status = "disabled";
0179 };
0180
0181 bsc3: i2c@18000 {
0182 compatible = "brcm,kona-i2c";
0183 reg = <0x00018000 0x70>;
0184 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
0185 #address-cells = <1>;
0186 #size-cells = <0>;
0187 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
0188 status = "disabled";
0189 };
0190
0191 bsc4: i2c@1c000 {
0192 compatible = "brcm,kona-i2c";
0193 reg = <0x0001c000 0x70>;
0194 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
0195 #address-cells = <1>;
0196 #size-cells = <0>;
0197 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
0198 status = "disabled";
0199 };
0200 };
0201
0202 /* Apps bus */
0203 apps@3e300000 {
0204 compatible = "simple-bus";
0205 ranges = <0 0x3e300000 0x01b77000>;
0206 #address-cells = <1>;
0207 #size-cells = <1>;
0208
0209 usbotg: usb@e20000 {
0210 compatible = "snps,dwc2";
0211 reg = <0x00e20000 0x10000>;
0212 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
0213 clocks = <&usb_otg_ahb_clk>;
0214 clock-names = "otg";
0215 phys = <&usbphy>;
0216 phy-names = "usb2-phy";
0217 status = "disabled";
0218 };
0219
0220 usbphy: usb-phy@e30000 {
0221 compatible = "brcm,kona-usb2-phy";
0222 reg = <0x00e30000 0x28>;
0223 #phy-cells = <0>;
0224 status = "disabled";
0225 };
0226
0227 sdio1: sdio@e80000 {
0228 compatible = "brcm,kona-sdhci";
0229 reg = <0x00e80000 0x801c>;
0230 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
0231 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
0232 status = "disabled";
0233 };
0234
0235 sdio2: sdio@e90000 {
0236 compatible = "brcm,kona-sdhci";
0237 reg = <0x00e90000 0x801c>;
0238 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
0239 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
0240 status = "disabled";
0241 };
0242
0243 sdio3: sdio@ea0000 {
0244 compatible = "brcm,kona-sdhci";
0245 reg = <0x00ea0000 0x801c>;
0246 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
0247 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
0248 status = "disabled";
0249 };
0250
0251 sdio4: sdio@eb0000 {
0252 compatible = "brcm,kona-sdhci";
0253 reg = <0x00eb0000 0x801c>;
0254 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0255 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
0256 status = "disabled";
0257 };
0258
0259 cdc: cdc@1b0e000 {
0260 compatible = "brcm,bcm23550-cdc";
0261 reg = <0x01b0e000 0x78>;
0262 };
0263
0264 gic: interrupt-controller@1b21000 {
0265 compatible = "arm,cortex-a9-gic";
0266 #interrupt-cells = <3>;
0267 #address-cells = <0>;
0268 interrupt-controller;
0269 reg = <0x01b21000 0x1000>,
0270 <0x01b22000 0x1000>;
0271 };
0272 };
0273
0274 clocks {
0275 #address-cells = <1>;
0276 #size-cells = <1>;
0277 ranges;
0278
0279 /*
0280 * Fixed clocks are defined before CCUs whose
0281 * clocks may depend on them.
0282 */
0283
0284 ref_32k_clk: ref_32k {
0285 #clock-cells = <0>;
0286 compatible = "fixed-clock";
0287 clock-frequency = <32768>;
0288 };
0289
0290 bbl_32k_clk: bbl_32k {
0291 #clock-cells = <0>;
0292 compatible = "fixed-clock";
0293 clock-frequency = <32768>;
0294 };
0295
0296 ref_13m_clk: ref_13m {
0297 #clock-cells = <0>;
0298 compatible = "fixed-clock";
0299 clock-frequency = <13000000>;
0300 };
0301
0302 var_13m_clk: var_13m {
0303 #clock-cells = <0>;
0304 compatible = "fixed-clock";
0305 clock-frequency = <13000000>;
0306 };
0307
0308 dft_19_5m_clk: dft_19_5m {
0309 #clock-cells = <0>;
0310 compatible = "fixed-clock";
0311 clock-frequency = <19500000>;
0312 };
0313
0314 ref_crystal_clk: ref_crystal {
0315 #clock-cells = <0>;
0316 compatible = "fixed-clock";
0317 clock-frequency = <26000000>;
0318 };
0319
0320 ref_52m_clk: ref_52m {
0321 #clock-cells = <0>;
0322 compatible = "fixed-clock";
0323 clock-frequency = <52000000>;
0324 };
0325
0326 var_52m_clk: var_52m {
0327 #clock-cells = <0>;
0328 compatible = "fixed-clock";
0329 clock-frequency = <52000000>;
0330 };
0331
0332 usb_otg_ahb_clk: usb_otg_ahb {
0333 #clock-cells = <0>;
0334 compatible = "fixed-clock";
0335 clock-frequency = <52000000>;
0336 };
0337
0338 ref_96m_clk: ref_96m {
0339 #clock-cells = <0>;
0340 compatible = "fixed-clock";
0341 clock-frequency = <96000000>;
0342 };
0343
0344 var_96m_clk: var_96m {
0345 #clock-cells = <0>;
0346 compatible = "fixed-clock";
0347 clock-frequency = <96000000>;
0348 };
0349
0350 ref_104m_clk: ref_104m {
0351 #clock-cells = <0>;
0352 compatible = "fixed-clock";
0353 clock-frequency = <104000000>;
0354 };
0355
0356 var_104m_clk: var_104m {
0357 #clock-cells = <0>;
0358 compatible = "fixed-clock";
0359 clock-frequency = <104000000>;
0360 };
0361
0362 ref_156m_clk: ref_156m {
0363 #clock-cells = <0>;
0364 compatible = "fixed-clock";
0365 clock-frequency = <156000000>;
0366 };
0367
0368 var_156m_clk: var_156m {
0369 #clock-cells = <0>;
0370 compatible = "fixed-clock";
0371 clock-frequency = <156000000>;
0372 };
0373
0374 root_ccu: root_ccu@35001000 {
0375 compatible = BCM21664_DT_ROOT_CCU_COMPAT;
0376 reg = <0x35001000 0x0f00>;
0377 #clock-cells = <1>;
0378 clock-output-names = "frac_1m";
0379 };
0380
0381 aon_ccu: aon_ccu@35002000 {
0382 compatible = BCM21664_DT_AON_CCU_COMPAT;
0383 reg = <0x35002000 0x0f00>;
0384 #clock-cells = <1>;
0385 clock-output-names = "hub_timer";
0386 };
0387
0388 slave_ccu: slave_ccu@3e011000 {
0389 compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
0390 reg = <0x3e011000 0x0f00>;
0391 #clock-cells = <1>;
0392 clock-output-names = "uartb",
0393 "uartb2",
0394 "uartb3",
0395 "bsc1",
0396 "bsc2",
0397 "bsc3",
0398 "bsc4";
0399 };
0400
0401 master_ccu: master_ccu@3f001000 {
0402 compatible = BCM21664_DT_MASTER_CCU_COMPAT;
0403 reg = <0x3f001000 0x0f00>;
0404 #clock-cells = <1>;
0405 clock-output-names = "sdio1",
0406 "sdio2",
0407 "sdio3",
0408 "sdio4",
0409 "sdio1_sleep",
0410 "sdio2_sleep",
0411 "sdio3_sleep",
0412 "sdio4_sleep";
0413 };
0414 };
0415 };
