0001 // SPDX-License-Identifier: GPL-2.0-only
0002 // Copyright (C) 2014 Broadcom Corporation
0003
0004 #include <dt-bindings/interrupt-controller/arm-gic.h>
0005 #include <dt-bindings/interrupt-controller/irq.h>
0006
0007 #include "dt-bindings/clock/bcm21664.h"
0008
0009 / {
0010 #address-cells = <1>;
0011 #size-cells = <1>;
0012 model = "BCM21664 SoC";
0013 compatible = "brcm,bcm21664";
0014 interrupt-parent = <&gic>;
0015
0016 chosen {
0017 bootargs = "console=ttyS0,115200n8";
0018 };
0019
0020 cpus {
0021 #address-cells = <1>;
0022 #size-cells = <0>;
0023
0024 cpu0: cpu@0 {
0025 device_type = "cpu";
0026 compatible = "arm,cortex-a9";
0027 reg = <0>;
0028 };
0029
0030 cpu1: cpu@1 {
0031 device_type = "cpu";
0032 compatible = "arm,cortex-a9";
0033 enable-method = "brcm,bcm11351-cpu-method";
0034 secondary-boot-reg = <0x35004178>;
0035 reg = <1>;
0036 };
0037 };
0038
0039 gic: interrupt-controller@3ff00100 {
0040 compatible = "arm,cortex-a9-gic";
0041 #interrupt-cells = <3>;
0042 #address-cells = <0>;
0043 interrupt-controller;
0044 reg = <0x3ff01000 0x1000>,
0045 <0x3ff00100 0x100>;
0046 };
0047
0048 smc@3404e000 {
0049 compatible = "brcm,bcm21664-smc", "brcm,kona-smc";
0050 reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
0051 };
0052
0053 uart@3e000000 {
0054 compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
0055 status = "disabled";
0056 reg = <0x3e000000 0x118>;
0057 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB>;
0058 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
0059 reg-shift = <2>;
0060 reg-io-width = <4>;
0061 };
0062
0063 uart@3e001000 {
0064 compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
0065 status = "disabled";
0066 reg = <0x3e001000 0x118>;
0067 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB2>;
0068 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
0069 reg-shift = <2>;
0070 reg-io-width = <4>;
0071 };
0072
0073 uart@3e002000 {
0074 compatible = "brcm,bcm21664-dw-apb-uart", "snps,dw-apb-uart";
0075 status = "disabled";
0076 reg = <0x3e002000 0x118>;
0077 clocks = <&slave_ccu BCM21664_SLAVE_CCU_UARTB3>;
0078 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
0079 reg-shift = <2>;
0080 reg-io-width = <4>;
0081 };
0082
0083 L2: cache-controller@3ff20000 {
0084 compatible = "arm,pl310-cache";
0085 reg = <0x3ff20000 0x1000>;
0086 cache-unified;
0087 cache-level = <2>;
0088 };
0089
0090 brcm,resetmgr@35001f00 {
0091 compatible = "brcm,bcm21664-resetmgr";
0092 reg = <0x35001f00 0x24>;
0093 };
0094
0095 timer@35006000 {
0096 compatible = "brcm,kona-timer";
0097 reg = <0x35006000 0x1c>;
0098 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0099 clocks = <&aon_ccu BCM21664_AON_CCU_HUB_TIMER>;
0100 };
0101
0102 gpio: gpio@35003000 {
0103 compatible = "brcm,bcm21664-gpio", "brcm,kona-gpio";
0104 reg = <0x35003000 0x524>;
0105 interrupts =
0106 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
0107 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
0108 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
0109 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
0110 #gpio-cells = <2>;
0111 #interrupt-cells = <2>;
0112 gpio-controller;
0113 interrupt-controller;
0114 };
0115
0116 sdio1: sdio@3f180000 {
0117 compatible = "brcm,kona-sdhci";
0118 reg = <0x3f180000 0x801c>;
0119 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
0120 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO1>;
0121 status = "disabled";
0122 };
0123
0124 sdio2: sdio@3f190000 {
0125 compatible = "brcm,kona-sdhci";
0126 reg = <0x3f190000 0x801c>;
0127 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
0128 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO2>;
0129 status = "disabled";
0130 };
0131
0132 sdio3: sdio@3f1a0000 {
0133 compatible = "brcm,kona-sdhci";
0134 reg = <0x3f1a0000 0x801c>;
0135 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
0136 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO3>;
0137 status = "disabled";
0138 };
0139
0140 sdio4: sdio@3f1b0000 {
0141 compatible = "brcm,kona-sdhci";
0142 reg = <0x3f1b0000 0x801c>;
0143 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
0144 clocks = <&master_ccu BCM21664_MASTER_CCU_SDIO4>;
0145 status = "disabled";
0146 };
0147
0148 i2c@3e016000 {
0149 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
0150 reg = <0x3e016000 0x70>;
0151 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
0152 #address-cells = <1>;
0153 #size-cells = <0>;
0154 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC1>;
0155 status = "disabled";
0156 };
0157
0158 i2c@3e017000 {
0159 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
0160 reg = <0x3e017000 0x70>;
0161 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
0162 #address-cells = <1>;
0163 #size-cells = <0>;
0164 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC2>;
0165 status = "disabled";
0166 };
0167
0168 i2c@3e018000 {
0169 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
0170 reg = <0x3e018000 0x70>;
0171 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
0172 #address-cells = <1>;
0173 #size-cells = <0>;
0174 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC3>;
0175 status = "disabled";
0176 };
0177
0178 i2c@3e01c000 {
0179 compatible = "brcm,bcm21664-i2c", "brcm,kona-i2c";
0180 reg = <0x3e01c000 0x70>;
0181 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
0182 #address-cells = <1>;
0183 #size-cells = <0>;
0184 clocks = <&slave_ccu BCM21664_SLAVE_CCU_BSC4>;
0185 status = "disabled";
0186 };
0187
0188 clocks {
0189 #address-cells = <1>;
0190 #size-cells = <1>;
0191 ranges;
0192
0193 /*
0194 * Fixed clocks are defined before CCUs whose
0195 * clocks may depend on them.
0196 */
0197
0198 ref_32k_clk: ref_32k {
0199 #clock-cells = <0>;
0200 compatible = "fixed-clock";
0201 clock-frequency = <32768>;
0202 };
0203
0204 bbl_32k_clk: bbl_32k {
0205 #clock-cells = <0>;
0206 compatible = "fixed-clock";
0207 clock-frequency = <32768>;
0208 };
0209
0210 ref_13m_clk: ref_13m {
0211 #clock-cells = <0>;
0212 compatible = "fixed-clock";
0213 clock-frequency = <13000000>;
0214 };
0215
0216 var_13m_clk: var_13m {
0217 #clock-cells = <0>;
0218 compatible = "fixed-clock";
0219 clock-frequency = <13000000>;
0220 };
0221
0222 dft_19_5m_clk: dft_19_5m {
0223 #clock-cells = <0>;
0224 compatible = "fixed-clock";
0225 clock-frequency = <19500000>;
0226 };
0227
0228 ref_crystal_clk: ref_crystal {
0229 #clock-cells = <0>;
0230 compatible = "fixed-clock";
0231 clock-frequency = <26000000>;
0232 };
0233
0234 ref_52m_clk: ref_52m {
0235 #clock-cells = <0>;
0236 compatible = "fixed-clock";
0237 clock-frequency = <52000000>;
0238 };
0239
0240 var_52m_clk: var_52m {
0241 #clock-cells = <0>;
0242 compatible = "fixed-clock";
0243 clock-frequency = <52000000>;
0244 };
0245
0246 usb_otg_ahb_clk: usb_otg_ahb {
0247 #clock-cells = <0>;
0248 compatible = "fixed-clock";
0249 clock-frequency = <52000000>;
0250 };
0251
0252 ref_96m_clk: ref_96m {
0253 #clock-cells = <0>;
0254 compatible = "fixed-clock";
0255 clock-frequency = <96000000>;
0256 };
0257
0258 var_96m_clk: var_96m {
0259 #clock-cells = <0>;
0260 compatible = "fixed-clock";
0261 clock-frequency = <96000000>;
0262 };
0263
0264 ref_104m_clk: ref_104m {
0265 #clock-cells = <0>;
0266 compatible = "fixed-clock";
0267 clock-frequency = <104000000>;
0268 };
0269
0270 var_104m_clk: var_104m {
0271 #clock-cells = <0>;
0272 compatible = "fixed-clock";
0273 clock-frequency = <104000000>;
0274 };
0275
0276 ref_156m_clk: ref_156m {
0277 #clock-cells = <0>;
0278 compatible = "fixed-clock";
0279 clock-frequency = <156000000>;
0280 };
0281
0282 var_156m_clk: var_156m {
0283 #clock-cells = <0>;
0284 compatible = "fixed-clock";
0285 clock-frequency = <156000000>;
0286 };
0287
0288 root_ccu: root_ccu@35001000 {
0289 compatible = BCM21664_DT_ROOT_CCU_COMPAT;
0290 reg = <0x35001000 0x0f00>;
0291 #clock-cells = <1>;
0292 clock-output-names = "frac_1m";
0293 };
0294
0295 aon_ccu: aon_ccu@35002000 {
0296 compatible = BCM21664_DT_AON_CCU_COMPAT;
0297 reg = <0x35002000 0x0f00>;
0298 #clock-cells = <1>;
0299 clock-output-names = "hub_timer";
0300 };
0301
0302 master_ccu: master_ccu@3f001000 {
0303 compatible = BCM21664_DT_MASTER_CCU_COMPAT;
0304 reg = <0x3f001000 0x0f00>;
0305 #clock-cells = <1>;
0306 clock-output-names = "sdio1",
0307 "sdio2",
0308 "sdio3",
0309 "sdio4",
0310 "sdio1_sleep",
0311 "sdio2_sleep",
0312 "sdio3_sleep",
0313 "sdio4_sleep";
0314 };
0315
0316 slave_ccu: slave_ccu@3e011000 {
0317 compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
0318 reg = <0x3e011000 0x0f00>;
0319 #clock-cells = <1>;
0320 clock-output-names = "uartb",
0321 "uartb2",
0322 "uartb3",
0323 "bsc1",
0324 "bsc2",
0325 "bsc3",
0326 "bsc4";
0327 };
0328 };
0329
0330 usbotg: usb@3f120000 {
0331 compatible = "snps,dwc2";
0332 reg = <0x3f120000 0x10000>;
0333 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
0334 clocks = <&usb_otg_ahb_clk>;
0335 clock-names = "otg";
0336 phys = <&usbphy>;
0337 phy-names = "usb2-phy";
0338 status = "disabled";
0339 };
0340
0341 usbphy: usb-phy@3f130000 {
0342 compatible = "brcm,kona-usb2-phy";
0343 reg = <0x3f130000 0x28>;
0344 #phy-cells = <0>;
0345 status = "disabled";
0346 };
0347 };
