0001 /*
0002 * BSD LICENSE
0003 *
0004 * Copyright(c) 2015 Broadcom Corporation. All rights reserved.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions
0008 * are met:
0009 *
0010 * * Redistributions of source code must retain the above copyright
0011 * notice, this list of conditions and the following disclaimer.
0012 * * Redistributions in binary form must reproduce the above copyright
0013 * notice, this list of conditions and the following disclaimer in
0014 * the documentation and/or other materials provided with the
0015 * distribution.
0016 * * Neither the name of Broadcom Corporation nor the names of its
0017 * contributors may be used to endorse or promote products derived
0018 * from this software without specific prior written permission.
0019 *
0020 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0021 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0022 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
0023 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0024 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0025 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
0026 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0027 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0028 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0029 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
0030 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0031 */
0032
0033 #include <dt-bindings/interrupt-controller/arm-gic.h>
0034 #include <dt-bindings/interrupt-controller/irq.h>
0035 #include <dt-bindings/clock/bcm-nsp.h>
0036
0037 / {
0038 #address-cells = <1>;
0039 #size-cells = <1>;
0040 compatible = "brcm,nsp";
0041 model = "Broadcom Northstar Plus SoC";
0042 interrupt-parent = <&gic>;
0043
0044 aliases {
0045 serial0 = &uart0;
0046 serial1 = &uart1;
0047 ethernet0 = &amac0;
0048 ethernet1 = &amac1;
0049 ethernet2 = &amac2;
0050 };
0051
0052 cpus {
0053 #address-cells = <1>;
0054 #size-cells = <0>;
0055
0056 cpu0: cpu@0 {
0057 device_type = "cpu";
0058 compatible = "arm,cortex-a9";
0059 next-level-cache = <&L2>;
0060 reg = <0x0>;
0061 };
0062
0063 cpu1: cpu@1 {
0064 device_type = "cpu";
0065 compatible = "arm,cortex-a9";
0066 next-level-cache = <&L2>;
0067 enable-method = "brcm,bcm-nsp-smp";
0068 secondary-boot-reg = <0xffff0fec>;
0069 reg = <0x1>;
0070 };
0071 };
0072
0073 pmu {
0074 compatible = "arm,cortex-a9-pmu";
0075 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH
0076 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
0077 interrupt-affinity = <&cpu0>, <&cpu1>;
0078 };
0079
0080 mpcore-bus@19000000 {
0081 compatible = "simple-bus";
0082 ranges = <0x00000000 0x19000000 0x00023000>;
0083 #address-cells = <1>;
0084 #size-cells = <1>;
0085
0086 a9pll: arm_clk@0 {
0087 #clock-cells = <0>;
0088 compatible = "brcm,nsp-armpll";
0089 clocks = <&osc>;
0090 reg = <0x00000 0x1000>;
0091 };
0092
0093 timer@20200 {
0094 compatible = "arm,cortex-a9-global-timer";
0095 reg = <0x20200 0x100>;
0096 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
0097 clocks = <&periph_clk>;
0098 };
0099
0100 twd-timer@20600 {
0101 compatible = "arm,cortex-a9-twd-timer";
0102 reg = <0x20600 0x20>;
0103 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
0104 IRQ_TYPE_EDGE_RISING)>;
0105 clocks = <&periph_clk>;
0106 };
0107
0108 twd-watchdog@20620 {
0109 compatible = "arm,cortex-a9-twd-wdt";
0110 reg = <0x20620 0x20>;
0111 interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
0112 IRQ_TYPE_LEVEL_HIGH)>;
0113 clocks = <&periph_clk>;
0114 };
0115
0116 gic: interrupt-controller@21000 {
0117 compatible = "arm,cortex-a9-gic";
0118 #interrupt-cells = <3>;
0119 #address-cells = <0>;
0120 interrupt-controller;
0121 reg = <0x21000 0x1000>,
0122 <0x20100 0x100>;
0123 };
0124
0125 L2: cache-controller@22000 {
0126 compatible = "arm,pl310-cache";
0127 reg = <0x22000 0x1000>;
0128 cache-unified;
0129 cache-level = <2>;
0130 };
0131 };
0132
0133 clocks {
0134 #address-cells = <1>;
0135 #size-cells = <1>;
0136 ranges;
0137
0138 osc: oscillator {
0139 #clock-cells = <0>;
0140 compatible = "fixed-clock";
0141 clock-frequency = <25000000>;
0142 };
0143
0144 iprocmed: iprocmed {
0145 #clock-cells = <0>;
0146 compatible = "fixed-factor-clock";
0147 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
0148 clock-div = <2>;
0149 clock-mult = <1>;
0150 };
0151
0152 iprocslow: iprocslow {
0153 #clock-cells = <0>;
0154 compatible = "fixed-factor-clock";
0155 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
0156 clock-div = <4>;
0157 clock-mult = <1>;
0158 };
0159
0160 periph_clk: periph_clk {
0161 #clock-cells = <0>;
0162 compatible = "fixed-factor-clock";
0163 clocks = <&a9pll>;
0164 clock-div = <2>;
0165 clock-mult = <1>;
0166 };
0167 };
0168
0169 axi: axi@18000000 {
0170 compatible = "simple-bus";
0171 ranges = <0x00000000 0x18000000 0x0011c40c>;
0172 #address-cells = <1>;
0173 #size-cells = <1>;
0174
0175 gpioa: gpio@20 {
0176 compatible = "brcm,nsp-gpio-a";
0177 reg = <0x0020 0x70>,
0178 <0x3f1c4 0x1c>;
0179 #gpio-cells = <2>;
0180 gpio-controller;
0181 ngpios = <32>;
0182 interrupt-controller;
0183 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0184 gpio-ranges = <&pinctrl 0 0 32>;
0185 };
0186
0187 uart0: serial@300 {
0188 compatible = "ns16550a";
0189 reg = <0x0300 0x100>;
0190 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0191 clocks = <&osc>;
0192 status = "disabled";
0193 };
0194
0195 uart1: serial@400 {
0196 compatible = "ns16550a";
0197 reg = <0x0400 0x100>;
0198 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
0199 clocks = <&osc>;
0200 status = "disabled";
0201 };
0202
0203 dma: dma@20000 {
0204 compatible = "arm,pl330", "arm,primecell";
0205 reg = <0x20000 0x1000>;
0206 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
0207 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
0208 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
0209 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
0210 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
0211 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
0212 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
0213 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
0214 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
0215 clocks = <&iprocslow>;
0216 clock-names = "apb_pclk";
0217 #dma-cells = <1>;
0218 dma-coherent;
0219 status = "disabled";
0220 };
0221
0222 sdio: mmc@21000 {
0223 compatible = "brcm,sdhci-iproc-cygnus";
0224 reg = <0x21000 0x100>;
0225 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
0226 sdhci,auto-cmd12;
0227 clocks = <&lcpll0 BCM_NSP_LCPLL0_SDIO_CLK>;
0228 dma-coherent;
0229 status = "disabled";
0230 };
0231
0232 amac0: ethernet@22000 {
0233 compatible = "brcm,nsp-amac";
0234 reg = <0x022000 0x1000>,
0235 <0x110000 0x1000>;
0236 reg-names = "amac_base", "idm_base";
0237 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
0238 dma-coherent;
0239 status = "disabled";
0240 };
0241
0242 amac1: ethernet@23000 {
0243 compatible = "brcm,nsp-amac";
0244 reg = <0x023000 0x1000>,
0245 <0x111000 0x1000>;
0246 reg-names = "amac_base", "idm_base";
0247 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
0248 dma-coherent;
0249 status = "disabled";
0250 };
0251
0252 amac2: ethernet@24000 {
0253 compatible = "brcm,nsp-amac";
0254 reg = <0x024000 0x1000>,
0255 <0x112000 0x1000>;
0256 reg-names = "amac_base", "idm_base";
0257 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
0258 dma-coherent;
0259 status = "disabled";
0260 };
0261
0262 mailbox: mailbox@25c00 {
0263 compatible = "brcm,iproc-fa2-mbox";
0264 reg = <0x25c00 0x400>;
0265 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
0266 #mbox-cells = <1>;
0267 brcm,rx-status-len = <32>;
0268 brcm,use-bcm-hdr;
0269 dma-coherent;
0270 };
0271
0272 nand_controller: nand-controller@26000 {
0273 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
0274 reg = <0x026000 0x600>,
0275 <0x11b408 0x600>,
0276 <0x026f00 0x20>;
0277 reg-names = "nand", "iproc-idm", "iproc-ext";
0278 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
0279
0280 #address-cells = <1>;
0281 #size-cells = <0>;
0282
0283 brcm,nand-has-wp;
0284 };
0285
0286 qspi: spi@27200 {
0287 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
0288 reg = <0x027200 0x184>,
0289 <0x027000 0x124>,
0290 <0x11c408 0x004>,
0291 <0x0273a0 0x01c>;
0292 reg-names = "mspi", "bspi", "intr_regs",
0293 "intr_status_reg";
0294 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
0295 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
0296 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
0297 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
0298 <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
0299 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
0300 <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
0301 interrupt-names = "spi_lr_fullness_reached",
0302 "spi_lr_session_aborted",
0303 "spi_lr_impatient",
0304 "spi_lr_session_done",
0305 "spi_lr_overhead",
0306 "mspi_done",
0307 "mspi_halted";
0308 clocks = <&iprocmed>;
0309 clock-names = "iprocmed";
0310 num-cs = <2>;
0311 #address-cells = <1>;
0312 #size-cells = <0>;
0313 status = "disabled";
0314 };
0315
0316 xhci: usb@29000 {
0317 compatible = "generic-xhci";
0318 reg = <0x29000 0x1000>;
0319 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
0320 phys = <&usb3_phy>;
0321 phy-names = "usb3-phy";
0322 dma-coherent;
0323 status = "disabled";
0324 };
0325
0326 ehci0: usb@2a000 {
0327 compatible = "generic-ehci";
0328 reg = <0x2a000 0x100>;
0329 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
0330 dma-coherent;
0331 status = "disabled";
0332 };
0333
0334 ohci0: usb@2b000 {
0335 compatible = "generic-ohci";
0336 reg = <0x2b000 0x100>;
0337 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
0338 dma-coherent;
0339 status = "disabled";
0340 };
0341
0342 crypto@2f000 {
0343 compatible = "brcm,spum-nsp-crypto";
0344 reg = <0x2f000 0x900>;
0345 mboxes = <&mailbox 0>;
0346 };
0347
0348 gpiob: gpio@30000 {
0349 compatible = "brcm,iproc-nsp-gpio", "brcm,iproc-gpio";
0350 reg = <0x30000 0x50>;
0351 #gpio-cells = <2>;
0352 gpio-controller;
0353 ngpios = <4>;
0354 interrupt-controller;
0355 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
0356 };
0357
0358 pwm: pwm@31000 {
0359 compatible = "brcm,iproc-pwm";
0360 reg = <0x31000 0x28>;
0361 clocks = <&osc>;
0362 #pwm-cells = <3>;
0363 status = "disabled";
0364 };
0365
0366 mdio: mdio@32000 {
0367 compatible = "brcm,iproc-mdio";
0368 reg = <0x32000 0x8>;
0369 #size-cells = <0>;
0370 #address-cells = <1>;
0371 };
0372
0373 mdio-mux@32000 {
0374 compatible = "mdio-mux-mmioreg", "mdio-mux";
0375 reg = <0x32000 0x4>;
0376 mux-mask = <0x200>;
0377 #address-cells = <1>;
0378 #size-cells = <0>;
0379 mdio-parent-bus = <&mdio>;
0380
0381 mdio_int: mdio@0 {
0382 reg = <0x0>;
0383 #address-cells = <1>;
0384 #size-cells = <0>;
0385
0386 usb3_phy: usb3-phy@10 {
0387 compatible = "brcm,ns-bx-usb3-phy";
0388 reg = <0x10>;
0389 usb3-dmp-syscon = <&usb3_dmp>;
0390 #phy-cells = <0>;
0391 status = "disabled";
0392 };
0393 };
0394
0395 mdio_ext: mdio@200 {
0396 reg = <0x200>;
0397 #address-cells = <1>;
0398 #size-cells = <0>;
0399 };
0400 };
0401
0402 rng: rng@33000 {
0403 compatible = "brcm,bcm-nsp-rng";
0404 reg = <0x33000 0x14>;
0405 };
0406
0407 ccbtimer0: timer@34000 {
0408 compatible = "arm,sp804", "arm,primecell";
0409 reg = <0x34000 0x1000>;
0410 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
0411 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
0412 clocks = <&iprocslow>;
0413 clock-names = "apb_pclk";
0414 };
0415
0416 ccbtimer1: timer@35000 {
0417 compatible = "arm,sp804", "arm,primecell";
0418 reg = <0x35000 0x1000>;
0419 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
0420 <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
0421 clocks = <&iprocslow>;
0422 clock-names = "apb_pclk";
0423 };
0424
0425 srab: ethernet-switch@36000 {
0426 compatible = "brcm,nsp-srab";
0427 reg = <0x36000 0x1000>,
0428 <0x3f308 0x8>,
0429 <0x3f410 0xc>;
0430 reg-names = "srab", "mux_config", "sgmii_config";
0431 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
0432 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
0433 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
0434 <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
0435 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
0436 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
0437 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
0438 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
0439 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
0440 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
0441 <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
0442 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
0443 <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0444 interrupt-names = "link_state_p0",
0445 "link_state_p1",
0446 "link_state_p2",
0447 "link_state_p3",
0448 "link_state_p4",
0449 "link_state_p5",
0450 "link_state_p7",
0451 "link_state_p8",
0452 "phy",
0453 "ts",
0454 "imp_sleep_timer_p5",
0455 "imp_sleep_timer_p7",
0456 "imp_sleep_timer_p8";
0457 status = "disabled";
0458
0459 /* ports are defined in board DTS */
0460 ports {
0461 #address-cells = <1>;
0462 #size-cells = <0>;
0463 };
0464 };
0465
0466 i2c0: i2c@38000 {
0467 compatible = "brcm,iproc-i2c";
0468 reg = <0x38000 0x50>;
0469 #address-cells = <1>;
0470 #size-cells = <0>;
0471 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
0472 clock-frequency = <100000>;
0473 dma-coherent;
0474 status = "disabled";
0475 };
0476
0477 watchdog@39000 {
0478 compatible = "arm,sp805", "arm,primecell";
0479 reg = <0x39000 0x1000>;
0480 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
0481 clocks = <&iprocslow>, <&iprocslow>;
0482 clock-names = "wdog_clk", "apb_pclk";
0483 };
0484
0485 lcpll0: lcpll0@3f100 {
0486 #clock-cells = <1>;
0487 compatible = "brcm,nsp-lcpll0";
0488 reg = <0x3f100 0x14>;
0489 clocks = <&osc>;
0490 clock-output-names = "lcpll0", "pcie_phy", "sdio",
0491 "ddr_phy";
0492 };
0493
0494 genpll: genpll@3f140 {
0495 #clock-cells = <1>;
0496 compatible = "brcm,nsp-genpll";
0497 reg = <0x3f140 0x24>;
0498 clocks = <&osc>;
0499 clock-output-names = "genpll", "phy", "ethernetclk",
0500 "usbclk", "iprocfast", "sata1",
0501 "sata2";
0502 };
0503
0504 pinctrl: pinctrl@3f1c0 {
0505 compatible = "brcm,nsp-pinmux";
0506 reg = <0x3f1c0 0x04>,
0507 <0x30028 0x04>,
0508 <0x3f408 0x04>;
0509 };
0510
0511 thermal: thermal@3f2c0 {
0512 compatible = "brcm,ns-thermal";
0513 reg = <0x3f2c0 0x10>;
0514 #thermal-sensor-cells = <0>;
0515 };
0516
0517 sata_phy: sata_phy@40100 {
0518 compatible = "brcm,iproc-nsp-sata-phy";
0519 reg = <0x40100 0x340>;
0520 reg-names = "phy";
0521 #address-cells = <1>;
0522 #size-cells = <0>;
0523
0524 sata_phy0: sata-phy@0 {
0525 reg = <0>;
0526 #phy-cells = <0>;
0527 status = "disabled";
0528 };
0529
0530 sata_phy1: sata-phy@1 {
0531 reg = <1>;
0532 #phy-cells = <0>;
0533 status = "disabled";
0534 };
0535 };
0536
0537 sata: sata@41000 {
0538 compatible = "brcm,bcm-nsp-ahci";
0539 reg-names = "ahci", "top-ctrl";
0540 reg = <0x41000 0x1000>, <0x40020 0x1c>;
0541 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
0542 #address-cells = <1>;
0543 #size-cells = <0>;
0544 dma-coherent;
0545 status = "disabled";
0546
0547 sata0: sata-port@0 {
0548 reg = <0>;
0549 phys = <&sata_phy0>;
0550 phy-names = "sata-phy";
0551 };
0552
0553 sata1: sata-port@1 {
0554 reg = <1>;
0555 phys = <&sata_phy1>;
0556 phy-names = "sata-phy";
0557 };
0558 };
0559
0560 usb3_dmp: syscon@104000 {
0561 reg = <0x104000 0x1000>;
0562 };
0563 };
0564
0565 pcie0: pcie@18012000 {
0566 compatible = "brcm,iproc-pcie";
0567 reg = <0x18012000 0x1000>;
0568
0569 #interrupt-cells = <1>;
0570 interrupt-map-mask = <0 0 0 0>;
0571 interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
0572
0573 linux,pci-domain = <0>;
0574
0575 bus-range = <0x00 0xff>;
0576
0577 #address-cells = <3>;
0578 #size-cells = <2>;
0579 device_type = "pci";
0580
0581 /* Note: The HW does not support I/O resources. So,
0582 * only the memory resource range is being specified.
0583 */
0584 ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
0585
0586 dma-coherent;
0587 status = "disabled";
0588
0589 msi-parent = <&msi0>;
0590 msi0: msi {
0591 compatible = "brcm,iproc-msi";
0592 msi-controller;
0593 interrupt-parent = <&gic>;
0594 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
0595 <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
0596 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
0597 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
0598 brcm,pcie-msi-inten;
0599 };
0600 };
0601
0602 pcie1: pcie@18013000 {
0603 compatible = "brcm,iproc-pcie";
0604 reg = <0x18013000 0x1000>;
0605
0606 #interrupt-cells = <1>;
0607 interrupt-map-mask = <0 0 0 0>;
0608 interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
0609
0610 linux,pci-domain = <1>;
0611
0612 bus-range = <0x00 0xff>;
0613
0614 #address-cells = <3>;
0615 #size-cells = <2>;
0616 device_type = "pci";
0617
0618 /* Note: The HW does not support I/O resources. So,
0619 * only the memory resource range is being specified.
0620 */
0621 ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
0622
0623 dma-coherent;
0624 status = "disabled";
0625
0626 msi-parent = <&msi1>;
0627 msi1: msi {
0628 compatible = "brcm,iproc-msi";
0629 msi-controller;
0630 interrupt-parent = <&gic>;
0631 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
0632 <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
0633 <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
0634 <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
0635 brcm,pcie-msi-inten;
0636 };
0637 };
0638
0639 pcie2: pcie@18014000 {
0640 compatible = "brcm,iproc-pcie";
0641 reg = <0x18014000 0x1000>;
0642
0643 #interrupt-cells = <1>;
0644 interrupt-map-mask = <0 0 0 0>;
0645 interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
0646
0647 linux,pci-domain = <2>;
0648
0649 bus-range = <0x00 0xff>;
0650
0651 #address-cells = <3>;
0652 #size-cells = <2>;
0653 device_type = "pci";
0654
0655 /* Note: The HW does not support I/O resources. So,
0656 * only the memory resource range is being specified.
0657 */
0658 ranges = <0x82000000 0 0x48000000 0x48000000 0 0x8000000>;
0659
0660 dma-coherent;
0661 status = "disabled";
0662
0663 msi-parent = <&msi2>;
0664 msi2: msi {
0665 compatible = "brcm,iproc-msi";
0666 msi-controller;
0667 interrupt-parent = <&gic>;
0668 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
0669 <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
0670 <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
0671 <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
0672 brcm,pcie-msi-inten;
0673 };
0674 };
0675
0676 thermal-zones {
0677 cpu-thermal {
0678 polling-delay-passive = <0>;
0679 polling-delay = <1000>;
0680 coefficients = <(-556) 418000>;
0681 thermal-sensors = <&thermal>;
0682
0683 trips {
0684 cpu-crit {
0685 temperature = <125000>;
0686 hysteresis = <0>;
0687 type = "critical";
0688 };
0689 };
0690
0691 cooling-maps {
0692 };
0693 };
0694 };
0695 };
