0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
0004 * 4 USART.
0005 *
0006 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
0007 */
0008
0009 #include <dt-bindings/pinctrl/at91.h>
0010 #include <dt-bindings/interrupt-controller/irq.h>
0011
0012 / {
0013 aliases {
0014 serial4 = &usart3;
0015 };
0016
0017 ahb {
0018 apb {
0019 pinctrl@fffff400 {
0020 usart3 {
0021 pinctrl_usart3: usart3-0 {
0022 atmel,pins =
0023 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE
0024 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
0025 };
0026
0027 pinctrl_usart3_rts: usart3_rts-0 {
0028 atmel,pins =
0029 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
0030 };
0031
0032 pinctrl_usart3_cts: usart3_cts-0 {
0033 atmel,pins =
0034 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
0035 };
0036
0037 pinctrl_usart3_sck: usart3_sck-0 {
0038 atmel,pins =
0039 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
0040 };
0041 };
0042 };
0043
0044 usart3: serial@f8028000 {
0045 compatible = "atmel,at91sam9260-usart";
0046 reg = <0xf8028000 0x200>;
0047 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
0048 pinctrl-names = "default";
0049 pinctrl-0 = <&pinctrl_usart3>;
0050 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>,
0051 <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
0052 dma-names = "tx", "rx";
0053 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
0054 clock-names = "usart";
0055 status = "disabled";
0056 };
0057 };
0058 };
0059 };