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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
0004 *
0005 * Copyright (C) 2012 Atmel,
0006 * 2012 Hong Xu <hong.xu@atmel.com>
0007 */
0008
0009 #include <dt-bindings/dma/at91.h>
0010 #include <dt-bindings/pinctrl/at91.h>
0011 #include <dt-bindings/interrupt-controller/irq.h>
0012 #include <dt-bindings/gpio/gpio.h>
0013 #include <dt-bindings/clock/at91.h>
0014
0015 / {
0016 #address-cells = <1>;
0017 #size-cells = <1>;
0018 model = "Atmel AT91SAM9N12 SoC";
0019 compatible = "atmel,at91sam9n12";
0020 interrupt-parent = <&aic>;
0021
0022 aliases {
0023 serial0 = &dbgu;
0024 serial1 = &usart0;
0025 serial2 = &usart1;
0026 serial3 = &usart2;
0027 serial4 = &usart3;
0028 gpio0 = &pioA;
0029 gpio1 = &pioB;
0030 gpio2 = &pioC;
0031 gpio3 = &pioD;
0032 tcb0 = &tcb0;
0033 tcb1 = &tcb1;
0034 i2c0 = &i2c0;
0035 i2c1 = &i2c1;
0036 ssc0 = &ssc0;
0037 pwm0 = &pwm0;
0038 };
0039 cpus {
0040 #address-cells = <1>;
0041 #size-cells = <0>;
0042
0043 cpu@0 {
0044 compatible = "arm,arm926ej-s";
0045 device_type = "cpu";
0046 reg = <0>;
0047 };
0048 };
0049
0050 memory@20000000 {
0051 device_type = "memory";
0052 reg = <0x20000000 0x10000000>;
0053 };
0054
0055 clocks {
0056 slow_xtal: slow_xtal {
0057 compatible = "fixed-clock";
0058 #clock-cells = <0>;
0059 clock-frequency = <0>;
0060 };
0061
0062 main_xtal: main_xtal {
0063 compatible = "fixed-clock";
0064 #clock-cells = <0>;
0065 clock-frequency = <0>;
0066 };
0067 };
0068
0069 sram: sram@300000 {
0070 compatible = "mmio-sram";
0071 reg = <0x00300000 0x8000>;
0072 #address-cells = <1>;
0073 #size-cells = <1>;
0074 ranges = <0 0x00300000 0x8000>;
0075 };
0076
0077 ahb {
0078 compatible = "simple-bus";
0079 #address-cells = <1>;
0080 #size-cells = <1>;
0081 ranges;
0082
0083 apb {
0084 compatible = "simple-bus";
0085 #address-cells = <1>;
0086 #size-cells = <1>;
0087 ranges;
0088
0089 aic: interrupt-controller@fffff000 {
0090 #interrupt-cells = <3>;
0091 compatible = "atmel,at91rm9200-aic";
0092 interrupt-controller;
0093 reg = <0xfffff000 0x200>;
0094 atmel,external-irqs = <31>;
0095 };
0096
0097 matrix: matrix@ffffde00 {
0098 compatible = "atmel,at91sam9n12-matrix", "syscon";
0099 reg = <0xffffde00 0x100>;
0100 };
0101
0102 pmecc: ecc-engine@ffffe000 {
0103 compatible = "atmel,at91sam9g45-pmecc";
0104 reg = <0xffffe000 0x600>,
0105 <0xffffe600 0x200>;
0106 };
0107
0108 ramc0: ramc@ffffe800 {
0109 compatible = "atmel,at91sam9g45-ddramc";
0110 reg = <0xffffe800 0x200>;
0111 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
0112 clock-names = "ddrck";
0113 };
0114
0115 smc: smc@ffffea00 {
0116 compatible = "atmel,at91sam9260-smc", "syscon";
0117 reg = <0xffffea00 0x200>;
0118 };
0119
0120 pmc: pmc@fffffc00 {
0121 compatible = "atmel,at91sam9n12-pmc", "syscon";
0122 reg = <0xfffffc00 0x200>;
0123 #clock-cells = <2>;
0124 clocks = <&clk32k>, <&main_xtal>;
0125 clock-names = "slow_clk", "main_xtal";
0126 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0127 };
0128
0129 reset-controller@fffffe00 {
0130 compatible = "atmel,at91sam9g45-rstc";
0131 reg = <0xfffffe00 0x10>;
0132 clocks = <&clk32k>;
0133 };
0134
0135 pit: timer@fffffe30 {
0136 compatible = "atmel,at91sam9260-pit";
0137 reg = <0xfffffe30 0xf>;
0138 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0139 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
0140 };
0141
0142 shdwc@fffffe10 {
0143 compatible = "atmel,at91sam9x5-shdwc";
0144 reg = <0xfffffe10 0x10>;
0145 clocks = <&clk32k>;
0146 };
0147
0148 sckc@fffffe50 {
0149 compatible = "atmel,at91sam9x5-sckc";
0150 reg = <0xfffffe50 0x4>;
0151
0152 slow_osc: slow_osc {
0153 compatible = "atmel,at91sam9x5-clk-slow-osc";
0154 #clock-cells = <0>;
0155 clocks = <&slow_xtal>;
0156 };
0157
0158 slow_rc_osc: slow_rc_osc {
0159 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
0160 #clock-cells = <0>;
0161 clock-frequency = <32768>;
0162 clock-accuracy = <50000000>;
0163 };
0164
0165 clk32k: slck {
0166 compatible = "atmel,at91sam9x5-clk-slow";
0167 #clock-cells = <0>;
0168 clocks = <&slow_rc_osc>, <&slow_osc>;
0169 };
0170 };
0171
0172 mmc0: mmc@f0008000 {
0173 compatible = "atmel,hsmci";
0174 reg = <0xf0008000 0x600>;
0175 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
0176 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
0177 dma-names = "rxtx";
0178 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
0179 clock-names = "mci_clk";
0180 #address-cells = <1>;
0181 #size-cells = <0>;
0182 status = "disabled";
0183 };
0184
0185 tcb0: timer@f8008000 {
0186 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
0187 #address-cells = <1>;
0188 #size-cells = <0>;
0189 reg = <0xf8008000 0x100>;
0190 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
0191 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
0192 clock-names = "t0_clk", "slow_clk";
0193 };
0194
0195 tcb1: timer@f800c000 {
0196 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
0197 #address-cells = <1>;
0198 #size-cells = <0>;
0199 reg = <0xf800c000 0x100>;
0200 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
0201 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
0202 clock-names = "t0_clk", "slow_clk";
0203 };
0204
0205 hlcdc: hlcdc@f8038000 {
0206 compatible = "atmel,at91sam9n12-hlcdc";
0207 reg = <0xf8038000 0x2000>;
0208 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
0209 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
0210 clock-names = "periph_clk", "sys_clk", "slow_clk";
0211 status = "disabled";
0212
0213 hlcdc-display-controller {
0214 compatible = "atmel,hlcdc-display-controller";
0215 #address-cells = <1>;
0216 #size-cells = <0>;
0217
0218 port@0 {
0219 #address-cells = <1>;
0220 #size-cells = <0>;
0221 reg = <0>;
0222 };
0223 };
0224
0225 hlcdc_pwm: hlcdc-pwm {
0226 compatible = "atmel,hlcdc-pwm";
0227 pinctrl-names = "default";
0228 pinctrl-0 = <&pinctrl_lcd_pwm>;
0229 #pwm-cells = <3>;
0230 };
0231 };
0232
0233 dma: dma-controller@ffffec00 {
0234 compatible = "atmel,at91sam9g45-dma";
0235 reg = <0xffffec00 0x200>;
0236 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
0237 #dma-cells = <2>;
0238 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
0239 clock-names = "dma_clk";
0240 };
0241
0242 pinctrl@fffff400 {
0243 #address-cells = <1>;
0244 #size-cells = <1>;
0245 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
0246 ranges = <0xfffff400 0xfffff400 0x800>;
0247
0248 atmel,mux-mask = <
0249 /* A B C */
0250 0xffffffff 0xffe07983 0x00000000 /* pioA */
0251 0x00040000 0x00047e0f 0x00000000 /* pioB */
0252 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
0253 0x003fffff 0x003f8000 0x00000000 /* pioD */
0254 >;
0255
0256 /* shared pinctrl settings */
0257 dbgu {
0258 pinctrl_dbgu: dbgu-0 {
0259 atmel,pins =
0260 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
0261 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0262 };
0263 };
0264
0265 lcd {
0266 pinctrl_lcd_base: lcd-base-0 {
0267 atmel,pins =
0268 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
0269 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
0270 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
0271 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
0272 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
0273 };
0274
0275 pinctrl_lcd_pwm: lcd-pwm-0 {
0276 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
0277 };
0278
0279 pinctrl_lcd_rgb888: lcd-rgb-3 {
0280 atmel,pins =
0281 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
0282 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
0283 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
0284 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
0285 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
0286 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
0287 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
0288 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
0289 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
0290 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
0291 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
0292 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
0293 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
0294 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
0295 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
0296 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
0297 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
0298 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
0299 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
0300 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
0301 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
0302 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
0303 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
0304 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
0305 };
0306 };
0307
0308 usart0 {
0309 pinctrl_usart0: usart0-0 {
0310 atmel,pins =
0311 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
0312 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
0313 };
0314
0315 pinctrl_usart0_rts: usart0_rts-0 {
0316 atmel,pins =
0317 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
0318 };
0319
0320 pinctrl_usart0_cts: usart0_cts-0 {
0321 atmel,pins =
0322 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
0323 };
0324 };
0325
0326 usart1 {
0327 pinctrl_usart1: usart1-0 {
0328 atmel,pins =
0329 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
0330 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
0331 };
0332 };
0333
0334 usart2 {
0335 pinctrl_usart2: usart2-0 {
0336 atmel,pins =
0337 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
0338 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
0339 };
0340
0341 pinctrl_usart2_rts: usart2_rts-0 {
0342 atmel,pins =
0343 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
0344 };
0345
0346 pinctrl_usart2_cts: usart2_cts-0 {
0347 atmel,pins =
0348 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
0349 };
0350 };
0351
0352 usart3 {
0353 pinctrl_usart3: usart3-0 {
0354 atmel,pins =
0355 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
0356 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
0357 };
0358
0359 pinctrl_usart3_rts: usart3_rts-0 {
0360 atmel,pins =
0361 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
0362 };
0363
0364 pinctrl_usart3_cts: usart3_cts-0 {
0365 atmel,pins =
0366 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
0367 };
0368 };
0369
0370 uart0 {
0371 pinctrl_uart0: uart0-0 {
0372 atmel,pins =
0373 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
0374 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
0375 };
0376 };
0377
0378 uart1 {
0379 pinctrl_uart1: uart1-0 {
0380 atmel,pins =
0381 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
0382 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
0383 };
0384 };
0385
0386 nand {
0387 pinctrl_nand_rb: nand-rb-0 {
0388 atmel,pins =
0389 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
0390 };
0391
0392 pinctrl_nand_cs: nand-cs-0 {
0393 atmel,pins =
0394 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
0395 };
0396 };
0397
0398 mmc0 {
0399 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
0400 atmel,pins =
0401 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
0402 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
0403 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
0404 };
0405
0406 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
0407 atmel,pins =
0408 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
0409 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
0410 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
0411 };
0412
0413 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
0414 atmel,pins =
0415 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
0416 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
0417 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
0418 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
0419 };
0420 };
0421
0422 ssc0 {
0423 pinctrl_ssc0_tx: ssc0_tx-0 {
0424 atmel,pins =
0425 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
0426 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
0427 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
0428 };
0429
0430 pinctrl_ssc0_rx: ssc0_rx-0 {
0431 atmel,pins =
0432 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
0433 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
0434 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
0435 };
0436 };
0437
0438 spi0 {
0439 pinctrl_spi0: spi0-0 {
0440 atmel,pins =
0441 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
0442 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
0443 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
0444 };
0445 };
0446
0447 spi1 {
0448 pinctrl_spi1: spi1-0 {
0449 atmel,pins =
0450 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
0451 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
0452 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
0453 };
0454 };
0455
0456 i2c0 {
0457 pinctrl_i2c0: i2c0-0 {
0458 atmel,pins =
0459 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
0460 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0461 };
0462 };
0463
0464 i2c1 {
0465 pinctrl_i2c1: i2c1-0 {
0466 atmel,pins =
0467 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
0468 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0469 };
0470 };
0471
0472 tcb0 {
0473 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
0474 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0475 };
0476
0477 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
0478 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0479 };
0480
0481 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
0482 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0483 };
0484
0485 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
0486 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0487 };
0488
0489 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
0490 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0491 };
0492
0493 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
0494 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0495 };
0496
0497 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
0498 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0499 };
0500
0501 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
0502 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0503 };
0504
0505 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
0506 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
0507 };
0508 };
0509
0510 tcb1 {
0511 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
0512 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0513 };
0514
0515 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
0516 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0517 };
0518
0519 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
0520 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0521 };
0522
0523 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
0524 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0525 };
0526
0527 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
0528 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0529 };
0530
0531 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
0532 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0533 };
0534
0535 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
0536 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0537 };
0538
0539 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
0540 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0541 };
0542
0543 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
0544 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
0545 };
0546 };
0547
0548 pioA: gpio@fffff400 {
0549 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0550 reg = <0xfffff400 0x200>;
0551 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
0552 #gpio-cells = <2>;
0553 gpio-controller;
0554 interrupt-controller;
0555 #interrupt-cells = <2>;
0556 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
0557 };
0558
0559 pioB: gpio@fffff600 {
0560 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0561 reg = <0xfffff600 0x200>;
0562 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
0563 #gpio-cells = <2>;
0564 gpio-controller;
0565 interrupt-controller;
0566 #interrupt-cells = <2>;
0567 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
0568 };
0569
0570 pioC: gpio@fffff800 {
0571 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0572 reg = <0xfffff800 0x200>;
0573 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
0574 #gpio-cells = <2>;
0575 gpio-controller;
0576 interrupt-controller;
0577 #interrupt-cells = <2>;
0578 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
0579 };
0580
0581 pioD: gpio@fffffa00 {
0582 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
0583 reg = <0xfffffa00 0x200>;
0584 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
0585 #gpio-cells = <2>;
0586 gpio-controller;
0587 interrupt-controller;
0588 #interrupt-cells = <2>;
0589 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
0590 };
0591 };
0592
0593 dbgu: serial@fffff200 {
0594 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
0595 reg = <0xfffff200 0x200>;
0596 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0597 pinctrl-names = "default";
0598 pinctrl-0 = <&pinctrl_dbgu>;
0599 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
0600 clock-names = "usart";
0601 status = "disabled";
0602 };
0603
0604 ssc0: ssc@f0010000 {
0605 compatible = "atmel,at91sam9g45-ssc";
0606 reg = <0xf0010000 0x4000>;
0607 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
0608 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
0609 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
0610 dma-names = "tx", "rx";
0611 pinctrl-names = "default";
0612 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
0613 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
0614 clock-names = "pclk";
0615 status = "disabled";
0616 };
0617
0618 usart0: serial@f801c000 {
0619 compatible = "atmel,at91sam9260-usart";
0620 reg = <0xf801c000 0x4000>;
0621 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
0622 pinctrl-names = "default";
0623 pinctrl-0 = <&pinctrl_usart0>;
0624 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
0625 clock-names = "usart";
0626 status = "disabled";
0627 };
0628
0629 usart1: serial@f8020000 {
0630 compatible = "atmel,at91sam9260-usart";
0631 reg = <0xf8020000 0x4000>;
0632 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
0633 pinctrl-names = "default";
0634 pinctrl-0 = <&pinctrl_usart1>;
0635 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
0636 clock-names = "usart";
0637 status = "disabled";
0638 };
0639
0640 usart2: serial@f8024000 {
0641 compatible = "atmel,at91sam9260-usart";
0642 reg = <0xf8024000 0x4000>;
0643 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
0644 pinctrl-names = "default";
0645 pinctrl-0 = <&pinctrl_usart2>;
0646 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
0647 clock-names = "usart";
0648 status = "disabled";
0649 };
0650
0651 usart3: serial@f8028000 {
0652 compatible = "atmel,at91sam9260-usart";
0653 reg = <0xf8028000 0x4000>;
0654 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
0655 pinctrl-names = "default";
0656 pinctrl-0 = <&pinctrl_usart3>;
0657 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
0658 clock-names = "usart";
0659 status = "disabled";
0660 };
0661
0662 i2c0: i2c@f8010000 {
0663 compatible = "atmel,at91sam9x5-i2c";
0664 reg = <0xf8010000 0x100>;
0665 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
0666 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
0667 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
0668 dma-names = "tx", "rx";
0669 #address-cells = <1>;
0670 #size-cells = <0>;
0671 pinctrl-names = "default";
0672 pinctrl-0 = <&pinctrl_i2c0>;
0673 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
0674 status = "disabled";
0675 };
0676
0677 i2c1: i2c@f8014000 {
0678 compatible = "atmel,at91sam9x5-i2c";
0679 reg = <0xf8014000 0x100>;
0680 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
0681 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
0682 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
0683 dma-names = "tx", "rx";
0684 #address-cells = <1>;
0685 #size-cells = <0>;
0686 pinctrl-names = "default";
0687 pinctrl-0 = <&pinctrl_i2c1>;
0688 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
0689 status = "disabled";
0690 };
0691
0692 spi0: spi@f0000000 {
0693 #address-cells = <1>;
0694 #size-cells = <0>;
0695 compatible = "atmel,at91rm9200-spi";
0696 reg = <0xf0000000 0x100>;
0697 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
0698 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
0699 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
0700 dma-names = "tx", "rx";
0701 pinctrl-names = "default";
0702 pinctrl-0 = <&pinctrl_spi0>;
0703 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
0704 clock-names = "spi_clk";
0705 status = "disabled";
0706 };
0707
0708 spi1: spi@f0004000 {
0709 #address-cells = <1>;
0710 #size-cells = <0>;
0711 compatible = "atmel,at91rm9200-spi";
0712 reg = <0xf0004000 0x100>;
0713 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
0714 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
0715 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
0716 dma-names = "tx", "rx";
0717 pinctrl-names = "default";
0718 pinctrl-0 = <&pinctrl_spi1>;
0719 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
0720 clock-names = "spi_clk";
0721 status = "disabled";
0722 };
0723
0724 watchdog@fffffe40 {
0725 compatible = "atmel,at91sam9260-wdt";
0726 reg = <0xfffffe40 0x10>;
0727 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0728 clocks = <&clk32k>;
0729 atmel,watchdog-type = "hardware";
0730 atmel,reset-type = "all";
0731 atmel,dbg-halt;
0732 status = "disabled";
0733 };
0734
0735 rtc@fffffeb0 {
0736 compatible = "atmel,at91rm9200-rtc";
0737 reg = <0xfffffeb0 0x40>;
0738 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
0739 clocks = <&clk32k>;
0740 status = "disabled";
0741 };
0742
0743 pwm0: pwm@f8034000 {
0744 compatible = "atmel,at91sam9rl-pwm";
0745 reg = <0xf8034000 0x300>;
0746 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
0747 #pwm-cells = <3>;
0748 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
0749 status = "disabled";
0750 };
0751
0752 usb1: gadget@f803c000 {
0753 compatible = "atmel,at91sam9260-udc";
0754 reg = <0xf803c000 0x4000>;
0755 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
0756 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>;
0757 clock-names = "pclk", "hclk";
0758 status = "disabled";
0759 };
0760 };
0761
0762 usb0: ohci@500000 {
0763 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
0764 reg = <0x00500000 0x00100000>;
0765 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
0766 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
0767 clock-names = "ohci_clk", "hclk", "uhpck";
0768 status = "disabled";
0769 };
0770
0771 ebi: ebi@10000000 {
0772 compatible = "atmel,at91sam9x5-ebi";
0773 #address-cells = <2>;
0774 #size-cells = <1>;
0775 atmel,smc = <&smc>;
0776 atmel,matrix = <&matrix>;
0777 reg = <0x10000000 0x60000000>;
0778 ranges = <0x0 0x0 0x10000000 0x10000000
0779 0x1 0x0 0x20000000 0x10000000
0780 0x2 0x0 0x30000000 0x10000000
0781 0x3 0x0 0x40000000 0x10000000
0782 0x4 0x0 0x50000000 0x10000000
0783 0x5 0x0 0x60000000 0x10000000>;
0784 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
0785 status = "disabled";
0786
0787 nand_controller: nand-controller {
0788 compatible = "atmel,at91sam9g45-nand-controller";
0789 ecc-engine = <&pmecc>;
0790 #address-cells = <2>;
0791 #size-cells = <1>;
0792 ranges;
0793 status = "disabled";
0794 };
0795 };
0796 };
0797
0798 i2c-gpio-0 {
0799 compatible = "i2c-gpio";
0800 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
0801 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
0802 >;
0803 i2c-gpio,sda-open-drain;
0804 i2c-gpio,scl-open-drain;
0805 i2c-gpio,delay-us = <2>; /* ~100 kHz */
0806 #address-cells = <1>;
0807 #size-cells = <0>;
0808 status = "disabled";
0809 };
0810 };
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