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0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003 * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
0004 *
0005 * Copyright (c) 2017, Microchip Technology Inc.
0006 * 2017 Cristian Birsan <cristian.birsan@microchip.com>
0007 * 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
0008 */
0009 #include "sama5d2.dtsi"
0010 #include "sama5d2-pinfunc.h"
0011 #include <dt-bindings/gpio/gpio.h>
0012
0013 / {
0014 model = "Atmel SAMA5D27 SoM1";
0015 compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
0016
0017 aliases {
0018 i2c0 = &i2c0;
0019 };
0020
0021 clocks {
0022 slow_xtal {
0023 clock-frequency = <32768>;
0024 };
0025
0026 main_xtal {
0027 clock-frequency = <24000000>;
0028 };
0029 };
0030
0031 ahb {
0032 sdmmc0: sdio-host@a0000000 {
0033 microchip,sdcal-inverted;
0034 };
0035
0036 apb {
0037 qspi1: spi@f0024000 {
0038 pinctrl-names = "default";
0039 pinctrl-0 = <&pinctrl_qspi1_default>;
0040
0041 flash@0 {
0042 #address-cells = <1>;
0043 #size-cells = <1>;
0044 compatible = "jedec,spi-nor";
0045 reg = <0>;
0046 spi-max-frequency = <80000000>;
0047 spi-tx-bus-width = <4>;
0048 spi-rx-bus-width = <4>;
0049 m25p,fast-read;
0050
0051 at91bootstrap@0 {
0052 label = "at91bootstrap";
0053 reg = <0x00000000 0x00040000>;
0054 };
0055
0056 bootloader@40000 {
0057 label = "bootloader";
0058 reg = <0x00040000 0x000c0000>;
0059 };
0060
0061 bootloaderenvred@100000 {
0062 label = "bootloader env redundant";
0063 reg = <0x00100000 0x00040000>;
0064 };
0065
0066 bootloaderenv@140000 {
0067 label = "bootloader env";
0068 reg = <0x00140000 0x00040000>;
0069 };
0070
0071 dtb@180000 {
0072 label = "device tree";
0073 reg = <0x00180000 0x00080000>;
0074 };
0075
0076 kernel@200000 {
0077 label = "kernel";
0078 reg = <0x00200000 0x00600000>;
0079 };
0080 };
0081 };
0082
0083 macb0: ethernet@f8008000 {
0084 pinctrl-names = "default";
0085 pinctrl-0 = <&pinctrl_macb0_default>;
0086 #address-cells = <1>;
0087 #size-cells = <0>;
0088 phy-mode = "rmii";
0089
0090 ethernet-phy@7 {
0091 reg = <0x7>;
0092 interrupt-parent = <&pioA>;
0093 interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
0094 pinctrl-names = "default";
0095 pinctrl-0 = <&pinctrl_macb0_phy_irq>;
0096 };
0097 };
0098
0099 i2c0: i2c@f8028000 {
0100 dmas = <0>, <0>;
0101 pinctrl-names = "default", "gpio";
0102 pinctrl-0 = <&pinctrl_i2c0_default>;
0103 pinctrl-1 = <&pinctrl_i2c0_gpio>;
0104 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
0105 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
0106 status = "okay";
0107
0108 at24@50 {
0109 compatible = "atmel,24c02";
0110 reg = <0x50>;
0111 pagesize = <8>;
0112 };
0113 };
0114
0115 pinctrl@fc038000 {
0116 pinctrl_i2c0_default: i2c0_default {
0117 pinmux = <PIN_PD21__TWD0>,
0118 <PIN_PD22__TWCK0>;
0119 bias-disable;
0120 };
0121
0122 pinctrl_i2c0_gpio: i2c0_gpio {
0123 pinmux = <PIN_PD21__GPIO>,
0124 <PIN_PD22__GPIO>;
0125 bias-disable;
0126 };
0127
0128 pinctrl_qspi1_default: qspi1_default {
0129 sck_cs {
0130 pinmux = <PIN_PB5__QSPI1_SCK>,
0131 <PIN_PB6__QSPI1_CS>;
0132 bias-disable;
0133 };
0134
0135 data {
0136 pinmux = <PIN_PB7__QSPI1_IO0>,
0137 <PIN_PB8__QSPI1_IO1>,
0138 <PIN_PB9__QSPI1_IO2>,
0139 <PIN_PB10__QSPI1_IO3>;
0140 bias-pull-up;
0141 };
0142 };
0143
0144 pinctrl_macb0_default: macb0_default {
0145 pinmux = <PIN_PD9__GTXCK>,
0146 <PIN_PD10__GTXEN>,
0147 <PIN_PD11__GRXDV>,
0148 <PIN_PD12__GRXER>,
0149 <PIN_PD13__GRX0>,
0150 <PIN_PD14__GRX1>,
0151 <PIN_PD15__GTX0>,
0152 <PIN_PD16__GTX1>,
0153 <PIN_PD17__GMDC>,
0154 <PIN_PD18__GMDIO>;
0155 bias-disable;
0156 };
0157
0158 pinctrl_macb0_phy_irq: macb0_phy_irq {
0159 pinmux = <PIN_PD31__GPIO>;
0160 bias-disable;
0161 };
0162 };
0163 };
0164 };
0165 };
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