0001 // SPDX-License-Identifier: GPL-2.0+
0002 #include <dt-bindings/clock/aspeed-clock.h>
0003
0004 / {
0005 model = "Aspeed BMC";
0006 compatible = "aspeed,ast2400";
0007 #address-cells = <1>;
0008 #size-cells = <1>;
0009 interrupt-parent = <&vic>;
0010
0011 aliases {
0012 i2c0 = &i2c0;
0013 i2c1 = &i2c1;
0014 i2c2 = &i2c2;
0015 i2c3 = &i2c3;
0016 i2c4 = &i2c4;
0017 i2c5 = &i2c5;
0018 i2c6 = &i2c6;
0019 i2c7 = &i2c7;
0020 i2c8 = &i2c8;
0021 i2c9 = &i2c9;
0022 i2c10 = &i2c10;
0023 i2c11 = &i2c11;
0024 i2c12 = &i2c12;
0025 i2c13 = &i2c13;
0026 serial0 = &uart1;
0027 serial1 = &uart2;
0028 serial2 = &uart3;
0029 serial3 = &uart4;
0030 serial4 = &uart5;
0031 serial5 = &vuart;
0032 };
0033
0034 cpus {
0035 #address-cells = <1>;
0036 #size-cells = <0>;
0037
0038 cpu@0 {
0039 compatible = "arm,arm926ej-s";
0040 device_type = "cpu";
0041 reg = <0>;
0042 };
0043 };
0044
0045 memory@40000000 {
0046 device_type = "memory";
0047 reg = <0x40000000 0>;
0048 };
0049
0050 ahb {
0051 compatible = "simple-bus";
0052 #address-cells = <1>;
0053 #size-cells = <1>;
0054 ranges;
0055
0056 fmc: spi@1e620000 {
0057 reg = <0x1e620000 0x94>, <0x20000000 0x10000000>;
0058 #address-cells = <1>;
0059 #size-cells = <0>;
0060 compatible = "aspeed,ast2400-fmc";
0061 clocks = <&syscon ASPEED_CLK_AHB>;
0062 status = "disabled";
0063 interrupts = <19>;
0064 flash@0 {
0065 reg = < 0 >;
0066 compatible = "jedec,spi-nor";
0067 spi-rx-bus-width = <2>;
0068 spi-max-frequency = <50000000>;
0069 status = "disabled";
0070 };
0071 flash@1 {
0072 reg = < 1 >;
0073 compatible = "jedec,spi-nor";
0074 spi-rx-bus-width = <2>;
0075 spi-max-frequency = <50000000>;
0076 status = "disabled";
0077 };
0078 flash@2 {
0079 reg = < 2 >;
0080 compatible = "jedec,spi-nor";
0081 spi-rx-bus-width = <2>;
0082 spi-max-frequency = <50000000>;
0083 status = "disabled";
0084 };
0085 flash@3 {
0086 reg = < 3 >;
0087 compatible = "jedec,spi-nor";
0088 spi-rx-bus-width = <2>;
0089 spi-max-frequency = <50000000>;
0090 status = "disabled";
0091 };
0092 flash@4 {
0093 reg = < 4 >;
0094 compatible = "jedec,spi-nor";
0095 spi-rx-bus-width = <2>;
0096 spi-max-frequency = <50000000>;
0097 status = "disabled";
0098 };
0099 };
0100
0101 spi: spi@1e630000 {
0102 reg = <0x1e630000 0x18>, <0x30000000 0x10000000>;
0103 #address-cells = <1>;
0104 #size-cells = <0>;
0105 compatible = "aspeed,ast2400-spi";
0106 clocks = <&syscon ASPEED_CLK_AHB>;
0107 status = "disabled";
0108 flash@0 {
0109 reg = < 0 >;
0110 compatible = "jedec,spi-nor";
0111 spi-max-frequency = <50000000>;
0112 spi-rx-bus-width = <2>;
0113 status = "disabled";
0114 };
0115 };
0116
0117 vic: interrupt-controller@1e6c0080 {
0118 compatible = "aspeed,ast2400-vic";
0119 interrupt-controller;
0120 #interrupt-cells = <1>;
0121 valid-sources = <0xffffffff 0x0007ffff>;
0122 reg = <0x1e6c0080 0x80>;
0123 };
0124
0125 cvic: copro-interrupt-controller@1e6c2000 {
0126 compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
0127 valid-sources = <0x7fffffff>;
0128 reg = <0x1e6c2000 0x80>;
0129 };
0130
0131 mac0: ethernet@1e660000 {
0132 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
0133 reg = <0x1e660000 0x180>;
0134 interrupts = <2>;
0135 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
0136 status = "disabled";
0137 };
0138
0139 mac1: ethernet@1e680000 {
0140 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
0141 reg = <0x1e680000 0x180>;
0142 interrupts = <3>;
0143 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
0144 status = "disabled";
0145 };
0146
0147 ehci0: usb@1e6a1000 {
0148 compatible = "aspeed,ast2400-ehci", "generic-ehci";
0149 reg = <0x1e6a1000 0x100>;
0150 interrupts = <5>;
0151 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
0152 pinctrl-names = "default";
0153 pinctrl-0 = <&pinctrl_usb2h_default>;
0154 status = "disabled";
0155 };
0156
0157 uhci: usb@1e6b0000 {
0158 compatible = "aspeed,ast2400-uhci", "generic-uhci";
0159 reg = <0x1e6b0000 0x100>;
0160 interrupts = <14>;
0161 #ports = <3>;
0162 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
0163 status = "disabled";
0164 /*
0165 * No default pinmux, it will follow EHCI, use an explicit pinmux
0166 * override if you don't enable EHCI
0167 */
0168 };
0169
0170 vhub: usb-vhub@1e6a0000 {
0171 compatible = "aspeed,ast2400-usb-vhub";
0172 reg = <0x1e6a0000 0x300>;
0173 interrupts = <5>;
0174 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
0175 aspeed,vhub-downstream-ports = <5>;
0176 aspeed,vhub-generic-endpoints = <15>;
0177 pinctrl-names = "default";
0178 pinctrl-0 = <&pinctrl_usb2d_default>;
0179 status = "disabled";
0180 };
0181
0182 apb {
0183 compatible = "simple-bus";
0184 #address-cells = <1>;
0185 #size-cells = <1>;
0186 ranges;
0187
0188 syscon: syscon@1e6e2000 {
0189 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
0190 reg = <0x1e6e2000 0x1a8>;
0191 #address-cells = <1>;
0192 #size-cells = <1>;
0193 ranges = <0 0x1e6e2000 0x1000>;
0194 #clock-cells = <1>;
0195 #reset-cells = <1>;
0196
0197 p2a: p2a-control@2c {
0198 reg = <0x2c 0x4>;
0199 compatible = "aspeed,ast2400-p2a-ctrl";
0200 status = "disabled";
0201 };
0202
0203 silicon-id@7c {
0204 compatible = "aspeed,ast2400-silicon-id", "aspeed,silicon-id";
0205 reg = <0x7c 0x4>;
0206 };
0207
0208 pinctrl: pinctrl@80 {
0209 reg = <0x80 0x18>, <0xa0 0x10>;
0210 compatible = "aspeed,ast2400-pinctrl";
0211 };
0212 };
0213
0214 rng: hwrng@1e6e2078 {
0215 compatible = "timeriomem_rng";
0216 reg = <0x1e6e2078 0x4>;
0217 period = <1>;
0218 quality = <100>;
0219 };
0220
0221 adc: adc@1e6e9000 {
0222 compatible = "aspeed,ast2400-adc";
0223 reg = <0x1e6e9000 0xb0>;
0224 clocks = <&syscon ASPEED_CLK_APB>;
0225 resets = <&syscon ASPEED_RESET_ADC>;
0226 #io-channel-cells = <1>;
0227 status = "disabled";
0228 };
0229
0230 sram: sram@1e720000 {
0231 compatible = "mmio-sram";
0232 reg = <0x1e720000 0x8000>; // 32K
0233 };
0234
0235 video: video@1e700000 {
0236 compatible = "aspeed,ast2400-video-engine";
0237 reg = <0x1e700000 0x1000>;
0238 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
0239 <&syscon ASPEED_CLK_GATE_ECLK>;
0240 clock-names = "vclk", "eclk";
0241 interrupts = <7>;
0242 status = "disabled";
0243 };
0244
0245 sdmmc: sd-controller@1e740000 {
0246 compatible = "aspeed,ast2400-sd-controller";
0247 reg = <0x1e740000 0x100>;
0248 #address-cells = <1>;
0249 #size-cells = <1>;
0250 ranges = <0 0x1e740000 0x10000>;
0251 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
0252 status = "disabled";
0253
0254 sdhci0: sdhci@100 {
0255 compatible = "aspeed,ast2400-sdhci";
0256 reg = <0x100 0x100>;
0257 interrupts = <26>;
0258 sdhci,auto-cmd12;
0259 clocks = <&syscon ASPEED_CLK_SDIO>;
0260 status = "disabled";
0261 };
0262
0263 sdhci1: sdhci@200 {
0264 compatible = "aspeed,ast2400-sdhci";
0265 reg = <0x200 0x100>;
0266 interrupts = <26>;
0267 sdhci,auto-cmd12;
0268 clocks = <&syscon ASPEED_CLK_SDIO>;
0269 status = "disabled";
0270 };
0271 };
0272
0273 gpio: gpio@1e780000 {
0274 #gpio-cells = <2>;
0275 gpio-controller;
0276 compatible = "aspeed,ast2400-gpio";
0277 reg = <0x1e780000 0x1000>;
0278 interrupts = <20>;
0279 gpio-ranges = <&pinctrl 0 0 220>;
0280 clocks = <&syscon ASPEED_CLK_APB>;
0281 interrupt-controller;
0282 #interrupt-cells = <2>;
0283 };
0284
0285 timer: timer@1e782000 {
0286 /* This timer is a Faraday FTTMR010 derivative */
0287 compatible = "aspeed,ast2400-timer";
0288 reg = <0x1e782000 0x90>;
0289 interrupts = <16 17 18 35 36 37 38 39>;
0290 clocks = <&syscon ASPEED_CLK_APB>;
0291 clock-names = "PCLK";
0292 };
0293
0294 rtc: rtc@1e781000 {
0295 compatible = "aspeed,ast2400-rtc";
0296 reg = <0x1e781000 0x18>;
0297 status = "disabled";
0298 };
0299
0300 uart1: serial@1e783000 {
0301 compatible = "ns16550a";
0302 reg = <0x1e783000 0x20>;
0303 reg-shift = <2>;
0304 interrupts = <9>;
0305 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
0306 resets = <&lpc_reset 4>;
0307 no-loopback-test;
0308 status = "disabled";
0309 };
0310
0311 uart5: serial@1e784000 {
0312 compatible = "ns16550a";
0313 reg = <0x1e784000 0x20>;
0314 reg-shift = <2>;
0315 interrupts = <10>;
0316 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
0317 no-loopback-test;
0318 status = "disabled";
0319 };
0320
0321 wdt1: watchdog@1e785000 {
0322 compatible = "aspeed,ast2400-wdt";
0323 reg = <0x1e785000 0x1c>;
0324 clocks = <&syscon ASPEED_CLK_APB>;
0325 };
0326
0327 wdt2: watchdog@1e785020 {
0328 compatible = "aspeed,ast2400-wdt";
0329 reg = <0x1e785020 0x1c>;
0330 clocks = <&syscon ASPEED_CLK_APB>;
0331 };
0332
0333 pwm_tacho: pwm-tacho-controller@1e786000 {
0334 compatible = "aspeed,ast2400-pwm-tacho";
0335 #address-cells = <1>;
0336 #size-cells = <0>;
0337 reg = <0x1e786000 0x1000>;
0338 clocks = <&syscon ASPEED_CLK_24M>;
0339 resets = <&syscon ASPEED_RESET_PWM>;
0340 status = "disabled";
0341 };
0342
0343 vuart: serial@1e787000 {
0344 compatible = "aspeed,ast2400-vuart";
0345 reg = <0x1e787000 0x40>;
0346 reg-shift = <2>;
0347 interrupts = <8>;
0348 clocks = <&syscon ASPEED_CLK_APB>;
0349 no-loopback-test;
0350 status = "disabled";
0351 };
0352
0353 lpc: lpc@1e789000 {
0354 compatible = "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon";
0355 reg = <0x1e789000 0x1000>;
0356 reg-io-width = <4>;
0357
0358 #address-cells = <1>;
0359 #size-cells = <1>;
0360 ranges = <0x0 0x1e789000 0x1000>;
0361
0362 lpc_ctrl: lpc-ctrl@80 {
0363 compatible = "aspeed,ast2400-lpc-ctrl";
0364 reg = <0x80 0x10>;
0365 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
0366 status = "disabled";
0367 };
0368
0369 lpc_snoop: lpc-snoop@90 {
0370 compatible = "aspeed,ast2400-lpc-snoop";
0371 reg = <0x90 0x8>;
0372 interrupts = <8>;
0373 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
0374 status = "disabled";
0375 };
0376
0377 lhc: lhc@a0 {
0378 compatible = "aspeed,ast2400-lhc";
0379 reg = <0xa0 0x24 0xc8 0x8>;
0380 };
0381
0382 lpc_reset: reset-controller@98 {
0383 compatible = "aspeed,ast2400-lpc-reset";
0384 reg = <0x98 0x4>;
0385 #reset-cells = <1>;
0386 };
0387
0388 ibt: ibt@140 {
0389 compatible = "aspeed,ast2400-ibt-bmc";
0390 reg = <0x140 0x18>;
0391 interrupts = <8>;
0392 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
0393 status = "disabled";
0394 };
0395
0396 uart_routing: uart-routing@9c {
0397 compatible = "aspeed,ast2400-uart-routing";
0398 reg = <0x9c 0x4>;
0399 status = "disabled";
0400 };
0401 };
0402
0403 peci0: peci-controller@1e78b000 {
0404 compatible = "aspeed,ast2400-peci";
0405 reg = <0x1e78b000 0x60>;
0406 interrupts = <15>;
0407 clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
0408 resets = <&syscon ASPEED_RESET_PECI>;
0409 cmd-timeout-ms = <1000>;
0410 clock-frequency = <1000000>;
0411 status = "disabled";
0412 };
0413
0414 uart2: serial@1e78d000 {
0415 compatible = "ns16550a";
0416 reg = <0x1e78d000 0x20>;
0417 reg-shift = <2>;
0418 interrupts = <32>;
0419 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
0420 resets = <&lpc_reset 5>;
0421 no-loopback-test;
0422 status = "disabled";
0423 };
0424
0425 uart3: serial@1e78e000 {
0426 compatible = "ns16550a";
0427 reg = <0x1e78e000 0x20>;
0428 reg-shift = <2>;
0429 interrupts = <33>;
0430 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
0431 resets = <&lpc_reset 6>;
0432 no-loopback-test;
0433 status = "disabled";
0434 };
0435
0436 uart4: serial@1e78f000 {
0437 compatible = "ns16550a";
0438 reg = <0x1e78f000 0x20>;
0439 reg-shift = <2>;
0440 interrupts = <34>;
0441 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
0442 resets = <&lpc_reset 7>;
0443 no-loopback-test;
0444 status = "disabled";
0445 };
0446
0447 i2c: bus@1e78a000 {
0448 compatible = "simple-bus";
0449 #address-cells = <1>;
0450 #size-cells = <1>;
0451 ranges = <0 0x1e78a000 0x1000>;
0452 };
0453 };
0454 };
0455 };
0456
0457 &i2c {
0458 i2c_ic: interrupt-controller@0 {
0459 #interrupt-cells = <1>;
0460 compatible = "aspeed,ast2400-i2c-ic";
0461 reg = <0x0 0x40>;
0462 interrupts = <12>;
0463 interrupt-controller;
0464 };
0465
0466 i2c0: i2c-bus@40 {
0467 #address-cells = <1>;
0468 #size-cells = <0>;
0469 #interrupt-cells = <1>;
0470
0471 reg = <0x40 0x40>;
0472 compatible = "aspeed,ast2400-i2c-bus";
0473 clocks = <&syscon ASPEED_CLK_APB>;
0474 resets = <&syscon ASPEED_RESET_I2C>;
0475 bus-frequency = <100000>;
0476 interrupts = <0>;
0477 interrupt-parent = <&i2c_ic>;
0478 status = "disabled";
0479 /* Does not need pinctrl properties */
0480 };
0481
0482 i2c1: i2c-bus@80 {
0483 #address-cells = <1>;
0484 #size-cells = <0>;
0485 #interrupt-cells = <1>;
0486
0487 reg = <0x80 0x40>;
0488 compatible = "aspeed,ast2400-i2c-bus";
0489 clocks = <&syscon ASPEED_CLK_APB>;
0490 resets = <&syscon ASPEED_RESET_I2C>;
0491 bus-frequency = <100000>;
0492 interrupts = <1>;
0493 interrupt-parent = <&i2c_ic>;
0494 status = "disabled";
0495 /* Does not need pinctrl properties */
0496 };
0497
0498 i2c2: i2c-bus@c0 {
0499 #address-cells = <1>;
0500 #size-cells = <0>;
0501 #interrupt-cells = <1>;
0502
0503 reg = <0xc0 0x40>;
0504 compatible = "aspeed,ast2400-i2c-bus";
0505 clocks = <&syscon ASPEED_CLK_APB>;
0506 resets = <&syscon ASPEED_RESET_I2C>;
0507 bus-frequency = <100000>;
0508 interrupts = <2>;
0509 interrupt-parent = <&i2c_ic>;
0510 pinctrl-names = "default";
0511 pinctrl-0 = <&pinctrl_i2c3_default>;
0512 status = "disabled";
0513 };
0514
0515 i2c3: i2c-bus@100 {
0516 #address-cells = <1>;
0517 #size-cells = <0>;
0518 #interrupt-cells = <1>;
0519
0520 reg = <0x100 0x40>;
0521 compatible = "aspeed,ast2400-i2c-bus";
0522 clocks = <&syscon ASPEED_CLK_APB>;
0523 resets = <&syscon ASPEED_RESET_I2C>;
0524 bus-frequency = <100000>;
0525 interrupts = <3>;
0526 interrupt-parent = <&i2c_ic>;
0527 pinctrl-names = "default";
0528 pinctrl-0 = <&pinctrl_i2c4_default>;
0529 status = "disabled";
0530 };
0531
0532 i2c4: i2c-bus@140 {
0533 #address-cells = <1>;
0534 #size-cells = <0>;
0535 #interrupt-cells = <1>;
0536
0537 reg = <0x140 0x40>;
0538 compatible = "aspeed,ast2400-i2c-bus";
0539 clocks = <&syscon ASPEED_CLK_APB>;
0540 resets = <&syscon ASPEED_RESET_I2C>;
0541 bus-frequency = <100000>;
0542 interrupts = <4>;
0543 interrupt-parent = <&i2c_ic>;
0544 pinctrl-names = "default";
0545 pinctrl-0 = <&pinctrl_i2c5_default>;
0546 status = "disabled";
0547 };
0548
0549 i2c5: i2c-bus@180 {
0550 #address-cells = <1>;
0551 #size-cells = <0>;
0552 #interrupt-cells = <1>;
0553
0554 reg = <0x180 0x40>;
0555 compatible = "aspeed,ast2400-i2c-bus";
0556 clocks = <&syscon ASPEED_CLK_APB>;
0557 resets = <&syscon ASPEED_RESET_I2C>;
0558 bus-frequency = <100000>;
0559 interrupts = <5>;
0560 interrupt-parent = <&i2c_ic>;
0561 pinctrl-names = "default";
0562 pinctrl-0 = <&pinctrl_i2c6_default>;
0563 status = "disabled";
0564 };
0565
0566 i2c6: i2c-bus@1c0 {
0567 #address-cells = <1>;
0568 #size-cells = <0>;
0569 #interrupt-cells = <1>;
0570
0571 reg = <0x1c0 0x40>;
0572 compatible = "aspeed,ast2400-i2c-bus";
0573 clocks = <&syscon ASPEED_CLK_APB>;
0574 resets = <&syscon ASPEED_RESET_I2C>;
0575 bus-frequency = <100000>;
0576 interrupts = <6>;
0577 interrupt-parent = <&i2c_ic>;
0578 pinctrl-names = "default";
0579 pinctrl-0 = <&pinctrl_i2c7_default>;
0580 status = "disabled";
0581 };
0582
0583 i2c7: i2c-bus@300 {
0584 #address-cells = <1>;
0585 #size-cells = <0>;
0586 #interrupt-cells = <1>;
0587
0588 reg = <0x300 0x40>;
0589 compatible = "aspeed,ast2400-i2c-bus";
0590 clocks = <&syscon ASPEED_CLK_APB>;
0591 resets = <&syscon ASPEED_RESET_I2C>;
0592 bus-frequency = <100000>;
0593 interrupts = <7>;
0594 interrupt-parent = <&i2c_ic>;
0595 pinctrl-names = "default";
0596 pinctrl-0 = <&pinctrl_i2c8_default>;
0597 status = "disabled";
0598 };
0599
0600 i2c8: i2c-bus@340 {
0601 #address-cells = <1>;
0602 #size-cells = <0>;
0603 #interrupt-cells = <1>;
0604
0605 reg = <0x340 0x40>;
0606 compatible = "aspeed,ast2400-i2c-bus";
0607 clocks = <&syscon ASPEED_CLK_APB>;
0608 resets = <&syscon ASPEED_RESET_I2C>;
0609 bus-frequency = <100000>;
0610 interrupts = <8>;
0611 interrupt-parent = <&i2c_ic>;
0612 pinctrl-names = "default";
0613 pinctrl-0 = <&pinctrl_i2c9_default>;
0614 status = "disabled";
0615 };
0616
0617 i2c9: i2c-bus@380 {
0618 #address-cells = <1>;
0619 #size-cells = <0>;
0620 #interrupt-cells = <1>;
0621
0622 reg = <0x380 0x40>;
0623 compatible = "aspeed,ast2400-i2c-bus";
0624 clocks = <&syscon ASPEED_CLK_APB>;
0625 resets = <&syscon ASPEED_RESET_I2C>;
0626 bus-frequency = <100000>;
0627 interrupts = <9>;
0628 interrupt-parent = <&i2c_ic>;
0629 pinctrl-names = "default";
0630 pinctrl-0 = <&pinctrl_i2c10_default>;
0631 status = "disabled";
0632 };
0633
0634 i2c10: i2c-bus@3c0 {
0635 #address-cells = <1>;
0636 #size-cells = <0>;
0637 #interrupt-cells = <1>;
0638
0639 reg = <0x3c0 0x40>;
0640 compatible = "aspeed,ast2400-i2c-bus";
0641 clocks = <&syscon ASPEED_CLK_APB>;
0642 resets = <&syscon ASPEED_RESET_I2C>;
0643 bus-frequency = <100000>;
0644 interrupts = <10>;
0645 interrupt-parent = <&i2c_ic>;
0646 pinctrl-names = "default";
0647 pinctrl-0 = <&pinctrl_i2c11_default>;
0648 status = "disabled";
0649 };
0650
0651 i2c11: i2c-bus@400 {
0652 #address-cells = <1>;
0653 #size-cells = <0>;
0654 #interrupt-cells = <1>;
0655
0656 reg = <0x400 0x40>;
0657 compatible = "aspeed,ast2400-i2c-bus";
0658 clocks = <&syscon ASPEED_CLK_APB>;
0659 resets = <&syscon ASPEED_RESET_I2C>;
0660 bus-frequency = <100000>;
0661 interrupts = <11>;
0662 interrupt-parent = <&i2c_ic>;
0663 pinctrl-names = "default";
0664 pinctrl-0 = <&pinctrl_i2c12_default>;
0665 status = "disabled";
0666 };
0667
0668 i2c12: i2c-bus@440 {
0669 #address-cells = <1>;
0670 #size-cells = <0>;
0671 #interrupt-cells = <1>;
0672
0673 reg = <0x440 0x40>;
0674 compatible = "aspeed,ast2400-i2c-bus";
0675 clocks = <&syscon ASPEED_CLK_APB>;
0676 resets = <&syscon ASPEED_RESET_I2C>;
0677 bus-frequency = <100000>;
0678 interrupts = <12>;
0679 interrupt-parent = <&i2c_ic>;
0680 pinctrl-names = "default";
0681 pinctrl-0 = <&pinctrl_i2c13_default>;
0682 status = "disabled";
0683 };
0684
0685 i2c13: i2c-bus@480 {
0686 #address-cells = <1>;
0687 #size-cells = <0>;
0688 #interrupt-cells = <1>;
0689
0690 reg = <0x480 0x40>;
0691 compatible = "aspeed,ast2400-i2c-bus";
0692 clocks = <&syscon ASPEED_CLK_APB>;
0693 resets = <&syscon ASPEED_RESET_I2C>;
0694 bus-frequency = <100000>;
0695 interrupts = <13>;
0696 interrupt-parent = <&i2c_ic>;
0697 pinctrl-names = "default";
0698 pinctrl-0 = <&pinctrl_i2c14_default>;
0699 status = "disabled";
0700 };
0701 };
0702
0703 &pinctrl {
0704 pinctrl_acpi_default: acpi_default {
0705 function = "ACPI";
0706 groups = "ACPI";
0707 };
0708
0709 pinctrl_adc0_default: adc0_default {
0710 function = "ADC0";
0711 groups = "ADC0";
0712 };
0713
0714 pinctrl_adc1_default: adc1_default {
0715 function = "ADC1";
0716 groups = "ADC1";
0717 };
0718
0719 pinctrl_adc10_default: adc10_default {
0720 function = "ADC10";
0721 groups = "ADC10";
0722 };
0723
0724 pinctrl_adc11_default: adc11_default {
0725 function = "ADC11";
0726 groups = "ADC11";
0727 };
0728
0729 pinctrl_adc12_default: adc12_default {
0730 function = "ADC12";
0731 groups = "ADC12";
0732 };
0733
0734 pinctrl_adc13_default: adc13_default {
0735 function = "ADC13";
0736 groups = "ADC13";
0737 };
0738
0739 pinctrl_adc14_default: adc14_default {
0740 function = "ADC14";
0741 groups = "ADC14";
0742 };
0743
0744 pinctrl_adc15_default: adc15_default {
0745 function = "ADC15";
0746 groups = "ADC15";
0747 };
0748
0749 pinctrl_adc2_default: adc2_default {
0750 function = "ADC2";
0751 groups = "ADC2";
0752 };
0753
0754 pinctrl_adc3_default: adc3_default {
0755 function = "ADC3";
0756 groups = "ADC3";
0757 };
0758
0759 pinctrl_adc4_default: adc4_default {
0760 function = "ADC4";
0761 groups = "ADC4";
0762 };
0763
0764 pinctrl_adc5_default: adc5_default {
0765 function = "ADC5";
0766 groups = "ADC5";
0767 };
0768
0769 pinctrl_adc6_default: adc6_default {
0770 function = "ADC6";
0771 groups = "ADC6";
0772 };
0773
0774 pinctrl_adc7_default: adc7_default {
0775 function = "ADC7";
0776 groups = "ADC7";
0777 };
0778
0779 pinctrl_adc8_default: adc8_default {
0780 function = "ADC8";
0781 groups = "ADC8";
0782 };
0783
0784 pinctrl_adc9_default: adc9_default {
0785 function = "ADC9";
0786 groups = "ADC9";
0787 };
0788
0789 pinctrl_bmcint_default: bmcint_default {
0790 function = "BMCINT";
0791 groups = "BMCINT";
0792 };
0793
0794 pinctrl_ddcclk_default: ddcclk_default {
0795 function = "DDCCLK";
0796 groups = "DDCCLK";
0797 };
0798
0799 pinctrl_ddcdat_default: ddcdat_default {
0800 function = "DDCDAT";
0801 groups = "DDCDAT";
0802 };
0803
0804 pinctrl_extrst_default: extrst_default {
0805 function = "EXTRST";
0806 groups = "EXTRST";
0807 };
0808
0809 pinctrl_flack_default: flack_default {
0810 function = "FLACK";
0811 groups = "FLACK";
0812 };
0813
0814 pinctrl_flbusy_default: flbusy_default {
0815 function = "FLBUSY";
0816 groups = "FLBUSY";
0817 };
0818
0819 pinctrl_flwp_default: flwp_default {
0820 function = "FLWP";
0821 groups = "FLWP";
0822 };
0823
0824 pinctrl_gpid_default: gpid_default {
0825 function = "GPID";
0826 groups = "GPID";
0827 };
0828
0829 pinctrl_gpid0_default: gpid0_default {
0830 function = "GPID0";
0831 groups = "GPID0";
0832 };
0833
0834 pinctrl_gpid2_default: gpid2_default {
0835 function = "GPID2";
0836 groups = "GPID2";
0837 };
0838
0839 pinctrl_gpid4_default: gpid4_default {
0840 function = "GPID4";
0841 groups = "GPID4";
0842 };
0843
0844 pinctrl_gpid6_default: gpid6_default {
0845 function = "GPID6";
0846 groups = "GPID6";
0847 };
0848
0849 pinctrl_gpie0_default: gpie0_default {
0850 function = "GPIE0";
0851 groups = "GPIE0";
0852 };
0853
0854 pinctrl_gpie2_default: gpie2_default {
0855 function = "GPIE2";
0856 groups = "GPIE2";
0857 };
0858
0859 pinctrl_gpie4_default: gpie4_default {
0860 function = "GPIE4";
0861 groups = "GPIE4";
0862 };
0863
0864 pinctrl_gpie6_default: gpie6_default {
0865 function = "GPIE6";
0866 groups = "GPIE6";
0867 };
0868
0869 pinctrl_i2c10_default: i2c10_default {
0870 function = "I2C10";
0871 groups = "I2C10";
0872 };
0873
0874 pinctrl_i2c11_default: i2c11_default {
0875 function = "I2C11";
0876 groups = "I2C11";
0877 };
0878
0879 pinctrl_i2c12_default: i2c12_default {
0880 function = "I2C12";
0881 groups = "I2C12";
0882 };
0883
0884 pinctrl_i2c13_default: i2c13_default {
0885 function = "I2C13";
0886 groups = "I2C13";
0887 };
0888
0889 pinctrl_i2c14_default: i2c14_default {
0890 function = "I2C14";
0891 groups = "I2C14";
0892 };
0893
0894 pinctrl_i2c3_default: i2c3_default {
0895 function = "I2C3";
0896 groups = "I2C3";
0897 };
0898
0899 pinctrl_i2c4_default: i2c4_default {
0900 function = "I2C4";
0901 groups = "I2C4";
0902 };
0903
0904 pinctrl_i2c5_default: i2c5_default {
0905 function = "I2C5";
0906 groups = "I2C5";
0907 };
0908
0909 pinctrl_i2c6_default: i2c6_default {
0910 function = "I2C6";
0911 groups = "I2C6";
0912 };
0913
0914 pinctrl_i2c7_default: i2c7_default {
0915 function = "I2C7";
0916 groups = "I2C7";
0917 };
0918
0919 pinctrl_i2c8_default: i2c8_default {
0920 function = "I2C8";
0921 groups = "I2C8";
0922 };
0923
0924 pinctrl_i2c9_default: i2c9_default {
0925 function = "I2C9";
0926 groups = "I2C9";
0927 };
0928
0929 pinctrl_lpcpd_default: lpcpd_default {
0930 function = "LPCPD";
0931 groups = "LPCPD";
0932 };
0933
0934 pinctrl_lpcpme_default: lpcpme_default {
0935 function = "LPCPME";
0936 groups = "LPCPME";
0937 };
0938
0939 pinctrl_lpcrst_default: lpcrst_default {
0940 function = "LPCRST";
0941 groups = "LPCRST";
0942 };
0943
0944 pinctrl_lpcsmi_default: lpcsmi_default {
0945 function = "LPCSMI";
0946 groups = "LPCSMI";
0947 };
0948
0949 pinctrl_mac1link_default: mac1link_default {
0950 function = "MAC1LINK";
0951 groups = "MAC1LINK";
0952 };
0953
0954 pinctrl_mac2link_default: mac2link_default {
0955 function = "MAC2LINK";
0956 groups = "MAC2LINK";
0957 };
0958
0959 pinctrl_mdio1_default: mdio1_default {
0960 function = "MDIO1";
0961 groups = "MDIO1";
0962 };
0963
0964 pinctrl_mdio2_default: mdio2_default {
0965 function = "MDIO2";
0966 groups = "MDIO2";
0967 };
0968
0969 pinctrl_ncts1_default: ncts1_default {
0970 function = "NCTS1";
0971 groups = "NCTS1";
0972 };
0973
0974 pinctrl_ncts2_default: ncts2_default {
0975 function = "NCTS2";
0976 groups = "NCTS2";
0977 };
0978
0979 pinctrl_ncts3_default: ncts3_default {
0980 function = "NCTS3";
0981 groups = "NCTS3";
0982 };
0983
0984 pinctrl_ncts4_default: ncts4_default {
0985 function = "NCTS4";
0986 groups = "NCTS4";
0987 };
0988
0989 pinctrl_ndcd1_default: ndcd1_default {
0990 function = "NDCD1";
0991 groups = "NDCD1";
0992 };
0993
0994 pinctrl_ndcd2_default: ndcd2_default {
0995 function = "NDCD2";
0996 groups = "NDCD2";
0997 };
0998
0999 pinctrl_ndcd3_default: ndcd3_default {
1000 function = "NDCD3";
1001 groups = "NDCD3";
1002 };
1003
1004 pinctrl_ndcd4_default: ndcd4_default {
1005 function = "NDCD4";
1006 groups = "NDCD4";
1007 };
1008
1009 pinctrl_ndsr1_default: ndsr1_default {
1010 function = "NDSR1";
1011 groups = "NDSR1";
1012 };
1013
1014 pinctrl_ndsr2_default: ndsr2_default {
1015 function = "NDSR2";
1016 groups = "NDSR2";
1017 };
1018
1019 pinctrl_ndsr3_default: ndsr3_default {
1020 function = "NDSR3";
1021 groups = "NDSR3";
1022 };
1023
1024 pinctrl_ndsr4_default: ndsr4_default {
1025 function = "NDSR4";
1026 groups = "NDSR4";
1027 };
1028
1029 pinctrl_ndtr1_default: ndtr1_default {
1030 function = "NDTR1";
1031 groups = "NDTR1";
1032 };
1033
1034 pinctrl_ndtr2_default: ndtr2_default {
1035 function = "NDTR2";
1036 groups = "NDTR2";
1037 };
1038
1039 pinctrl_ndtr3_default: ndtr3_default {
1040 function = "NDTR3";
1041 groups = "NDTR3";
1042 };
1043
1044 pinctrl_ndtr4_default: ndtr4_default {
1045 function = "NDTR4";
1046 groups = "NDTR4";
1047 };
1048
1049 pinctrl_ndts4_default: ndts4_default {
1050 function = "NDTS4";
1051 groups = "NDTS4";
1052 };
1053
1054 pinctrl_nri1_default: nri1_default {
1055 function = "NRI1";
1056 groups = "NRI1";
1057 };
1058
1059 pinctrl_nri2_default: nri2_default {
1060 function = "NRI2";
1061 groups = "NRI2";
1062 };
1063
1064 pinctrl_nri3_default: nri3_default {
1065 function = "NRI3";
1066 groups = "NRI3";
1067 };
1068
1069 pinctrl_nri4_default: nri4_default {
1070 function = "NRI4";
1071 groups = "NRI4";
1072 };
1073
1074 pinctrl_nrts1_default: nrts1_default {
1075 function = "NRTS1";
1076 groups = "NRTS1";
1077 };
1078
1079 pinctrl_nrts2_default: nrts2_default {
1080 function = "NRTS2";
1081 groups = "NRTS2";
1082 };
1083
1084 pinctrl_nrts3_default: nrts3_default {
1085 function = "NRTS3";
1086 groups = "NRTS3";
1087 };
1088
1089 pinctrl_oscclk_default: oscclk_default {
1090 function = "OSCCLK";
1091 groups = "OSCCLK";
1092 };
1093
1094 pinctrl_pwm0_default: pwm0_default {
1095 function = "PWM0";
1096 groups = "PWM0";
1097 };
1098
1099 pinctrl_pwm1_default: pwm1_default {
1100 function = "PWM1";
1101 groups = "PWM1";
1102 };
1103
1104 pinctrl_pwm2_default: pwm2_default {
1105 function = "PWM2";
1106 groups = "PWM2";
1107 };
1108
1109 pinctrl_pwm3_default: pwm3_default {
1110 function = "PWM3";
1111 groups = "PWM3";
1112 };
1113
1114 pinctrl_pwm4_default: pwm4_default {
1115 function = "PWM4";
1116 groups = "PWM4";
1117 };
1118
1119 pinctrl_pwm5_default: pwm5_default {
1120 function = "PWM5";
1121 groups = "PWM5";
1122 };
1123
1124 pinctrl_pwm6_default: pwm6_default {
1125 function = "PWM6";
1126 groups = "PWM6";
1127 };
1128
1129 pinctrl_pwm7_default: pwm7_default {
1130 function = "PWM7";
1131 groups = "PWM7";
1132 };
1133
1134 pinctrl_rgmii1_default: rgmii1_default {
1135 function = "RGMII1";
1136 groups = "RGMII1";
1137 };
1138
1139 pinctrl_rgmii2_default: rgmii2_default {
1140 function = "RGMII2";
1141 groups = "RGMII2";
1142 };
1143
1144 pinctrl_rmii1_default: rmii1_default {
1145 function = "RMII1";
1146 groups = "RMII1";
1147 };
1148
1149 pinctrl_rmii2_default: rmii2_default {
1150 function = "RMII2";
1151 groups = "RMII2";
1152 };
1153
1154 pinctrl_rom16_default: rom16_default {
1155 function = "ROM16";
1156 groups = "ROM16";
1157 };
1158
1159 pinctrl_rom8_default: rom8_default {
1160 function = "ROM8";
1161 groups = "ROM8";
1162 };
1163
1164 pinctrl_romcs1_default: romcs1_default {
1165 function = "ROMCS1";
1166 groups = "ROMCS1";
1167 };
1168
1169 pinctrl_romcs2_default: romcs2_default {
1170 function = "ROMCS2";
1171 groups = "ROMCS2";
1172 };
1173
1174 pinctrl_romcs3_default: romcs3_default {
1175 function = "ROMCS3";
1176 groups = "ROMCS3";
1177 };
1178
1179 pinctrl_romcs4_default: romcs4_default {
1180 function = "ROMCS4";
1181 groups = "ROMCS4";
1182 };
1183
1184 pinctrl_rxd1_default: rxd1_default {
1185 function = "RXD1";
1186 groups = "RXD1";
1187 };
1188
1189 pinctrl_rxd2_default: rxd2_default {
1190 function = "RXD2";
1191 groups = "RXD2";
1192 };
1193
1194 pinctrl_rxd3_default: rxd3_default {
1195 function = "RXD3";
1196 groups = "RXD3";
1197 };
1198
1199 pinctrl_rxd4_default: rxd4_default {
1200 function = "RXD4";
1201 groups = "RXD4";
1202 };
1203
1204 pinctrl_salt1_default: salt1_default {
1205 function = "SALT1";
1206 groups = "SALT1";
1207 };
1208
1209 pinctrl_salt2_default: salt2_default {
1210 function = "SALT2";
1211 groups = "SALT2";
1212 };
1213
1214 pinctrl_salt3_default: salt3_default {
1215 function = "SALT3";
1216 groups = "SALT3";
1217 };
1218
1219 pinctrl_salt4_default: salt4_default {
1220 function = "SALT4";
1221 groups = "SALT4";
1222 };
1223
1224 pinctrl_sd1_default: sd1_default {
1225 function = "SD1";
1226 groups = "SD1";
1227 };
1228
1229 pinctrl_sd2_default: sd2_default {
1230 function = "SD2";
1231 groups = "SD2";
1232 };
1233
1234 pinctrl_sgpmck_default: sgpmck_default {
1235 function = "SGPMCK";
1236 groups = "SGPMCK";
1237 };
1238
1239 pinctrl_sgpmi_default: sgpmi_default {
1240 function = "SGPMI";
1241 groups = "SGPMI";
1242 };
1243
1244 pinctrl_sgpmld_default: sgpmld_default {
1245 function = "SGPMLD";
1246 groups = "SGPMLD";
1247 };
1248
1249 pinctrl_sgpmo_default: sgpmo_default {
1250 function = "SGPMO";
1251 groups = "SGPMO";
1252 };
1253
1254 pinctrl_sgpsck_default: sgpsck_default {
1255 function = "SGPSCK";
1256 groups = "SGPSCK";
1257 };
1258
1259 pinctrl_sgpsi0_default: sgpsi0_default {
1260 function = "SGPSI0";
1261 groups = "SGPSI0";
1262 };
1263
1264 pinctrl_sgpsi1_default: sgpsi1_default {
1265 function = "SGPSI1";
1266 groups = "SGPSI1";
1267 };
1268
1269 pinctrl_sgpsld_default: sgpsld_default {
1270 function = "SGPSLD";
1271 groups = "SGPSLD";
1272 };
1273
1274 pinctrl_sioonctrl_default: sioonctrl_default {
1275 function = "SIOONCTRL";
1276 groups = "SIOONCTRL";
1277 };
1278
1279 pinctrl_siopbi_default: siopbi_default {
1280 function = "SIOPBI";
1281 groups = "SIOPBI";
1282 };
1283
1284 pinctrl_siopbo_default: siopbo_default {
1285 function = "SIOPBO";
1286 groups = "SIOPBO";
1287 };
1288
1289 pinctrl_siopwreq_default: siopwreq_default {
1290 function = "SIOPWREQ";
1291 groups = "SIOPWREQ";
1292 };
1293
1294 pinctrl_siopwrgd_default: siopwrgd_default {
1295 function = "SIOPWRGD";
1296 groups = "SIOPWRGD";
1297 };
1298
1299 pinctrl_sios3_default: sios3_default {
1300 function = "SIOS3";
1301 groups = "SIOS3";
1302 };
1303
1304 pinctrl_sios5_default: sios5_default {
1305 function = "SIOS5";
1306 groups = "SIOS5";
1307 };
1308
1309 pinctrl_siosci_default: siosci_default {
1310 function = "SIOSCI";
1311 groups = "SIOSCI";
1312 };
1313
1314 pinctrl_spi1_default: spi1_default {
1315 function = "SPI1";
1316 groups = "SPI1";
1317 };
1318
1319 pinctrl_spi1debug_default: spi1debug_default {
1320 function = "SPI1DEBUG";
1321 groups = "SPI1DEBUG";
1322 };
1323
1324 pinctrl_spi1passthru_default: spi1passthru_default {
1325 function = "SPI1PASSTHRU";
1326 groups = "SPI1PASSTHRU";
1327 };
1328
1329 pinctrl_spics1_default: spics1_default {
1330 function = "SPICS1";
1331 groups = "SPICS1";
1332 };
1333
1334 pinctrl_timer3_default: timer3_default {
1335 function = "TIMER3";
1336 groups = "TIMER3";
1337 };
1338
1339 pinctrl_timer4_default: timer4_default {
1340 function = "TIMER4";
1341 groups = "TIMER4";
1342 };
1343
1344 pinctrl_timer5_default: timer5_default {
1345 function = "TIMER5";
1346 groups = "TIMER5";
1347 };
1348
1349 pinctrl_timer6_default: timer6_default {
1350 function = "TIMER6";
1351 groups = "TIMER6";
1352 };
1353
1354 pinctrl_timer7_default: timer7_default {
1355 function = "TIMER7";
1356 groups = "TIMER7";
1357 };
1358
1359 pinctrl_timer8_default: timer8_default {
1360 function = "TIMER8";
1361 groups = "TIMER8";
1362 };
1363
1364 pinctrl_txd1_default: txd1_default {
1365 function = "TXD1";
1366 groups = "TXD1";
1367 };
1368
1369 pinctrl_txd2_default: txd2_default {
1370 function = "TXD2";
1371 groups = "TXD2";
1372 };
1373
1374 pinctrl_txd3_default: txd3_default {
1375 function = "TXD3";
1376 groups = "TXD3";
1377 };
1378
1379 pinctrl_txd4_default: txd4_default {
1380 function = "TXD4";
1381 groups = "TXD4";
1382 };
1383
1384 pinctrl_uart6_default: uart6_default {
1385 function = "UART6";
1386 groups = "UART6";
1387 };
1388
1389 pinctrl_usbcki_default: usbcki_default {
1390 function = "USBCKI";
1391 groups = "USBCKI";
1392 };
1393
1394 pinctrl_usb2h_default: usb2h_default {
1395 function = "USB2H1";
1396 groups = "USB2H1";
1397 };
1398
1399 pinctrl_usb2d_default: usb2d_default {
1400 function = "USB2D1";
1401 groups = "USB2D1";
1402 };
1403
1404 pinctrl_vgabios_rom_default: vgabios_rom_default {
1405 function = "VGABIOS_ROM";
1406 groups = "VGABIOS_ROM";
1407 };
1408
1409 pinctrl_vgahs_default: vgahs_default {
1410 function = "VGAHS";
1411 groups = "VGAHS";
1412 };
1413
1414 pinctrl_vgavs_default: vgavs_default {
1415 function = "VGAVS";
1416 groups = "VGAVS";
1417 };
1418
1419 pinctrl_vpi18_default: vpi18_default {
1420 function = "VPI18";
1421 groups = "VPI18";
1422 };
1423
1424 pinctrl_vpi24_default: vpi24_default {
1425 function = "VPI24";
1426 groups = "VPI24";
1427 };
1428
1429 pinctrl_vpi30_default: vpi30_default {
1430 function = "VPI30";
1431 groups = "VPI30";
1432 };
1433
1434 pinctrl_vpo12_default: vpo12_default {
1435 function = "VPO12";
1436 groups = "VPO12";
1437 };
1438
1439 pinctrl_vpo24_default: vpo24_default {
1440 function = "VPO24";
1441 groups = "VPO24";
1442 };
1443
1444 pinctrl_wdtrst1_default: wdtrst1_default {
1445 function = "WDTRST1";
1446 groups = "WDTRST1";
1447 };
1448
1449 pinctrl_wdtrst2_default: wdtrst2_default {
1450 function = "WDTRST2";
1451 groups = "WDTRST2";
1452 };
1453 };
