Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0+
0002 /dts-v1/;
0003 
0004 #include "aspeed-g5.dtsi"
0005 #include <dt-bindings/gpio/aspeed-gpio.h>
0006 #include <dt-bindings/interrupt-controller/irq.h>
0007 
0008 / {
0009         model = "Tyan S7106 BMC";
0010         compatible = "tyan,s7106-bmc", "aspeed,ast2500";
0011 
0012         chosen {
0013                 stdout-path = &uart5;
0014                 bootargs = "console=ttyS4,115200 earlycon";
0015         };
0016 
0017         memory@80000000 {
0018                 device_type = "memory";
0019                 reg = <0x80000000 0x20000000>;
0020         };
0021 
0022         reserved-memory {
0023                 #address-cells = <1>;
0024                 #size-cells = <1>;
0025                 ranges;
0026 
0027                 p2a_memory: region@987f0000 {
0028                         no-map;
0029                         reg = <0x987f0000 0x00010000>; /* 64KB */
0030                 };
0031 
0032                 vga_memory: framebuffer@9f000000 {
0033                         no-map;
0034                         reg = <0x9f000000 0x01000000>; /* 16M */
0035                 };
0036 
0037                 gfx_memory: framebuffer {
0038                         size = <0x01000000>; /* 16M */
0039                         alignment = <0x01000000>;
0040                         compatible = "shared-dma-pool";
0041                         reusable;
0042                 };
0043         };
0044 
0045         leds {
0046                 compatible = "gpio-leds";
0047 
0048                 identify {
0049                         gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
0050                 };
0051 
0052                 heartbeat {
0053                         gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
0054                 };
0055         };
0056 
0057         iio-hwmon {
0058                 compatible = "iio-hwmon";
0059                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
0060                         <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
0061                         <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
0062                         <&adc 12>, <&adc 13>, <&adc 14>;
0063         };
0064 
0065         iio-hwmon-battery {
0066                 compatible = "iio-hwmon";
0067                 io-channels = <&adc 15>;
0068         };
0069 };
0070 
0071 &fmc {
0072         status = "okay";
0073         flash@0 {
0074                 label = "bmc";
0075                 status = "okay";
0076                 m25p,fast-read;
0077 #include "openbmc-flash-layout.dtsi"
0078         };
0079 };
0080 
0081 &spi1 {
0082         status = "okay";
0083         pinctrl-names = "default";
0084         pinctrl-0 = <&pinctrl_spi1_default>;
0085 
0086         flash@0 {
0087                 status = "okay";
0088                 label = "pnor";
0089                 m25p,fast-read;
0090         };
0091 };
0092 
0093 &uart1 {
0094         /* Rear RS-232 connector */
0095         status = "okay";
0096         pinctrl-names = "default";
0097         pinctrl-0 = <&pinctrl_txd1_default
0098                         &pinctrl_rxd1_default>;
0099 };
0100 
0101 &uart2 {
0102         /* RS-232 connector on header */
0103         status = "okay";
0104         pinctrl-names = "default";
0105         pinctrl-0 = <&pinctrl_txd2_default
0106                         &pinctrl_rxd2_default>;
0107 };
0108 
0109 &uart3 {
0110         /* Alternative to vuart to internally connect (route) to uart1
0111          * when vuart cannot be used due to BIOS limitations.
0112          */
0113         status = "okay";
0114 };
0115 
0116 &uart4 {
0117         /* Alternative to vuart to internally connect (route) to the
0118          * external port usually used by uart1 when vuart cannot be
0119          * used due to BIOS limitations.
0120          */
0121         status = "okay";
0122 };
0123 
0124 &uart5 {
0125         /* BMC "debug" (console) UART; connected to RS-232 connector
0126          * on header; selectable via jumpers as alternative to uart2
0127          */
0128         status = "okay";
0129 };
0130 
0131 &uart_routing {
0132         status = "okay";
0133 };
0134 
0135 &vuart {
0136         status = "okay";
0137 
0138         /* We enable the VUART here, but leave it in a state that does
0139          * not interfere with the SuperIO. The goal is to have both the
0140          * VUART and the SuperIO available and decide at runtime whether
0141          * the VUART should actually be used. For that reason, configure
0142          * an "invalid" IO address and an IRQ that is not used by the
0143          * BMC.
0144          */
0145 
0146         aspeed,lpc-io-reg = <0xffff>;
0147         aspeed,lpc-interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
0148 };
0149 
0150 &lpc_ctrl {
0151         status = "okay";
0152 };
0153 
0154 &p2a {
0155         status = "okay";
0156         memory-region = <&p2a_memory>;
0157 };
0158 
0159 &lpc_snoop {
0160         status = "okay";
0161         snoop-ports = <0x80>;
0162 };
0163 
0164 &adc {
0165         status = "okay";
0166 };
0167 
0168 &vhub {
0169         status = "okay";
0170 };
0171 
0172 &pwm_tacho {
0173         status = "okay";
0174         pinctrl-names = "default";
0175         pinctrl-0 = <&pinctrl_pwm0_default
0176                         &pinctrl_pwm1_default
0177                         &pinctrl_pwm3_default
0178                         &pinctrl_pwm4_default>;
0179 
0180         /* CPU fan #0 */
0181         fan@0 {
0182                 reg = <0x00>;
0183                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
0184         };
0185 
0186         /* CPU fan #1 */
0187         fan@1 {
0188                 reg = <0x01>;
0189                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
0190         };
0191 
0192         /* PWM group for chassis fans #1, #2, #3 and #4  */
0193         fan@2 {
0194                 reg = <0x03>;
0195                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
0196         };
0197 
0198         fan@3 {
0199                 reg = <0x03>;
0200                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
0201         };
0202 
0203         fan@4 {
0204                 reg = <0x03>;
0205                 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
0206         };
0207 
0208         fan@5 {
0209                 reg = <0x03>;
0210                 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
0211         };
0212 
0213         /* PWM group for chassis fans #5 and #6  */
0214         fan@6 {
0215                 reg = <0x04>;
0216                 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
0217         };
0218 
0219         fan@7 {
0220                 reg = <0x04>;
0221                 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
0222         };
0223 };
0224 
0225 &i2c0 {
0226         status = "okay";
0227 
0228         /* Hardware monitor with temperature sensors */
0229         nct7802@28 {
0230                 compatible = "nuvoton,nct7802";
0231                 reg = <0x28>;
0232 
0233                 #address-cells = <1>;
0234                 #size-cells = <0>;
0235 
0236                 channel@0 { /* LTD */
0237                         reg = <0>;
0238                 };
0239 
0240                 channel@1 { /* RTD1 */
0241                         reg = <1>;
0242                         sensor-type = "temperature";
0243                         temperature-mode = "thermistor";
0244                 };
0245 
0246                 channel@2 { /* RTD2 */
0247                         reg = <2>;
0248                         sensor-type = "temperature";
0249                         temperature-mode = "thermistor";
0250                 };
0251 
0252                 channel@3 { /* RTD3 */
0253                         reg = <3>;
0254                         sensor-type = "temperature";
0255                 };
0256         };
0257 
0258         /* Also connected to:
0259          * - IPMB pin header
0260          * - CPU #0 memory error LED @ 0x3A
0261          * - CPU #1 memory error LED @ 0x3C
0262          */
0263 };
0264 
0265 &i2c1 {
0266         /* Directly connected to PCH SMBUS #0 */
0267         status = "okay";
0268 };
0269 
0270 &i2c2 {
0271         status = "okay";
0272 
0273         /* BMC EEPROM, incl. mainboard FRU */
0274         eeprom@50 {
0275                 compatible = "atmel,24c256";
0276                 reg = <0x50>;
0277         };
0278 
0279         /* Also connected to:
0280          * - fan header
0281          * - mini-SAS HD connector
0282          * - SSATA SGPIO
0283          * - via switch (BMC_SMB3_PCH_IE_SML3_EN, active low)
0284          *   to PCH SMBUS #3
0285          */
0286 };
0287 
0288 &i2c3 {
0289         status = "okay";
0290 
0291         /* PSU1 FRU @ 0xA0 */
0292         eeprom@50 {
0293                 compatible = "atmel,24c02";
0294                 reg = <0x50>;
0295         };
0296 
0297         /* PSU2 FRU @ 0xA2 */
0298         eeprom@51 {
0299                 compatible = "atmel,24c02";
0300                 reg = <0x51>;
0301         };
0302 
0303         /* PSU1 @ 0xB0 */
0304         power-supply@58 {
0305                 compatible = "pmbus";
0306                 reg = <0x58>;
0307         };
0308 
0309         /* PSU2 @ 0xB2 */
0310         power-supply@59 {
0311                 compatible = "pmbus";
0312                 reg = <0x59>;
0313         };
0314 
0315         /* Also connected to:
0316          * - PCH SMBUS #1
0317          */
0318 };
0319 
0320 &i2c4 {
0321         status = "okay";
0322 
0323         /* Connected to:
0324          * - PCH SMBUS #2
0325          */
0326 
0327         /* Connected via switch to:
0328          * - CPU #0 channels ABC VDDQ @ 0x80
0329          * - CPU #0 channels DEF VDDQ @ 0x81
0330          * - CPU #1 channels ABC VDDQ @ 0x82
0331          * - CPU #1 channels DEF VDDQ @ 0x83
0332          * - CPU #0 VCCIO & VMCP @ 0x52
0333          * - CPU #1 VCCIO & VMCP @ 0x53
0334          * - CPU #0 VCCIN @ 0xC0
0335          * - CPU #0 VSA @ 0xC2
0336          * - CPU #1 VCCIN @ 0xC4
0337          * - CPU #1 VSA @ 0xC6
0338          * - J110
0339          */
0340 };
0341 
0342 &i2c5 {
0343         status = "okay";
0344 
0345         /* Connected via switch (PCH_BMC_SMB_SW_P) to:
0346          * - mainboard FRU @ 0xAE
0347          * - XDP connector
0348          * - ME debug header
0349          * - clock buffer @ 0xD8
0350          * - i2c4 via switch (PCH_VR_SMBUS_SW_P; controlled by PCH)
0351          * - PCH SMBUS
0352          */
0353 };
0354 
0355 &i2c6 {
0356         status = "okay";
0357 
0358         /* Connected via switch (BMC_PE_SMB_EN_1_N) to
0359          * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to:
0360          * - 0,0: PCIE slot 1, SMB #1
0361          * - 0,1: PCIE slot 1, SMB #2
0362          * - 1,0: PCIE slot 2, SMB #1
0363          * - 1,1: PCIE slot 2, SMB #2
0364          */
0365 
0366         /* Connected via switch (BMC_PE_SMB_EN_2_N) to
0367          * bus mux (selector BMC_PE_SMB_SW_BIT[1..0]) to:
0368          * - 0,0: OCP0 (A) SMB
0369          * - 0,1: OCP0 (C) SMB
0370          * - 1,0: OCP1 (A) SMB
0371          * - 1,1: NC
0372          */
0373 };
0374 
0375 &i2c7 {
0376         status = "okay";
0377 
0378         /* Connected to:
0379          * - PCH SMBUS #4
0380          */
0381 };
0382 
0383 &i2c8 {
0384         status = "okay";
0385 
0386         /* Not connected */
0387 };
0388 
0389 &mac0 {
0390         status = "okay";
0391         use-ncsi;
0392         pinctrl-names = "default";
0393         pinctrl-0 = <&pinctrl_rmii1_default>;
0394 };
0395 
0396 &mac1 {
0397         status = "okay";
0398         pinctrl-names = "default";
0399         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
0400 };
0401 
0402 &ibt {
0403         status = "okay";
0404 };
0405 
0406 &kcs1 {
0407         status = "okay";
0408         aspeed,lpc-io-reg = <0xca8>;
0409 };
0410 
0411 &kcs3 {
0412         status = "okay";
0413         aspeed,lpc-io-reg = <0xca2>;
0414 };
0415 
0416 /* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
0417 &gfx {
0418         status = "okay";
0419         memory-region = <&gfx_memory>;
0420 };
0421 
0422 /* We're following the GPIO naming as defined at
0423  * https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md.
0424  *
0425  * Notes on led-identify and id-button:
0426  * - A physical button is connected to id-button which
0427  *   triggers the clock on a D flip-flop. The /Q output of the
0428  *   flip-flop drives its D input.
0429  * - The flip-flop's Q output drives led-identify which is
0430  *   connected to LEDs.
0431  * - With that, every button press toggles the LED between on and off.
0432  *
0433  * Notes on power-, reset- and nmi- button and control:
0434  * - The -button signals can be used to monitor physical buttons.
0435  * - The -control signals can be used to actuate the specific
0436  *   operation.
0437  * - In hardware, the -button signals are connected to the -control
0438  *   signals through drivers with the -control signals being
0439  *   protected through diodes.
0440  */
0441 &gpio {
0442         status = "okay";
0443         gpio-line-names =
0444         /*A0*/          "",
0445         /*A1*/          "",
0446         /*A2*/          "led-identify", /* in/out: BMC_IDLED_ON_N */
0447         /*A3*/          "",
0448         /*A4*/          "",
0449         /*A5*/          "",
0450         /*A6*/          "",
0451         /*A7*/          "",
0452         /*B0-B7*/       "","","","","","","","",
0453         /*C0*/          "",
0454         /*C1*/          "",
0455         /*C2*/          "",
0456         /*C3*/          "",
0457         /*C4*/          "id-button", /* in/out: BMC_IDBTN_IN_OUT_N */
0458         /*C5*/          "post-complete", /* in: FM_BIOS_POST_CMPLT_N */
0459         /*C6*/          "",
0460         /*C7*/          "",
0461         /*D0*/          "",
0462         /*D1*/          "",
0463         /*D2*/          "power-chassis-good", /* in: SYS_PWROK_BUF */
0464         /*D3*/          "platform-reset", /* in: SYS_PLTRST_N */
0465         /*D4*/          "",
0466         /*D5*/          "",
0467         /*D6*/          "",
0468         /*D7*/          "",
0469         /*E0*/          "power-button", /* in: BMC_PWBTN_IN_N */
0470         /*E1*/          "power-chassis-control", /* out: BMC_PWRBTN_OUT_N */
0471         /*E2*/          "reset-button", /* in: BMC_RSTBTN_IN_N */
0472         /*E3*/          "reset-control", /* out: BMC_RSTBTN_OUT_N */
0473         /*E4*/          "nmi-button", /* in: BMC_NMIBTN_IN_N */
0474         /*E5*/          "nmi-control", /* out: BMC_NMIBTN_OUT_N */
0475         /*E6*/          "",
0476         /*E7*/          "led-heartbeat", /* out: BMC_HEARTBRAT_LED_N */
0477         /*F0*/          "",
0478         /*F1*/          "clear-cmos-control", /* out: BMC_CLR_CMOS_N */
0479         /*F2*/          "",
0480         /*F3*/          "",
0481         /*F4*/          "led-fault", /* out: AST_HW_FAULT_N */
0482         /*F5*/          "",
0483         /*F6*/          "",
0484         /*F7*/          "",
0485         /*G0*/          "BMC_PE_SMB_EN_1_N", /* out */
0486         /*G1*/          "BMC_PE_SMB_EN_2_N", /* out */
0487         /*G2*/          "",
0488         /*G3*/          "",
0489         /*G4*/          "",
0490         /*G5*/          "",
0491         /*G6*/          "",
0492         /*G7*/          "",
0493         /*H0-H7*/       "","","","","","","","",
0494         /*I0-I7*/       "","","","","","","","",
0495         /*J0-J7*/       "","","","","","","","",
0496         /*K0-K7*/       "","","","","","","","",
0497         /*L0-L7*/       "","","","","","","","",
0498         /*M0-M7*/       "","","","","","","","",
0499         /*N0-N7*/       "","","","","","","","",
0500         /*O0-O7*/       "","","","","","","","",
0501         /*P0-P7*/       "","","","","","","","",
0502         /*Q0*/          "",
0503         /*Q1*/          "",
0504         /*Q2*/          "",
0505         /*Q3*/          "",
0506         /*Q4*/          "BMC_PE_SMB_SW_BIT0", /* out */
0507         /*Q5*/          "BMC_PE_SMB_SW_BIT1", /* out */
0508         /*Q6*/          "",
0509         /*Q7*/          "",
0510         /*R0-R7*/       "","","","","","","","",
0511         /*S0-S7*/       "","","","","","","","",
0512         /*T0-T7*/       "","","","","","","","",
0513         /*U0-U7*/       "","","","","","","","",
0514         /*V0-V7*/       "","","","","","","","",
0515         /*W0-W7*/       "","","","","","","","",
0516         /*X0-X7*/       "","","","","","","","",
0517         /*Y0-Y7*/       "","","","","","","","",
0518         /*Z0-Z7*/       "","","","","","","","",
0519         /*AA0*/         "",
0520         /*AA1*/         "",
0521         /*AA2*/         "",
0522         /*AA3*/         "BMC_SMB3_PCH_IE_SML3_EN", /* out */
0523         /*AA4*/         "",
0524         /*AA5*/         "",
0525         /*AA6*/         "",
0526         /*AA7*/         "",
0527         /*AB0-AB7*/     "","","","","","","","";
0528 };