0001 // SPDX-License-Identifier: GPL-2.0+
0002 // Copyright (c) 2019 Facebook Inc.
0003 /dts-v1/;
0004
0005 #include <dt-bindings/gpio/aspeed-gpio.h>
0006 #include "ast2500-facebook-netbmc-common.dtsi"
0007
0008 / {
0009 model = "Facebook Wedge 400 BMC";
0010 compatible = "facebook,wedge400-bmc", "aspeed,ast2500";
0011
0012 aliases {
0013 /*
0014 * PCA9548 (2-0070) provides 8 channels connecting to
0015 * SCM (System Controller Module).
0016 */
0017 i2c16 = &imux16;
0018 i2c17 = &imux17;
0019 i2c18 = &imux18;
0020 i2c19 = &imux19;
0021 i2c20 = &imux20;
0022 i2c21 = &imux21;
0023 i2c22 = &imux22;
0024 i2c23 = &imux23;
0025
0026 /*
0027 * PCA9548 (8-0070) provides 8 channels connecting to
0028 * SMB (Switch Main Board).
0029 */
0030 i2c24 = &imux24;
0031 i2c25 = &imux25;
0032 i2c26 = &imux26;
0033 i2c27 = &imux27;
0034 i2c28 = &imux28;
0035 i2c29 = &imux29;
0036 i2c30 = &imux30;
0037 i2c31 = &imux31;
0038
0039 /*
0040 * PCA9548 (11-0076) provides 8 channels connecting to
0041 * FCM (Fan Controller Module).
0042 */
0043 i2c32 = &imux32;
0044 i2c33 = &imux33;
0045 i2c34 = &imux34;
0046 i2c35 = &imux35;
0047 i2c36 = &imux36;
0048 i2c37 = &imux37;
0049 i2c38 = &imux38;
0050 i2c39 = &imux39;
0051
0052 spi2 = &spi_gpio;
0053 };
0054
0055 chosen {
0056 stdout-path = &uart1;
0057 bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
0058 };
0059
0060 ast-adc-hwmon {
0061 compatible = "iio-hwmon";
0062 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
0063 };
0064
0065 /*
0066 * GPIO-based SPI Master is required to access SPI TPM, because
0067 * full-duplex SPI transactions are not supported by ASPEED SPI
0068 * Controllers.
0069 */
0070 spi_gpio: spi-gpio {
0071 status = "okay";
0072 compatible = "spi-gpio";
0073 #address-cells = <1>;
0074 #size-cells = <0>;
0075
0076 cs-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_LOW>;
0077 gpio-sck = <&gpio ASPEED_GPIO(R, 3) GPIO_ACTIVE_HIGH>;
0078 gpio-mosi = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_HIGH>;
0079 gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>;
0080 num-chipselects = <1>;
0081
0082 tpmdev@0 {
0083 compatible = "tcg,tpm_tis-spi";
0084 spi-max-frequency = <33000000>;
0085 reg = <0>;
0086 };
0087 };
0088 };
0089
0090 /*
0091 * Both firmware flashes are 128MB on Wedge400 BMC.
0092 */
0093 &fmc_flash0 {
0094 #include "facebook-bmc-flash-layout-128.dtsi"
0095 };
0096
0097 &fmc_flash1 {
0098 partitions {
0099 compatible = "fixed-partitions";
0100 #address-cells = <1>;
0101 #size-cells = <1>;
0102
0103 flash1@0 {
0104 reg = <0x0 0x8000000>;
0105 label = "flash1";
0106 };
0107 };
0108 };
0109
0110 &uart2 {
0111 status = "okay";
0112 pinctrl-names = "default";
0113 pinctrl-0 = <&pinctrl_txd2_default
0114 &pinctrl_rxd2_default>;
0115 };
0116
0117 &uart4 {
0118 status = "okay";
0119 pinctrl-names = "default";
0120 pinctrl-0 = <&pinctrl_txd4_default
0121 &pinctrl_rxd4_default>;
0122 };
0123
0124 /*
0125 * I2C bus #0 is multi-master environment dedicated for BMC and Bridge IC
0126 * communication.
0127 */
0128 &i2c0 {
0129 status = "okay";
0130 multi-master;
0131 bus-frequency = <1000000>;
0132 };
0133
0134 &i2c1 {
0135 status = "okay";
0136 };
0137
0138 &i2c2 {
0139 status = "okay";
0140
0141 i2c-switch@70 {
0142 compatible = "nxp,pca9548";
0143 #address-cells = <1>;
0144 #size-cells = <0>;
0145 reg = <0x70>;
0146 i2c-mux-idle-disconnect;
0147
0148 imux16: i2c@0 {
0149 #address-cells = <1>;
0150 #size-cells = <0>;
0151 reg = <0>;
0152 };
0153
0154 imux17: i2c@1 {
0155 #address-cells = <1>;
0156 #size-cells = <0>;
0157 reg = <1>;
0158 };
0159
0160 imux18: i2c@2 {
0161 #address-cells = <1>;
0162 #size-cells = <0>;
0163 reg = <2>;
0164 };
0165
0166 imux19: i2c@3 {
0167 #address-cells = <1>;
0168 #size-cells = <0>;
0169 reg = <3>;
0170 };
0171
0172 imux20: i2c@4 {
0173 #address-cells = <1>;
0174 #size-cells = <0>;
0175 reg = <4>;
0176 };
0177
0178 imux21: i2c@5 {
0179 #address-cells = <1>;
0180 #size-cells = <0>;
0181 reg = <5>;
0182 };
0183
0184 imux22: i2c@6 {
0185 #address-cells = <1>;
0186 #size-cells = <0>;
0187 reg = <6>;
0188 };
0189
0190 imux23: i2c@7 {
0191 #address-cells = <1>;
0192 #size-cells = <0>;
0193 reg = <7>;
0194 };
0195 };
0196 };
0197
0198 &i2c3 {
0199 status = "okay";
0200 };
0201
0202 &i2c4 {
0203 status = "okay";
0204 };
0205
0206 &i2c5 {
0207 status = "okay";
0208 };
0209
0210 &i2c6 {
0211 status = "okay";
0212 };
0213
0214 &i2c7 {
0215 status = "okay";
0216 };
0217
0218 &i2c8 {
0219 status = "okay";
0220
0221 i2c-switch@70 {
0222 compatible = "nxp,pca9548";
0223 #address-cells = <1>;
0224 #size-cells = <0>;
0225 reg = <0x70>;
0226 i2c-mux-idle-disconnect;
0227
0228 imux24: i2c@0 {
0229 #address-cells = <1>;
0230 #size-cells = <0>;
0231 reg = <0>;
0232 };
0233
0234 imux25: i2c@1 {
0235 #address-cells = <1>;
0236 #size-cells = <0>;
0237 reg = <1>;
0238 };
0239
0240 imux26: i2c@2 {
0241 #address-cells = <1>;
0242 #size-cells = <0>;
0243 reg = <2>;
0244 };
0245
0246 imux27: i2c@3 {
0247 #address-cells = <1>;
0248 #size-cells = <0>;
0249 reg = <3>;
0250 };
0251
0252 imux28: i2c@4 {
0253 #address-cells = <1>;
0254 #size-cells = <0>;
0255 reg = <4>;
0256 };
0257
0258 imux29: i2c@5 {
0259 #address-cells = <1>;
0260 #size-cells = <0>;
0261 reg = <5>;
0262 };
0263
0264 imux30: i2c@6 {
0265 #address-cells = <1>;
0266 #size-cells = <0>;
0267 reg = <6>;
0268 };
0269
0270 imux31: i2c@7 {
0271 #address-cells = <1>;
0272 #size-cells = <0>;
0273 reg = <7>;
0274 };
0275
0276 };
0277 };
0278
0279 &i2c9 {
0280 status = "okay";
0281 };
0282
0283 &i2c10 {
0284 status = "okay";
0285 };
0286
0287 &i2c11 {
0288 status = "okay";
0289
0290 i2c-switch@76 {
0291 compatible = "nxp,pca9548";
0292 #address-cells = <1>;
0293 #size-cells = <0>;
0294 reg = <0x76>;
0295 i2c-mux-idle-disconnect;
0296
0297 imux32: i2c@0 {
0298 #address-cells = <1>;
0299 #size-cells = <0>;
0300 reg = <0>;
0301 };
0302
0303 imux33: i2c@1 {
0304 #address-cells = <1>;
0305 #size-cells = <0>;
0306 reg = <1>;
0307 };
0308
0309 imux34: i2c@2 {
0310 #address-cells = <1>;
0311 #size-cells = <0>;
0312 reg = <2>;
0313 };
0314
0315 imux35: i2c@3 {
0316 #address-cells = <1>;
0317 #size-cells = <0>;
0318 reg = <3>;
0319 };
0320
0321 imux36: i2c@4 {
0322 #address-cells = <1>;
0323 #size-cells = <0>;
0324 reg = <4>;
0325 };
0326
0327 imux37: i2c@5 {
0328 #address-cells = <1>;
0329 #size-cells = <0>;
0330 reg = <5>;
0331 };
0332
0333 imux38: i2c@6 {
0334 #address-cells = <1>;
0335 #size-cells = <0>;
0336 reg = <6>;
0337 };
0338
0339 imux39: i2c@7 {
0340 #address-cells = <1>;
0341 #size-cells = <0>;
0342 reg = <7>;
0343 };
0344
0345 };
0346 };
0347
0348 &i2c12 {
0349 status = "okay";
0350 };
0351
0352 &i2c13 {
0353 status = "okay";
0354 };
0355
0356 &adc {
0357 status = "okay";
0358 };
0359
0360 &ehci1 {
0361 status = "okay";
0362 };
0363
0364 &uhci {
0365 status = "okay";
0366 };
0367
0368 &sdhci1 {
0369 /*
0370 * DMA mode needs to be disabled to avoid conflicts with UHCI
0371 * Controller in AST2500 SoC.
0372 */
0373 sdhci-caps-mask = <0x0 0x580000>;
0374 };
