0001 // SPDX-License-Identifier: GPL-2.0+
0002 /dts-v1/;
0003 #include "aspeed-g5.dtsi"
0004 #include <dt-bindings/gpio/aspeed-gpio.h>
0005
0006 / {
0007 model = "Ampere Mt. Jade BMC";
0008 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
0009
0010 aliases {
0011 /*
0012 * i2c bus 50-57 assigned to NVMe slot 0-7
0013 */
0014 i2c50 = &nvmeslot_0;
0015 i2c51 = &nvmeslot_1;
0016 i2c52 = &nvmeslot_2;
0017 i2c53 = &nvmeslot_3;
0018 i2c54 = &nvmeslot_4;
0019 i2c55 = &nvmeslot_5;
0020 i2c56 = &nvmeslot_6;
0021 i2c57 = &nvmeslot_7;
0022
0023 /*
0024 * i2c bus 60-67 assigned to NVMe slot 8-15
0025 */
0026 i2c60 = &nvmeslot_8;
0027 i2c61 = &nvmeslot_9;
0028 i2c62 = &nvmeslot_10;
0029 i2c63 = &nvmeslot_11;
0030 i2c64 = &nvmeslot_12;
0031 i2c65 = &nvmeslot_13;
0032 i2c66 = &nvmeslot_14;
0033 i2c67 = &nvmeslot_15;
0034
0035 /*
0036 * i2c bus 70-77 assigned to NVMe slot 16-23
0037 */
0038 i2c70 = &nvmeslot_16;
0039 i2c71 = &nvmeslot_17;
0040 i2c72 = &nvmeslot_18;
0041 i2c73 = &nvmeslot_19;
0042 i2c74 = &nvmeslot_20;
0043 i2c75 = &nvmeslot_21;
0044 i2c76 = &nvmeslot_22;
0045 i2c77 = &nvmeslot_23;
0046
0047 /*
0048 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
0049 */
0050 i2c80 = &nvme_m2_0;
0051 i2c81 = &nvme_m2_1;
0052 };
0053
0054 chosen {
0055 stdout-path = &uart5;
0056 bootargs = "console=ttyS4,115200 earlycon";
0057 };
0058
0059 memory@80000000 {
0060 reg = <0x80000000 0x20000000>;
0061 };
0062
0063 reserved-memory {
0064 #address-cells = <1>;
0065 #size-cells = <1>;
0066 ranges;
0067
0068 vga_memory: framebuffer@9f000000 {
0069 no-map;
0070 reg = <0x9f000000 0x01000000>; /* 16M */
0071 };
0072
0073 gfx_memory: framebuffer {
0074 size = <0x01000000>;
0075 alignment = <0x01000000>;
0076 compatible = "shared-dma-pool";
0077 reusable;
0078 };
0079
0080 video_engine_memory: jpegbuffer {
0081 size = <0x02000000>; /* 32M */
0082 alignment = <0x01000000>;
0083 compatible = "shared-dma-pool";
0084 reusable;
0085 };
0086 };
0087
0088 leds {
0089 compatible = "gpio-leds";
0090
0091 fault {
0092 gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
0093 };
0094
0095 identify {
0096 gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
0097 };
0098 };
0099
0100 gpio-keys {
0101 compatible = "gpio-keys";
0102
0103 event-shutdown-ack {
0104 label = "SHUTDOWN_ACK";
0105 gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
0106 linux,code = <ASPEED_GPIO(G, 2)>;
0107 };
0108
0109 event-reboot-ack {
0110 label = "REBOOT_ACK";
0111 gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
0112 linux,code = <ASPEED_GPIO(J, 3)>;
0113 };
0114
0115 event-s0-overtemp {
0116 label = "S0_OVERTEMP";
0117 gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
0118 linux,code = <ASPEED_GPIO(G, 3)>;
0119 };
0120
0121 event-s0-hightemp {
0122 label = "S0_HIGHTEMP";
0123 gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
0124 linux,code = <ASPEED_GPIO(J, 0)>;
0125 };
0126
0127 event-s0-cpu-fault {
0128 label = "S0_CPU_FAULT";
0129 gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
0130 linux,code = <ASPEED_GPIO(J, 1)>;
0131 };
0132
0133 event-s0-scp-auth-fail {
0134 label = "S0_SCP_AUTH_FAIL";
0135 gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
0136 linux,code = <ASPEED_GPIO(J, 2)>;
0137 };
0138
0139 event-s1-scp-auth-fail {
0140 label = "S1_SCP_AUTH_FAIL";
0141 gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
0142 linux,code = <ASPEED_GPIO(Z, 5)>;
0143 };
0144
0145 event-s1-overtemp {
0146 label = "S1_OVERTEMP";
0147 gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
0148 linux,code = <ASPEED_GPIO(Z, 6)>;
0149 };
0150
0151 event-s1-hightemp {
0152 label = "S1_HIGHTEMP";
0153 gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
0154 linux,code = <ASPEED_GPIO(AB, 0)>;
0155 };
0156
0157 event-s1-cpu-fault {
0158 label = "S1_CPU_FAULT";
0159 gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
0160 linux,code = <ASPEED_GPIO(Z, 1)>;
0161 };
0162
0163 event-id {
0164 label = "ID_BUTTON";
0165 gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
0166 linux,code = <ASPEED_GPIO(Q, 5)>;
0167 };
0168
0169 event-psu1-vin-good {
0170 label = "PSU1_VIN_GOOD";
0171 gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
0172 linux,code = <ASPEED_GPIO(H, 4)>;
0173 };
0174
0175 event-psu2-vin-good {
0176 label = "PSU2_VIN_GOOD";
0177 gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;
0178 linux,code = <ASPEED_GPIO(H, 5)>;
0179 };
0180
0181 event-psu1-present {
0182 label = "PSU1_PRESENT";
0183 gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
0184 linux,code = <ASPEED_GPIO(I, 0)>;
0185 };
0186
0187 event-psu2-present {
0188 label = "PSU2_PRESENT";
0189 gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
0190 linux,code = <ASPEED_GPIO(I, 1)>;
0191 };
0192
0193 };
0194
0195 gpioA0mux: mux-controller {
0196 compatible = "gpio-mux";
0197 #mux-control-cells = <0>;
0198 mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
0199 };
0200
0201 adc0mux: adc0mux {
0202 compatible = "io-channel-mux";
0203 io-channels = <&adc 0>;
0204 #io-channel-cells = <1>;
0205 io-channel-names = "parent";
0206 mux-controls = <&gpioA0mux>;
0207 channels = "s0", "s1";
0208 };
0209
0210 adc1mux: adc1mux {
0211 compatible = "io-channel-mux";
0212 io-channels = <&adc 1>;
0213 #io-channel-cells = <1>;
0214 io-channel-names = "parent";
0215 mux-controls = <&gpioA0mux>;
0216 channels = "s0", "s1";
0217 };
0218
0219 adc2mux: adc2mux {
0220 compatible = "io-channel-mux";
0221 io-channels = <&adc 2>;
0222 #io-channel-cells = <1>;
0223 io-channel-names = "parent";
0224 mux-controls = <&gpioA0mux>;
0225 channels = "s0", "s1";
0226 };
0227
0228 adc3mux: adc3mux {
0229 compatible = "io-channel-mux";
0230 io-channels = <&adc 3>;
0231 #io-channel-cells = <1>;
0232 io-channel-names = "parent";
0233 mux-controls = <&gpioA0mux>;
0234 channels = "s0", "s1";
0235 };
0236
0237 adc4mux: adc4mux {
0238 compatible = "io-channel-mux";
0239 io-channels = <&adc 4>;
0240 #io-channel-cells = <1>;
0241 io-channel-names = "parent";
0242 mux-controls = <&gpioA0mux>;
0243 channels = "s0", "s1";
0244 };
0245
0246 adc5mux: adc5mux {
0247 compatible = "io-channel-mux";
0248 io-channels = <&adc 5>;
0249 #io-channel-cells = <1>;
0250 io-channel-names = "parent";
0251 mux-controls = <&gpioA0mux>;
0252 channels = "s0", "s1";
0253 };
0254
0255 adc6mux: adc6mux {
0256 compatible = "io-channel-mux";
0257 io-channels = <&adc 6>;
0258 #io-channel-cells = <1>;
0259 io-channel-names = "parent";
0260 mux-controls = <&gpioA0mux>;
0261 channels = "s0", "s1";
0262 };
0263
0264 adc7mux: adc7mux {
0265 compatible = "io-channel-mux";
0266 io-channels = <&adc 7>;
0267 #io-channel-cells = <1>;
0268 io-channel-names = "parent";
0269 mux-controls = <&gpioA0mux>;
0270 channels = "s0", "s1";
0271 };
0272
0273 adc8mux: adc8mux {
0274 compatible = "io-channel-mux";
0275 io-channels = <&adc 8>;
0276 #io-channel-cells = <1>;
0277 io-channel-names = "parent";
0278 mux-controls = <&gpioA0mux>;
0279 channels = "s0", "s1";
0280 };
0281
0282 adc9mux: adc9mux {
0283 compatible = "io-channel-mux";
0284 io-channels = <&adc 9>;
0285 #io-channel-cells = <1>;
0286 io-channel-names = "parent";
0287 mux-controls = <&gpioA0mux>;
0288 channels = "s0", "s1";
0289 };
0290
0291 adc10mux: adc10mux {
0292 compatible = "io-channel-mux";
0293 io-channels = <&adc 10>;
0294 #io-channel-cells = <1>;
0295 io-channel-names = "parent";
0296 mux-controls = <&gpioA0mux>;
0297 channels = "s0", "s1";
0298 };
0299
0300 adc11mux: adc11mux {
0301 compatible = "io-channel-mux";
0302 io-channels = <&adc 11>;
0303 #io-channel-cells = <1>;
0304 io-channel-names = "parent";
0305 mux-controls = <&gpioA0mux>;
0306 channels = "s0", "s1";
0307 };
0308
0309 adc12mux: adc12mux {
0310 compatible = "io-channel-mux";
0311 io-channels = <&adc 12>;
0312 #io-channel-cells = <1>;
0313 io-channel-names = "parent";
0314 mux-controls = <&gpioA0mux>;
0315 channels = "s0", "s1";
0316 };
0317
0318 adc13mux: adc13mux {
0319 compatible = "io-channel-mux";
0320 io-channels = <&adc 13>;
0321 #io-channel-cells = <1>;
0322 io-channel-names = "parent";
0323 mux-controls = <&gpioA0mux>;
0324 channels = "s0", "s1";
0325 };
0326
0327 iio-hwmon {
0328 compatible = "iio-hwmon";
0329 io-channels = <&adc0mux 0>, <&adc0mux 1>,
0330 <&adc1mux 0>, <&adc1mux 1>,
0331 <&adc2mux 0>, <&adc2mux 1>,
0332 <&adc3mux 0>, <&adc3mux 1>,
0333 <&adc4mux 0>, <&adc4mux 1>,
0334 <&adc5mux 0>, <&adc5mux 1>,
0335 <&adc6mux 0>, <&adc6mux 1>,
0336 <&adc7mux 0>, <&adc7mux 1>,
0337 <&adc8mux 0>, <&adc8mux 1>,
0338 <&adc9mux 0>, <&adc9mux 1>,
0339 <&adc10mux 0>, <&adc10mux 1>,
0340 <&adc11mux 0>, <&adc11mux 1>,
0341 <&adc12mux 0>, <&adc12mux 1>,
0342 <&adc13mux 0>, <&adc13mux 1>,
0343 <&adc 14>, <&adc 15>;
0344 };
0345 };
0346
0347 &fmc {
0348 status = "okay";
0349 flash@0 {
0350 status = "okay";
0351 m25p,fast-read;
0352 label = "bmc";
0353 /* spi-max-frequency = <50000000>; */
0354 #include "openbmc-flash-layout-64.dtsi"
0355 };
0356
0357 flash@1 {
0358 status = "okay";
0359 m25p,fast-read;
0360 label = "alt-bmc";
0361 #include "openbmc-flash-layout-64-alt.dtsi"
0362 };
0363 };
0364
0365 &spi1 {
0366 status = "okay";
0367 pinctrl-names = "default";
0368 pinctrl-0 = <&pinctrl_spi1_default>;
0369
0370 flash@0 {
0371 status = "okay";
0372 m25p,fast-read;
0373 label = "pnor";
0374 /* spi-max-frequency = <100000000>; */
0375 partitions {
0376 compatible = "fixed-partitions";
0377 #address-cells = <1>;
0378 #size-cells = <1>;
0379 uefi@400000 {
0380 reg = <0x400000 0x1C00000>;
0381 label = "pnor-uefi";
0382 };
0383 };
0384 };
0385 };
0386
0387 &uart1 {
0388 status = "okay";
0389 pinctrl-names = "default";
0390 pinctrl-0 = <&pinctrl_txd1_default
0391 &pinctrl_rxd1_default
0392 &pinctrl_ncts1_default
0393 &pinctrl_nrts1_default>;
0394 };
0395
0396 &uart2 {
0397 status = "okay";
0398 pinctrl-names = "default";
0399 pinctrl-0 = <&pinctrl_txd2_default
0400 &pinctrl_rxd2_default>;
0401 };
0402
0403 &uart3 {
0404 status = "okay";
0405 pinctrl-names = "default";
0406 pinctrl-0 = <&pinctrl_txd3_default
0407 &pinctrl_rxd3_default>;
0408 };
0409
0410 &uart4 {
0411 status = "okay";
0412 pinctrl-names = "default";
0413 pinctrl-0 = <&pinctrl_txd4_default
0414 &pinctrl_rxd4_default>;
0415 };
0416
0417 /* The BMC's uart */
0418 &uart5 {
0419 status = "okay";
0420 };
0421
0422 &mac0 {
0423 status = "okay";
0424 pinctrl-names = "default";
0425 pinctrl-0 = <&pinctrl_rmii1_default>;
0426 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
0427 <&syscon ASPEED_CLK_MAC1RCLK>;
0428 clock-names = "MACCLK", "RCLK";
0429 use-ncsi;
0430 };
0431
0432 &mac1 {
0433 status = "okay";
0434 pinctrl-names = "default";
0435 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
0436 };
0437
0438 &i2c0 {
0439 status = "okay";
0440 };
0441
0442 &i2c1 {
0443 status = "okay";
0444 };
0445
0446 &i2c2 {
0447 status = "okay";
0448 };
0449
0450 &i2c3 {
0451 status = "okay";
0452 eeprom@50 {
0453 compatible = "microchip,24c64", "atmel,24c64";
0454 reg = <0x50>;
0455 pagesize = <32>;
0456 };
0457
0458 inlet_mem2: tmp175@28 {
0459 compatible = "ti,tmp175";
0460 reg = <0x28>;
0461 };
0462
0463 inlet_cpu: tmp175@29 {
0464 compatible = "ti,tmp175";
0465 reg = <0x29>;
0466 };
0467
0468 inlet_mem1: tmp175@2a {
0469 compatible = "ti,tmp175";
0470 reg = <0x2a>;
0471 };
0472
0473 outlet_cpu: tmp175@2b {
0474 compatible = "ti,tmp175";
0475 reg = <0x2b>;
0476 };
0477
0478 outlet1: tmp175@2c {
0479 compatible = "ti,tmp175";
0480 reg = <0x2c>;
0481 };
0482
0483 outlet2: tmp175@2d {
0484 compatible = "ti,tmp175";
0485 reg = <0x2d>;
0486 };
0487 };
0488
0489 &i2c4 {
0490 status = "okay";
0491 rtc@51 {
0492 compatible = "nxp,pcf85063a";
0493 reg = <0x51>;
0494 };
0495 };
0496
0497 &i2c5 {
0498 status = "okay";
0499 i2c-mux@70 {
0500 compatible = "nxp,pca9548";
0501 #address-cells = <1>;
0502 #size-cells = <0>;
0503 reg = <0x70>;
0504 i2c-mux-idle-disconnect;
0505
0506 nvmeslot_0_7: i2c@3 {
0507 #address-cells = <1>;
0508 #size-cells = <0>;
0509 reg = <0x3>;
0510 };
0511 };
0512
0513 i2c-mux@71 {
0514 compatible = "nxp,pca9548";
0515 #address-cells = <1>;
0516 #size-cells = <0>;
0517 reg = <0x71>;
0518 i2c-mux-idle-disconnect;
0519
0520 nvmeslot_8_15: i2c@4 {
0521 #address-cells = <1>;
0522 #size-cells = <0>;
0523 reg = <0x4>;
0524 };
0525
0526 nvmeslot_16_23: i2c@3 {
0527 #address-cells = <1>;
0528 #size-cells = <0>;
0529 reg = <0x3>;
0530 };
0531
0532 };
0533
0534 i2c-mux@72 {
0535 compatible = "nxp,pca9545";
0536 #address-cells = <1>;
0537 #size-cells = <0>;
0538 reg = <0x72>;
0539 i2c-mux-idle-disconnect;
0540
0541 nvme_m2_0: i2c@0 {
0542 #address-cells = <1>;
0543 #size-cells = <0>;
0544 reg = <0x0>;
0545 };
0546
0547 nvme_m2_1: i2c@1 {
0548 #address-cells = <1>;
0549 #size-cells = <0>;
0550 reg = <0x1>;
0551 };
0552 };
0553 };
0554
0555 &nvmeslot_0_7 {
0556 status = "okay";
0557
0558 i2c-mux@75 {
0559 compatible = "nxp,pca9548";
0560 #address-cells = <1>;
0561 #size-cells = <0>;
0562 reg = <0x75>;
0563 i2c-mux-idle-disconnect;
0564
0565 nvmeslot_0: i2c@0 {
0566 #address-cells = <1>;
0567 #size-cells = <0>;
0568 reg = <0x0>;
0569 };
0570 nvmeslot_1: i2c@1 {
0571 #address-cells = <1>;
0572 #size-cells = <0>;
0573 reg = <0x1>;
0574 };
0575 nvmeslot_2: i2c@2 {
0576 #address-cells = <1>;
0577 #size-cells = <0>;
0578 reg = <0x2>;
0579 };
0580 nvmeslot_3: i2c@3 {
0581 #address-cells = <1>;
0582 #size-cells = <0>;
0583 reg = <0x3>;
0584 };
0585 nvmeslot_4: i2c@4 {
0586 #address-cells = <1>;
0587 #size-cells = <0>;
0588 reg = <0x4>;
0589 };
0590 nvmeslot_5: i2c@5 {
0591 #address-cells = <1>;
0592 #size-cells = <0>;
0593 reg = <0x5>;
0594 };
0595 nvmeslot_6: i2c@6 {
0596 #address-cells = <1>;
0597 #size-cells = <0>;
0598 reg = <0x6>;
0599 };
0600 nvmeslot_7: i2c@7 {
0601 #address-cells = <1>;
0602 #size-cells = <0>;
0603 reg = <0x7>;
0604 };
0605
0606 };
0607 };
0608
0609 &nvmeslot_8_15 {
0610 status = "okay";
0611
0612 i2c-mux@75 {
0613 compatible = "nxp,pca9548";
0614 #address-cells = <1>;
0615 #size-cells = <0>;
0616 reg = <0x75>;
0617 i2c-mux-idle-disconnect;
0618
0619 nvmeslot_8: i2c@0 {
0620 #address-cells = <1>;
0621 #size-cells = <0>;
0622 reg = <0x0>;
0623 };
0624 nvmeslot_9: i2c@1 {
0625 #address-cells = <1>;
0626 #size-cells = <0>;
0627 reg = <0x1>;
0628 };
0629 nvmeslot_10: i2c@2 {
0630 #address-cells = <1>;
0631 #size-cells = <0>;
0632 reg = <0x2>;
0633 };
0634 nvmeslot_11: i2c@3 {
0635 #address-cells = <1>;
0636 #size-cells = <0>;
0637 reg = <0x3>;
0638 };
0639 nvmeslot_12: i2c@4 {
0640 #address-cells = <1>;
0641 #size-cells = <0>;
0642 reg = <0x4>;
0643 };
0644 nvmeslot_13: i2c@5 {
0645 #address-cells = <1>;
0646 #size-cells = <0>;
0647 reg = <0x5>;
0648 };
0649 nvmeslot_14: i2c@6 {
0650 #address-cells = <1>;
0651 #size-cells = <0>;
0652 reg = <0x6>;
0653 };
0654 nvmeslot_15: i2c@7 {
0655 #address-cells = <1>;
0656 #size-cells = <0>;
0657 reg = <0x7>;
0658 };
0659 };
0660 };
0661
0662 &nvmeslot_16_23 {
0663 status = "okay";
0664
0665 i2c-mux@75 {
0666 compatible = "nxp,pca9548";
0667 #address-cells = <1>;
0668 #size-cells = <0>;
0669 reg = <0x75>;
0670 i2c-mux-idle-disconnect;
0671
0672 nvmeslot_16: i2c@0 {
0673 #address-cells = <1>;
0674 #size-cells = <0>;
0675 reg = <0x0>;
0676 };
0677 nvmeslot_17: i2c@1 {
0678 #address-cells = <1>;
0679 #size-cells = <0>;
0680 reg = <0x1>;
0681 };
0682 nvmeslot_18: i2c@2 {
0683 #address-cells = <1>;
0684 #size-cells = <0>;
0685 reg = <0x2>;
0686 };
0687 nvmeslot_19: i2c@3 {
0688 #address-cells = <1>;
0689 #size-cells = <0>;
0690 reg = <0x3>;
0691 };
0692 nvmeslot_20: i2c@4 {
0693 #address-cells = <1>;
0694 #size-cells = <0>;
0695 reg = <0x4>;
0696 };
0697 nvmeslot_21: i2c@5 {
0698 #address-cells = <1>;
0699 #size-cells = <0>;
0700 reg = <0x5>;
0701 };
0702 nvmeslot_22: i2c@6 {
0703 #address-cells = <1>;
0704 #size-cells = <0>;
0705 reg = <0x6>;
0706 };
0707 nvmeslot_23: i2c@7 {
0708 #address-cells = <1>;
0709 #size-cells = <0>;
0710 reg = <0x7>;
0711 };
0712 };
0713 };
0714
0715 &i2c6 {
0716 status = "okay";
0717 psu@58 {
0718 compatible = "pmbus";
0719 reg = <0x58>;
0720 };
0721
0722 psu@59 {
0723 compatible = "pmbus";
0724 reg = <0x59>;
0725 };
0726 };
0727
0728 &i2c7 {
0729 status = "okay";
0730 };
0731
0732 &i2c8 {
0733 status = "okay";
0734 };
0735
0736 &i2c9 {
0737 status = "okay";
0738 };
0739
0740 &i2c10 {
0741 status = "okay";
0742 adm1278@10 {
0743 compatible = "adi,adm1278";
0744 reg = <0x10>;
0745 };
0746
0747 adm1278@11 {
0748 compatible = "adi,adm1278";
0749 reg = <0x11>;
0750 };
0751 };
0752
0753 &gfx {
0754 status = "okay";
0755 memory-region = <&gfx_memory>;
0756 };
0757
0758 &pinctrl {
0759 aspeed,external-nodes = <&gfx &lhc>;
0760 };
0761
0762 &pwm_tacho {
0763 status = "okay";
0764 pinctrl-names = "default";
0765 pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
0766 &pinctrl_pwm4_default &pinctrl_pwm5_default
0767 &pinctrl_pwm6_default &pinctrl_pwm7_default>;
0768
0769 fan@0 {
0770 reg = <0x02>;
0771 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
0772 };
0773
0774 fan@1 {
0775 reg = <0x02>;
0776 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
0777 };
0778
0779 fan@2 {
0780 reg = <0x03>;
0781 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
0782 };
0783
0784 fan@3 {
0785 reg = <0x03>;
0786 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
0787 };
0788
0789 fan@4 {
0790 reg = <0x04>;
0791 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
0792 };
0793
0794 fan@5 {
0795 reg = <0x04>;
0796 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
0797 };
0798
0799 fan@6 {
0800 reg = <0x05>;
0801 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
0802 };
0803
0804 fan@7 {
0805 reg = <0x05>;
0806 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
0807 };
0808
0809 fan@8 {
0810 reg = <0x06>;
0811 aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
0812 };
0813
0814 fan@9 {
0815 reg = <0x06>;
0816 aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
0817 };
0818
0819 fan@10 {
0820 reg = <0x07>;
0821 aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
0822 };
0823
0824 fan@11 {
0825 reg = <0x07>;
0826 aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
0827 };
0828
0829 };
0830
0831 &vhub {
0832 status = "okay";
0833 };
0834
0835 &adc {
0836 status = "okay";
0837 };
0838
0839 &video {
0840 status = "okay";
0841 memory-region = <&video_engine_memory>;
0842 };
0843
0844 &gpio {
0845 gpio-line-names =
0846 /*A0-A7*/ "","","","S0_BMC_SPECIAL_BOOT","","","","",
0847 /*B0-B7*/ "BMC_SELECT_EEPROM","","","",
0848 "POWER_BUTTON","","","",
0849 /*C0-C7*/ "","","","","","","","",
0850 /*D0-D7*/ "","","","","","","","",
0851 /*E0-E7*/ "","","","","","","","",
0852 /*F0-F7*/ "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
0853 "S1_DDR_SAVE","","",
0854 /*G0-G7*/ "host0-ready","SHD_REQ_L","","S0_OVERTEMP_L","","",
0855 "","",
0856 /*H0-H7*/ "","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","",
0857 /*I0-I7*/ "PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT",
0858 "","","","","",
0859 /*J0-J7*/ "S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
0860 "","","","",
0861 /*K0-K7*/ "","","","","","","","",
0862 /*L0-L7*/ "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
0863 /*M0-M7*/ "","","","","","","","",
0864 /*N0-N7*/ "","","","","","","","",
0865 /*O0-O7*/ "","","","","","","","",
0866 /*P0-P7*/ "","","","","","","","",
0867 /*Q0-Q7*/ "","","","","","UID_BUTTON","","",
0868 /*R0-R7*/ "","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
0869 "OCP_MAIN_PWREN","RESET_BUTTON","","",
0870 /*S0-S7*/ "","","","","rtc-battery-voltage-read-enable","","","",
0871 /*T0-T7*/ "","","","","","","","",
0872 /*U0-U7*/ "","","","","","","","",
0873 /*V0-V7*/ "","","","","","","","",
0874 /*W0-W7*/ "","","","","","","","",
0875 /*X0-X7*/ "","","","","","","","",
0876 /*Y0-Y7*/ "","","","","","","","",
0877 /*Z0-Z7*/ "S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
0878 "S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
0879 /*AA0-AA7*/ "","","","","","","","",
0880 /*AB0-AB7*/ "S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
0881 "S1_BMC_DDR_ADR","","","","",
0882 /*AC0-AC7*/ "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
0883 "BMC_OCP_PG";
0884
0885 i2c4-o-en-hog {
0886 gpio-hog;
0887 gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
0888 output-high;
0889 line-name = "BMC_I2C4_O_EN";
0890 };
0891 };
