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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 // Copyright (c) 2020 AMD Inc.
0003 // Author: Supreeth Venkatesh <supreeth.venkatesh@amd.com>
0004 /dts-v1/;
0005 
0006 #include "aspeed-g5.dtsi"
0007 #include <dt-bindings/gpio/aspeed-gpio.h>
0008 
0009 / {
0010         model = "AMD EthanolX BMC";
0011         compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
0012 
0013         memory@80000000 {
0014                 reg = <0x80000000 0x20000000>;
0015         };
0016 
0017         reserved-memory {
0018                 #address-cells = <1>;
0019                 #size-cells = <1>;
0020                 ranges;
0021 
0022                 video_engine_memory: jpegbuffer {
0023                         size = <0x02000000>;    /* 32M */
0024                         alignment = <0x01000000>;
0025                         compatible = "shared-dma-pool";
0026                         reusable;
0027                 };
0028         };
0029 
0030 
0031         aliases {
0032                 serial0 = &uart1;
0033                 serial4 = &uart5;
0034         };
0035         chosen {
0036                 stdout-path = &uart5;
0037                 bootargs = "console=ttyS4,115200 earlycon";
0038         };
0039         leds {
0040                 compatible = "gpio-leds";
0041 
0042                 fault {
0043                         gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
0044                 };
0045 
0046                 identify {
0047                         gpios = <&gpio ASPEED_GPIO(A, 3) GPIO_ACTIVE_LOW>;
0048                 };
0049         };
0050         iio-hwmon {
0051                 compatible = "iio-hwmon";
0052                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>;
0053         };
0054 };
0055 
0056 &fmc {
0057         status = "okay";
0058         flash@0 {
0059                 status = "okay";
0060                 m25p,fast-read;
0061                 #include "openbmc-flash-layout.dtsi"
0062         };
0063 };
0064 
0065 
0066 &mac0 {
0067         status = "okay";
0068 
0069         pinctrl-names = "default";
0070         pinctrl-0 = <&pinctrl_rmii1_default>;
0071         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
0072                  <&syscon ASPEED_CLK_MAC1RCLK>;
0073         clock-names = "MACCLK", "RCLK";
0074 };
0075 
0076 &uart1 {
0077         //Host Console
0078         status = "okay";
0079         pinctrl-names = "default";
0080         pinctrl-0 = <&pinctrl_txd1_default
0081                      &pinctrl_rxd1_default>;
0082 };
0083 
0084 &uart5 {
0085         //BMC Console
0086         status = "okay";
0087 };
0088 
0089 &adc {
0090         status = "okay";
0091 
0092         pinctrl-names = "default";
0093         pinctrl-0 = <&pinctrl_adc0_default
0094                      &pinctrl_adc1_default
0095                      &pinctrl_adc2_default
0096                      &pinctrl_adc3_default
0097                      &pinctrl_adc4_default>;
0098 };
0099 
0100 &gpio {
0101         status = "okay";
0102         gpio-line-names =
0103         /*A0-A7*/       "","","FAULT_LED","CHASSIS_ID_LED","","","","",
0104         /*B0-B7*/       "","","","","","","","",
0105         /*C0-C7*/       "CHASSIS_ID_BTN","INTRUDER","AC_LOSS","","","","","",
0106         /*D0-D7*/       "HDT_DBREQ","LOCAL_SPI_ROM_SEL","FPGA_SPI_ROM_SEL","JTAG_MUX_S",
0107                         "JTAG_MUX_OE","HDT_SEL","ASERT_WARM_RST_BTN","FPGA_RSVD",
0108         /*E0-E7*/       "","","MON_P0_PWR_BTN","MON_P0_RST_BTN","MON_P0_NMI_BTN",
0109                         "MON_P0_PWR_GOOD","MON_PWROK","MON_RESET",
0110         /*F0-F7*/       "MON_P0_PROCHOT","MON_P1_PROCHOT","MON_P0_THERMTRIP",
0111                         "MON_P1_THERMTRIP","P0_PRESENT","P1_PRESENT","MON_ATX_PWR_OK","",
0112         /*G0-G7*/       "BRD_REV_ID_3","BRD_REV_ID_2","BRD_REV_ID_1","BRD_REV_ID_0",
0113                         "P0_APML_ALERT","P1_APML_ALERT","FPGA ALERT","",
0114         /*H0-H7*/       "BRD_ID_0","BRD_ID_1","BRD_ID_2","BRD_ID_3",
0115                         "PCIE_DISCONNECTED","USB_DISCONNECTED","SPARE_0","SPARE_1",
0116         /*I0-I7*/       "","","","","","","","",
0117         /*J0-J7*/       "","","","","","","","",
0118         /*K0-K7*/       "","","","","","","","",
0119         /*L0-L7*/       "","","","","","","","",
0120         /*M0-M7*/       "ASSERT_PWR_BTN","ASSERT_RST_BTN","ASSERT_NMI_BTN",
0121                         "ASSERT_LOCAL_LOCK","ASSERT_P0_PROCHOT","ASSERT_P1_PROCHOT",
0122                         "ASSERT_CLR_CMOS","ASSERT_BMC_READY",
0123         /*N0-N7*/       "","","","","","","","",
0124         /*O0-O7*/       "","","","","","","","",
0125         /*P0-P7*/       "P0_VDD_CORE_RUN_VRHOT","P0_VDD_SOC_RUN_VRHOT",
0126                         "P0_VDD_MEM_ABCD_SUS_VRHOT","P0_VDD_MEM_EFGH_SUS_VRHOT",
0127                         "P1_VDD_CORE_RUN_VRHOT","P1_VDD_SOC_RUN_VRHOT",
0128                         "P1_VDD_MEM_ABCD_SUS_VRHOT","P1_VDD_MEM_EFGH_SUS_VRHOT",
0129         /*Q0-Q7*/       "","","","","","","","",
0130         /*R0-R7*/       "","","","","","","","",
0131         /*S0-S7*/       "","","","","","","","",
0132         /*T0-T7*/       "","","","","","","","",
0133         /*U0-U7*/       "","","","","","","","",
0134         /*V0-V7*/       "","","","","","","","",
0135         /*W0-W7*/       "","","","","","","","",
0136         /*X0-X7*/       "","","","","","","","",
0137         /*Y0-Y7*/       "","","","","","","","",
0138         /*Z0-Z7*/       "","","","","","","","",
0139         /*AA0-AA7*/     "","SENSOR THERM","","","","","","",
0140         /*AB0-AB7*/     "","","","","","","","",
0141         /*AC0-AC7*/     "","","","","","","","";
0142 };
0143 
0144 //APML for P0
0145 &i2c0 {
0146         status = "okay";
0147 };
0148 
0149 //APML for P1
0150 &i2c1 {
0151         status = "okay";
0152 };
0153 
0154 //FPGA
0155 &i2c2 {
0156         status = "okay";
0157 };
0158 
0159 //24LC128 EEPROM
0160 &i2c3 {
0161         status = "okay";
0162         eeprom@50 {
0163                 compatible = "atmel,24c256";
0164                 reg = <0x50>;
0165                 pagesize = <64>;
0166         };
0167 };
0168 
0169 //P0 Power regulators
0170 &i2c4 {
0171         status = "okay";
0172 };
0173 
0174 //P1 Power regulators
0175 &i2c5 {
0176         status = "okay";
0177 };
0178 
0179 //P0/P1 Thermal diode
0180 &i2c6 {
0181         status = "okay";
0182 };
0183 
0184 // Thermal Sensors
0185 &i2c7 {
0186         status = "okay";
0187 
0188         lm75a@48 {
0189                 compatible = "national,lm75a";
0190                 reg = <0x48>;
0191         };
0192 
0193         lm75a@49 {
0194                 compatible = "national,lm75a";
0195                 reg = <0x49>;
0196         };
0197 
0198         lm75a@4a {
0199                 compatible = "national,lm75a";
0200                 reg = <0x4a>;
0201         };
0202 
0203         lm75a@4b {
0204                 compatible = "national,lm75a";
0205                 reg = <0x4b>;
0206         };
0207 
0208         lm75a@4c {
0209                 compatible = "national,lm75a";
0210                 reg = <0x4c>;
0211         };
0212 
0213         lm75a@4d {
0214                 compatible = "national,lm75a";
0215                 reg = <0x4d>;
0216         };
0217 
0218         lm75a@4e {
0219                 compatible = "national,lm75a";
0220                 reg = <0x4e>;
0221         };
0222 
0223         lm75a@4f {
0224                 compatible = "national,lm75a";
0225                 reg = <0x4f>;
0226         };
0227 };
0228 
0229 //BMC I2C
0230 &i2c8 {
0231         status = "okay";
0232 };
0233 
0234 &kcs1 {
0235         status = "okay";
0236         aspeed,lpc-io-reg = <0x60>;
0237 };
0238 
0239 &kcs2 {
0240         status = "okay";
0241         aspeed,lpc-io-reg = <0x62>;
0242 };
0243 
0244 &kcs3 {
0245         status = "okay";
0246         aspeed,lpc-io-reg = <0xCA2>;
0247 };
0248 
0249 &kcs4 {
0250         status = "okay";
0251         aspeed,lpc-io-reg = <0x97DE>;
0252 };
0253 
0254 &lpc_snoop {
0255         status = "okay";
0256         snoop-ports = <0x80>, <0x81>;
0257 };
0258 
0259 &lpc_ctrl {
0260         //Enable lpc clock
0261         status = "okay";
0262 };
0263 
0264 &pwm_tacho {
0265         status = "okay";
0266         pinctrl-names = "default";
0267         pinctrl-0 = <&pinctrl_pwm0_default
0268         &pinctrl_pwm1_default
0269         &pinctrl_pwm2_default
0270         &pinctrl_pwm3_default
0271         &pinctrl_pwm4_default
0272         &pinctrl_pwm5_default
0273         &pinctrl_pwm6_default
0274         &pinctrl_pwm7_default>;
0275 
0276         fan@0 {
0277                 reg = <0x00>;
0278                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
0279         };
0280 
0281         fan@1 {
0282                 reg = <0x01>;
0283                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
0284         };
0285 
0286         fan@2 {
0287                 reg = <0x02>;
0288                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
0289         };
0290 
0291         fan@3 {
0292                 reg = <0x03>;
0293                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
0294         };
0295 
0296         fan@4 {
0297                 reg = <0x04>;
0298                 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
0299         };
0300 
0301         fan@5 {
0302                 reg = <0x05>;
0303                 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
0304         };
0305 
0306         fan@6 {
0307                 reg = <0x06>;
0308                 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
0309         };
0310 
0311         fan@7 {
0312                 reg = <0x07>;
0313                 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
0314         };
0315 };
0316 
0317 &video {
0318         status = "okay";
0319         memory-region = <&video_engine_memory>;
0320 };
0321 
0322 &vhub {
0323         status = "okay";
0324 };
0325